SILABS C8051F206-GQ 25 mips, 8 kb flash, 12-bit adc, 48-pin mixed-signal mcu Datasheet

C8051F206
25 MIPS, 8 kB Flash, 12-Bit ADC, 48-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
-
12-Bit ADC
-
No missing codes
Programmable throughput up to 100 ksps
32 external inputs (each port I/O can be configured as an ADC input onthe-fly)
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
VREF from external pin or VDD
Two comparators
-
On-Chip JTAG Debug
-
On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit
emulation
Supports breakpoints, single stepping, watchpoints, inspect/modify
memory, and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Fully compliant with IEEE 1149.1 specification
1280 bytes data RAM
8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
-
32 port I/O; all are 5 V tolerant
Hardware SPI™ and UART serial ports available concurrently
3 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Clock Sources
-
Internal programmable oscillator: 2–16 MHz
External oscillator: Crystal, RC, C, or Clock
Can switch between clock sources on-the-fly
Package
48-pin TQFP (standard lead and lead-free packages)
Ordering Part Numbers
Typical operating current: 9 mA at 25 MHz
Typical stop mode current: <0.1 µA
-
Temperature Range: –40 to +85 °C
VDD
VDD
-
-
Supply Voltage: 2.7 to 3.6 V
-
Memory
Digital Peripherals
Programmable hysteresis
Configurable to generate interrupts or reset
VDD Monitor and Brown-out Detector
-
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz system clock
Expanded interrupt handler; up to 21 interrupt sources
Analog/Digital
Power
Lead-free package: C8051F206-GQ
Standard package: C8051F206
Port 0
Latch
GND
GND
NC
NC
NC
P
0
P
0
UART
D
r
v
M
U
X
Timer 0
Timer 1
P0.0/TX
P0.1/RX
P0.2//INT0
P0.3//INT1
P0.4/T0
P0.5/T1
P0.6/T2
P0.7/T2EX
Timer 2
TCK
TMS
TDI
TDO
JTAG
Logic
Debug HW
Reset
RST
MONEN
XTAL1
XTAL2
VDD
Monitor
External
Oscillator
Circuit
Internal
Oscillator
8
0
5
1
WDT
System Clock
C
o
r
e
8 kB
FLASH
256 byte
RAM
Port 1
Latch
CP0+
CP0
CP0
CP1+
CP1
CP1
1024 byte
XRAM
SFR Bus
CP0-
CP1-
P
1
P
1
D
r
v
M
U
X
SYSCLK
Port 2
Latch
SPI
P
2
P
2
M
U
X
D
r
v
P
3
Port 3
Latch
D
r
v
12-bit
100 ksps
ADC
VDD
General Purpose
P1.0/CP0+
P1.1/CP0P1.2/CP0
P1.3/CP1+
P1.4/CP1P1.5/CP1
P1.6/SYSCLK
P1.7
Copyright © 2005 by Silicon Laboratories
PGA
A
M
U
X
P2.0/NSS
P2.1/MISO
P2.2/MOSI
P2.3/SCK
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
AIN0-AIN31
VREF
5.5.2005
C8051F206
25 MIPS, 8 kB Flash, 12-Bit ADC, 48-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER
CONDITIONS
GLOBAL CHARACTERISTICS
Digital Supply Voltage
Digital Supply Current
Clock = 25 MHz
with CPU active
Clock = 1 MHz
Clock = 32 kHz; VDD Monitor Enabled
Digital Supply Current
Oscillator not running; VDD Monitor
(shutdown)
Enabled
Oscillator not running; VDD Monitor
Disabled
Digital Supply RAM Data
Retention Voltage
CPU & DIGITAL I/O PORTS
Clock Frequency Range
Port Output High Voltage
IOH = –3 mA, Port I/O push-pull
Port Output Low Voltage
IOL = 8.5 mA
Input High Voltage
Input Low Voltage
SPI Bus Clock Frequency fCLK=MCU Clock; SPI Master Mode
A/D CONVERTER
Resolution
Integral Nonlinearity
Differential Nonlinearity
Guaranteed Monotonic
Signal-to-Noise Plus
Distortion
Throughput Rate
Input Voltage Range
COMPARATORS
Supply Current
(each Comparator)
Response Time
| CP+ – CP- | = 100 mV
Input Voltage Range
Input Bias Current
Input Offset Voltage
TYP
MAX
UNITS
3.6
9
0.4
20
10
V
mA
mA
µA
µA
0.1
µA
1.5
V
2.7
DC
VDD – 0.7
25
0.6
0.7 x VDD
0.3 x VDD
fCLK/2
12
±1
±2
±1
bits
LSB
LSB
dB
100
VREF
ksps
V
VDD + 0.25
+5
+10
µA
µs
V
nA
mV
64
0
1.3
4
–0.25
–5
–10
0.001
MHz
V
V
V
V
MHz
C8051F206DK Development Kit
Package Information
D
MIN
MIN NOM MAX
(mm) (mm) (mm)
D1
A
E1
E
-
A1 0.05
-
1.20
-
0.15
A2 0.95 1.00 1.05
b
48
PIN 1
IDENTIFIER
A2
1
0.17 0.22 0.27
D
-
9.00
-
D1
-
7.00
-
e
-
0.50
-
E
-
9.00
-
E1
-
7.00
-
e
A
b
General Purpose
A1
Copyright © 2005 by Silicon Laboratories
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
5.5.2005
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