AD ADG409 Lc2mos 4-/8-channel high performance analog multiplexer Datasheet

a
LC2MOS 4-/8-Channel
High Performance Analog Multiplexers
ADG408/ADG409
FEATURES
44 V Supply Maximum Ratings
VSS to V DD Analog Signal Range
Low On Resistance (100 V max)
Low Power (ISUPPLY < 75 mA)
Fast Switching
Break-Before-Make Switching Action
Plug-in Replacement for DG408/DG409
APPLICATIONS
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery Powered Systems
Sample and Hold Systems
Communication Systems
FUNCTIONAL BLOCK DIAGRAMS
ADG408
ADG409
S1
S1A
DA
S4A
D
S1B
DB
S8
S4B
1 OF 8
DECODER
A0 A1 A2 EN
1 OF 4
DECODER
A0
A1
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG408 and ADG409 are monolithic CMOS analog
multiplexers comprising eight single channels and four differential channels respectively. The ADG408 switches one of eight
inputs to a common output as determined by the 3-bit binary
address lines A0, A1 and A2. The ADG409 switches one of four
differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF.
1. Extended Signal Range
The ADG408/ADG409 are fabricated on an enhanced
LC2MOS process giving an increased signal range that
extends to the supply rails.
The ADG408/ADG409 are designed on an enhanced LC2MOS
process which provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input signal
range that extends to the supplies. In the OFF condition, signal
levels up to the supplies are blocked. All channels exhibit breakbefore-make switching action, preventing momentary shorting
when switching channels. Inherent in the design is low charge
injection for minimum transients when switching the digital
inputs.
2. Low Power Dissipation
3 Low RON
4. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG408/ADG409 can be operated from a single rail power
supply. The parts are fully specified with a single +12 V
power supply and will remain functional with single supplies
as low as +5 V.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 Analog Multiplexers.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
ADG408/ADG409–SPECIFICATIONS
DUAL SUPPLY1
(VDD = +15 V, VSS = –15 V, GND = 0 V, unless otherwise noted)
Parameter
ANALOG SWITCH
Analog Signal Range
RON
∆RON
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG408
ADG409
Channel ON Leakage ID, IS (ON)
ADG408
ADG409
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
B Version
–408C to
+258C
+858C
T Version
–558C to
+258C +1258C
VSS to VDD
Units
40
100
15
VSS to VDD V
Ω typ
125
Ω max
Ω max
± 50
± 0.5
± 50
nA max
±1
±1
± 100
± 50
±1
±1
± 100
± 50
nA max
nA max
±1
±1
± 100
± 50
±1
±1
± 100
± 50
nA max
nA max
2.4
0.8
V min
V max
± 10
µA max
pF typ
VIN = 0 or VDD
f = 1 MHz
120
250
ns typ
ns max
RL = 300 Ω, CL = 35 pF;
VS1 = ± 10 V, VSS = 710 V;
Test Circuit 5
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 6
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 10 nF;
Test Circuit 8
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; Test Circuit 9
RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
f = 1 MHz
f = 1 MHz
40
100
15
125
± 0.5
2.4
0.8
± 10
8
DYNAMIC CHARACTERISTICS2
tTRANSITION
8
120
250
tOPEN
10
10
10
10
ns min
tON (EN)
85
150
125
225
65
150
85
150
125
225
65
150
Charge Injection
20
20
ns typ
ns max
ns typ
ns max
pC typ
OFF Isolation
–75
–75
dB typ
Channel-to-Channel Crosstalk
85
85
dB typ
CS (OFF)
CD (OFF)
ADG408
ADG409
CD, CS (ON)
ADG408
ADG409
11
11
pF typ
40
20
40
20
pF typ
pF typ
54
34
54
34
pF typ
pF typ
tOFF (EN)
VD = ± 10 V, IS = –10 mA
VD = +10 V, –10 V
VD = ± 10 V, VS = 710 V;
Test Circuit 2
VD = ± 10 V; VS = 710 V;
Test Circuit 3
VS = VD = ± 10 V;
Test Circuit 4
f = 1 MHz
POWER REQUIREMENTS
IDD
1
5
1
5
ISS
IDD
Test Conditions/Comments
100
200
500
1
5
1
5
100
200
500
µA typ
µA max
µA typ
µA max
µA typ
µA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. A
ADG408/ADG409
SINGLE SUPPLY1
(VDD = +12 V, VSS = 0 V, GND = 0 V, unless otherwise noted)
Parameter
B Version
–408C to
+258C
+858C
ANALOG SWITCH
Analog Signal Range
RON
90
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
± 0.5
± 50
± 0.5
± 50
nA max
±1
±1
± 100
± 50
±1
±1
± 100
± 50
nA max
nA max
±1
±1
± 100
± 50
±1
±1
± 100
± 50
nA max
nA max
2.4
0.8
V min
V max
± 10
Drain OFF Leakage ID (OFF)
ADG408
ADG409
Channel ON Leakage ID, IS (ON)
ADG408
ADG409
T Version
–558C to
+258C +1258C
0 to VDD
0 to VDD
90
Units
Test Conditions/Comments
V
Ω typ
VD = +3 V, +10 V, IS = –1 mA
VD =8 V/0 V, VS = 0 V/8 V;
Test Circuit 2
VD =8 V/0 V, VS = 0 V/8 V;
Test Circuit 3
VS = VD = 8 V/0 V;
Test Circuit 4
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
8
8
µA max
pF typ
VIN = 0 or VDD
f = 1 MHz
DYNAMIC CHARACTERISTICS2
tTRANSITION
130
130
ns typ
tOPEN
10
10
ns typ
tON (EN)
140
140
ns typ
tOFF (EN)
60
60
ns typ
Charge Injection
5
5
pC typ
OFF Isolation
–75
–75
dB typ
Channel-to-Channel Crosstalk
85
85
dB typ
CS (OFF)
CD (OFF)
ADG408
ADG409
CD, CS (ON)
ADG408
ADG409
11
11
pF typ
RL = 300 Ω, CL = 35 pF;
VS1 = 8 V/0 V, VS8 = 0 V/8 V;
Test Circuit 5
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 6
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = +5 V; Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 10 nF;
Test Circuit 8
RL = 1 kΩ, f = 100 kHz;
VEN = 0 V; Test Circuit 9
RL = 1 kΩ, f = 100 kHz;
Test Circuit 10
f = 1 MHz
f = 1 MHz
40
20
40
20
pF typ
pF typ
54
34
54
34
pF typ
pF typ
2.4
0.8
± 10
f = 1 MHz
POWER REQUIREMENTS
IDD
IDD
1
5
100
200
500
1
5
100
200
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. A
–3–
500
µA typ
µA max
µA typ
µA max
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
ADG408/ADG409
ABSOLUTE MAXIMUM RATINGS 1
ORDERING INFORMATION
(TA = +25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
Analog, Digital Inputs2 . . . . . VSS –2 V to VDD +2 V or 20 mA,
Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . . 40 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . . 900 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +300°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155°C/W
θJC, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 50°C/W
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Model1
Temperature Range
Package Option2
ADG408BN
ADG408BR
ADG408BRU
ADG408TQ
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
N-16
R-16A
RU-16
Q-16
ADG409BN
ADG409BR
ADG409TQ
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
N-16
R-16A
Q-16
NOTES
1
To order MIL-STD-883, Class B processed parts, add /883B to T grade part
numbers.
2
N = Plastic DIP; Q = Cerdip; R = 0.15" Small Outline IC (SOIC);
RU = Think Shrink Small Outline Package (TSSOP).
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at A, EN, S or D will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG408/ADG409 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. A
ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
A0 1
16
15
A2
EN 2
15
14
GND
VSS 3
14
VDD
13
VDD
S1A
13
S1B
16
EN 2
VSS 3
S1
4
ADG408
A1
A1
A0 1
ADG409
4
TERMINOLOGY
GND
VDD
Most positive power supply potential.
VSS
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
TOP VIEW
S2 5 (Not to Scale) 12 S5
TOP VIEW
S2A 5 (Not to Scale) 12 S2B
GND
Ground (0 V) reference.
Ohmic resistance between D and S.
Difference between the RON of any two
channels.
S3
6
11
S6
S4
7
10
S7
D 8
9
S8
S3A
6
11
S3B
RON
S4A
7
10
S4B
∆RON
DA 8
9
DB
ADG408 Truth Table
A2
A1
A0
EN
ON
SWITCH
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
IS (OFF)
Source leakage current when the switch is off.
ID (OFF)
Drain leakage current when the switch is off.
ID, IS (ON)
Channel leakage current when the switch is on.
VD (VS)
Analog voltage on terminals D, S.
CS (OFF)
Channel input capacitance for “OFF”
condition.
CD (OFF)
Channel output capacitance for “OFF”
condition.
CD, CS (ON)
“ON” switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition.
tOFF (EN)
Delay time between the 50% and 90% points of
the digital input and switch “OFF” condition.
tTRANSITION
Delay time between the 50% and 90% points of
the digital inputs and the switch “ON” condition
when switching from one address state to another.
tOPEN
“OFF” time measured between the 80% point
of both switches when switching from one
address state to another.
VINL
Maximum input voltage for Logic “0.”
VINH
Minimum input voltage for Logic “1.”
IINL (IINH)
Input current of the digital input.
Crosstalk
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through
an “OFF” channel.
Charge
Injection
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
IDD
Positive supply current.
ISS
Negative supply current.
ADG409 Truth Table
Al
A0
EN
ON SWITCH
PAIR
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
NONE
1
2
3
4
REV. A
–5–
ADG408/ADG409
Typical Performance Characteristics
120
180
TA = +258C
TA = +258C
100
VDD = +5V
VSS = 0V
160
VDD = +5V
VSS = –5V
VDD = +12V
VSS = –12V
80
VDD = +10V
VSS = –10V
RON – V
RON – V
140
60
120
VDD = +12V
VSS = 0V
VDD = +10V
VSS = 0V
100
80
40
VDD = +15V
VSS = –15V
20
–15
40
–10
–5
0
5
VD (VS) – Volts
10
15
90
6
9
VD (VS) – Volts
3
12
15
130
VDD = +15V
VSS = –15V
VDD = +12V
VSS = 0V
120
80
RON – V
110
70
RON – V
0
Figure 4. RON as a Function of VD (VS): Single Supply
Voltage
Figure 1. RON as a Function of VD (VS): Dual Supply Voltage
100
VDD = +15V
VSS = 0V
60
+1258C
60
+858C
50
100
+1258C
90
+858C
80
+258C
40
70
+258C
30
–15
–10
–5
0
5
VD (VS) – Volts
10
60
15
Figure 2. RON as a Function of VD (VS) for Different
Temperatures
2
4
6
8
VD (VS) – Volts
10
12
Figure 5. RON as a Function of VD (VS) for Different
Temperatures
0.2
0.04
TA = +258C
VDD = +15V
VSS = –15V
TA = +258C
VDD = +12V
VSS = 0V
0.02
0.1
LEAKAGE CURRENT – nA
LEAKAGE CURRENT – nA
0
IS (OFF)
0
ID (OFF)
ID (ON)
–0.1
ID (ON)
0
ID (OFF)
IS (OFF)
–0.02
–0.04
–0.2
–15
–10
–5
0
VD (VS) – Volts
5
10
–0.06
15
Figure 3. Leakage Currents as a Function of VD (VS)
0
2
4
6
VD (VS) – Volts
8
10
12
Figure 6. Leakage Currents as a Function of VD (VS)
–6–
REV. A
ADG408/ADG409
120
140
VDD = +12V
VSS = 0V
VDD = +15V
VSS = –15V
100
tTRANSITION
120
tTRANSITION
tON (EN)
80
t – ns
t – ns
100
tON (EN)
60
80
tOFF (EN)
40
20
60
1
5
3
7
9
VIN – Volts
11
13
40
15
Figure 7. Switching Time vs. VIN (Bipolar Supply)
tOFF (EN)
1
3
5
7
VIN – Volts
9
13
11
Figure 10. Switching Time vs. VIN (Single Supply)
300
400
VIN = +5V
VIN = +5V
300
200
tON (EN)
200
tTRANSITION
t – ns
t – ns
tTRANSITION
100
tON (EN)
100
tOFF (EN)
tOFF (EN)
0
5
7
9
11
VSUPPLY – Volts
0
65
15
13
Figure 8. Switching Time vs. Single Supply
67
69
611
VSUPPLY – Volts
613
615
Figure 11. Switching Time vs. Bipolar Supply
104
104
VDD = +15V
VSS = –15V
VDD = +15V
VSS = –15V
ISS – mA
IDD – mA
103
103
102
EN = 2.4V
101
EN = 0V
EN = 2.4V
100
EN = 0V
102
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10–1
10M
Figure 9. Positive Supply Current vs. Switching Frequency
REV. A
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 12. Negative Supply Current vs. Switching
Frequency
–7–
ADG408/ADG409
110
110
VDD = +15V
VSS = –15V
VDD = +15V
VSS = –15V
100
CROSSTALK – dB
OFF ISOLATION – dB
100
90
90
80
80
70
70
1k
10k
100k
FREQUENCY – Hz
60
1M
Figure 13. Off Isolation vs. Frequency
1k
10k
100k
FREQUENCY – Hz
1M
Figure 14. Crosstalk vs. Frequency
Test Circuits
I DS
V1
S1
VDD
VSS
VDD
VSS
S2
S
D
S8
D
GND
VS
VS
EN
ID (OFF)
+0.8V
A
VD
RON = V1/I DS
Test Circuit 1. On Resistance
S1
IS (OFF)
VDD
VSS
VDD
VSS
S2
A
VD
VDD
VSS
VDD
VSS
S1
D
S8
2.4V
ID (ON)
D
S8
VS
Test Circuit 3. ID (OFF)
GND
EN
+0.8V
VS
GND
EN
A
VD
Test Circuit 4. ID (ON)
Test Circuit 2. IS (OFF)
–8–
REV. A
ADG408/ADG409
3V
ENABLE
DRIVE (VIN)
50%
VDD
VSS
VDD
VSS
tr < 20ns
tf < 20ns
50%
A0
VS1
S1
0V
VIN
A1
50V
S2 THRU S7
A2
tTRANSITION
tTRANSITION
VS8
S8
90%
ADG408*
OUTPUT
2.4V
OUTPUT
D
EN
300V
GND
35pF
90%
*SIMILAR CONNECTION FOR ADG409
Test Circuit 5. Switching Time of Multiplexer, tTRANSlTlON
3V
ADDRESS
DRIVE (VIN)
VDD
VSS
VDD
VSS
A0
S1
VIN
0V
VS
A1
50V
S2 THRU S7
A2
S8
80%
ADG408*
80%
OUTPUT
2.4V
OUTPUT
D
EN
300V
GND
35pF
tOPEN
*SIMILAR CONNECTION FOR ADG409
Test Circuit 6. Break-Before-Make Delay, tOPEN
3V
ENABLE
DRIVE (VIN)
50%
VDD
VSS
VDD
VSS
A0
50%
S1
VS
A1
0V
A2
tOFF (EN)
tON (EN)
0.9VO
S2 THRU S8
ADG408*
0.9VO
OUTPUT
D
EN
OUTPUT
VIN
50V
GND
*SIMILAR CONNECTION FOR ADG409
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
REV. A
–9–
300V
35pF
ADG408/ADG409
3V
VDD
VSS
VDD
VSS
A0
A1
VIN
A2
VOUT
RS
D VOUT
ADG408*
S
D
VOUT
EN
QINJ = CL 3 D VOUT
VS
CL
10nF
GND
VIN
*SIMILAR CONNECTION FOR ADG409
Test Circuit 8. Charge Injection
VDD
VSS
VDD
VSS
A0
A0
A1
A1
A2
ADG408
A2
VOUT
D
S1
0V
VSS
VDD
VSS
EN
2.4V
ADG408
D
S1
VOUT
1kV
1kV
S8
VS
VDD
EN
1kV
S2
S8
GND
VS
OFF ISOLATION = 20 LOG VOUT/VIN
GND
CROSSTALK = 20 LOG VOUT/VIN
Test Circuit 9. OFF Isolation
Test Circuit 10. Channel-to-Channel Crosstalk
–10–
REV. A
ADG408/ADG409
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
SO (Narrow Body) (R-16A)
C1824a–0–4/98
Plastic DIP (N-16)
0.3937 (10.00)
0.3859 (9.80)
0.87 (22.1) MAX
16
9
1
8
0.25 0.31
(6.35) (7.87)
0.1574 (4.00)
0.1497 (3.80)
16
9
1
8
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.035
(0.89)
0.125
(3.18)
MIN
0.18
(4.57)
SEATING
PLANE
0.033
(0.84)
0.100
(2.54)
BSC
0.011
(0.28)
0.0500
(1.27)
BSC
SEATING
PLANE
0.310 (7.87)
0.220 (5.59)
16
0.840 (21.34) MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.022 (0.558)
0.014 (0.356)
0.100
(2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.320 (8.13)
0.290 (7.37)
1
15°
0°
9
0.177 (4.50)
0.169 (4.30)
8
PIN 1
0.0099 (0.25)
0.0075 (0.19)
0.201 (5.10)
0.193 (4.90)
9
1
0.0192 (0.49)
0.0138 (0.35)
Thin Shrink Small Outline Package (TSSOP)
(RU-16)
0.080 (2.03) MAX
16
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.3 (7.62)
Cerdip (Q-16)
0.005 (0.13) MIN
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.256 (6.50)
0.246 (6.25)
0.018
(0.46)
0.18
(4.57)
MAX
0.015 (0.38)
0.008 (0.20)
8
PIN 1
0.006 (0.15)
0.002 (0.05)
0.0256
(0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
8°
0°
0.028 (0.70)
0.020 (0.50)
PRINTED IN U.S.A.
SEATING
PLANE
0.0433
(1.10)
MAX
REV. A
–11–