ON NL27WZ125 Dual buffer with 3−state output Datasheet

NL27WZ125
Dual Buffer with 3−State
Outputs
The NL27WZ125 is a high performance dual noninverting buffer
operating from a 1.65 V to 5.5 V supply.
Features
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Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5 V
Designed for 1.65 V to 5.5 V VCC Operation
Over Voltage Tolerant Inputs and Outputs
LVTTL Compatible − Interface Capability With 5 V TTL Logic with
VCC = 3 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3−State OE Input is Active−Low
Replacement for NC7WZ125
Chip Complexity = 72 FETs
Pb−Free Package is Available
MARKING
DIAGRAM
8
8
1
M0 M G
G
US8
US SUFFIX
CASE 493
1
M0
M
G
= Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon
manufacturing location.
PIN ASSIGNMENT
OE1
8
1
A1
2
Y2
7
6
3
GND
5
4
VCC
OE2
Y1
A2
Pin
Function
1
OE1
2
A1
3
Y2
4
GND
5
A2
6
Y1
7
OE2
8
VCC
FUNCTION TABLE
Figure 1. Pinout (Top View)
A1
OE1
1
EN
A2
OE2
Input
Y1
Output
OEn
An
Yn
L
L
L
L
H
H
H
X
Z
X = Don’t Care
n = 1, 2
Y2
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 5
1
Publication Order Number:
NL27WZ125/D
NL27WZ125
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
Circuit
Indicator
No. of
Gates per
Package
Temp
Range
Identifier
Technology
Device
Function
Package
Suffix
Package
Type
Tape and
Reel Size†
NL27WZ125US
NL
2
7
WZ
125
US
US8
178 mm, 3000 Unit
NL27WZ125USG
NL
2
7
WZ
125
US
US8
(Pb−Free)
178 mm, 3000 Unit
Device Order
Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Symbol
Value
Unit
DC Supply Voltage
*0.5 to )7.0
V
VI
DC Input Voltage
*0.5 to )7.0
V
VO
DC Output Voltage
VCC
Parameter
*0.5 to )7.0
−0.5 to VCC + 0.5
Output in High Impedance State
Output in HIGH or LOW State
V
VI < GND
*50
mA
VO < GND
*50
mA
$50
mA
DC Supply Current per Supply Pin
$100
mA
IGND
DC Ground Current per Ground Pin
$100
mA
TSTG
Storage Temperature Range
*65 to )150
°C
260
°C
)150
°C
250
°C/W
250
mW
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Sink Current
ICC
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature under Bias
qJA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
(Note 1)
Level 1
Oxygen Index: 28 to 34
ESD Withstand Voltage
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
Min
Max
Unit
1.65
1.5
5.5
5.5
V
(Note 5)
0
5.5
V
(HIGH or LOW State)
0
5.5
V
*40
)85
°C
0
0
0
20
10
5
ns/V
Operating
Data Retention Only
VCC = 2.5 V $0.2 V
VCC = 3.0 V $0.3 V
VCC = 5.0 V $0.5 V
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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2
NL27WZ125
DC ELECTRICAL CHARACTERISTICS
Min
0.75 VCC
0.7 VCC
Symbol
Parameter
VIH
High−Level Input Voltage
1.65
2.3 to 5.5
VIL
Low−Level Input Voltage
1.65
2.3 to 5.5
VOH
High−Level Output Voltage
VIN = VIL or VIH
IOH = 100 mA
IOH = −3 mA
IOH = −8 mA
IOH = −12 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
VOL
Low−Level Output Voltage
VIN = VIL
IOL = 100 mA
IOL = 3 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
1.65 to 5.5
IIN
Condition
Typ
VIN = VCC or GND
IOFF
Power Off
Leakage Current
VOUT = 5.5 V
VIN = 5.5 V
ICC
Quiescent Supply Current
VIN = VCC or GND
IOZ
3−State Output Leakage
VIN = VIL or VIH
0V v VOUT v 5.5 V
Max
Min
VCC − 0.1
1.29
1.9
2.2
2.4
2.3
3.8
Max
0.75 VCC
0.7 VCC
0.25 VCC
0.3 VCC
VCC
1.52
2.1
2.4
2.7
2.5
4.0
Unit
V
0.25 VCC
0.3 VCC
VCC−0.1
1.29
1.9
2.2
2.4
2.3
3.8
V
V
0.1
0.24
0.3
0.4
0.4
0.55
0.55
0.1
0.24
0.3
0.4
0.4
0.55
0.55
V
5.5
$0.1
$1.0
mA
0
1.0
10
mA
5.5
1.0
10
mA
2.3 to 5.5
$0.5
$5
mA
0.08
0.20
0.22
0.28
0.38
0.42
2.3
2.7
3.0
3.0
4.5
Input Leakage Current
*405C v TA v 855C
TA = 255C
VCC
(V)
AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns)
Symbol
tPLH
tPHL
Parameter
Propagation Delay
AN to YN
(Figures 3 and 4)
tOSLH
tOSHL
Output to Output Skew
(Note 6)
tPZH
tPZL
Output Enable Time
(Figures 5, 6 and 7)
tPHZ
tPLZ
Condition
*405C v TA v 855C
TA = 255C
VCC
(V)
Min
Typ
Max
Min
Max
Unit
ns
RL = 1 MW
CL = 15 pF
1.8 $ 0.15
2.5 $ 0.2
2.0
1.0
12
7.5
2.0
1.0
13
8
RL = 1 MW
CL = 15 pF
3.3 $ 0.3
0.8
5.2
0.8
5.5
RL = 500 W
CL = 50 pF
1.2
5.7
1.2
6.0
RL = 1 MW
CL = 15 pF
0.5
4.5
0.5
4.8
RL = 500 W
CL = 50 pF
0.8
5.0
0.8
5.3
RL = 500 W
CL = 50 pF
RL = 500 W
CL = 50 pF
Output Enable Time
(Figures 5, 6 and 7)
5.0 $ 0.5
3.3 $ 0.3
1.0
5.0 $ 0.5
1.0
0.8
ns
0.8
1.8 $ 0.15
2.5 $ 0.2
3.0
1.8
14
8.5
3.0
1.8
15
9.0
3.3 $ 0.3
1.2
6.2
1.2
6.5
5.0 $ 0.5
0.8
5.5
0.8
5.8
1.8 $ 0.15
2.5 $ 0.2
2.5
1.5
12
8.0
2.5
1.5
13
8.5
3.3 $ 0.3
0.8
5.7
0.8
6.0
5.0 $ 0.5
0.3
4.7
0.3
5.0
ns
ns
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
This specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
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3
NL27WZ125
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN
Condition
Typical
Unit
Input Capacitance
VCC = 5.5 V, VI = 0 V or VCC
7.0
pF
COUT
Output Capacitance
VCC = 5.5 V, VI = 0 V or VCC
7.0
pF
CPD
Power Dissipation Capacitance
(Note 7)
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 5.5 V, VI = 0 V or VCC
18
27
pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
tf = 3 ns
tf = 3 ns
90%
INPUT
A and B
OE = GND
VCC
90%
INPUT
50%
50%
10%
10%
tPHL
OUTPUT
CL *
GND
RL
tPLH
VOH
OUTPUT Y
50%
*Includes all probe and jig capacitance.
A 1 MHz square input wave is recommended for
propagation delay tests.
50%
VOL
Figure 3. Switching Waveform
Figure 4. TPLH or TPHL
VCC
50%
50%
OE
0V
tPZH
tPHZ
VCC
VOH − 10%
50%
On
≈0V
tPZL
tPLZ
≈ VCC
50%
On
VOL + 10%
GND
Figure 5. AC Output Enable and Disable Waveform
2
INPUT
VCC
INPUT
R1 = 500 W
VCC
OUTPUT
CL = 50 pF
OUTPUT
RL = 500 W
CL = 50 pF
RL = 250 W
A 1 MHz square input wave is recommended for
propagation delay tests.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 6. TPZL or TPL
Figure 7. TPZH or TPHZ
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4
NL27WZ125
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 493−02
ISSUE B
−X−
A
8
−Y−
5
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
J
DETAIL E
B
L
1
4
R
S
G
P
U
C
−T−
SEATING
PLANE
D
0.10 (0.004)
M
H
0.10 (0.004) T
K
N
R 0.10 TYP
T X Y
V
M
F
DETAIL E
DIM
A
B
C
D
F
G
H
J
K
L
M
N
P
R
S
U
V
MILLIMETERS
MIN
MAX
1.90
2.10
2.20
2.40
0.60
0.90
0.17
0.25
0.20
0.35
0.50 BSC
0.40 REF
0.10
0.18
0.00
0.10
3.00
3.20
0_
6_
5_
10 _
0.23
0.34
0.23
0.33
0.37
0.47
0.60
0.80
0.12 BSC
INCHES
MIN
MAX
0.075
0.083
0.087
0.094
0.024
0.035
0.007
0.010
0.008
0.014
0.020 BSC
0.016 REF
0.004
0.007
0.000
0.004
0.118
0.126
0_
6_
5_
10 _
0.010
0.013
0.009
0.013
0.015
0.019
0.024
0.031
0.005 BSC
SOLDERING FOOTPRINT*
3.8
0.15
0.50
0.0197
1.8
0.07
0.30
0.012
1.0
0.0394
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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5
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NL27WZ125/D
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