AD AD822BN Single supply, rail-to-rail low power fet-input op amp Datasheet

a
Single Supply, Rail-to-Rail
Low Power FET-Input Op Amp
AD822
FEATURES
TRUE SINGLE SUPPLY OPERATION
Output Swings Rail to Rail
Input Voltage Range Extends Below Ground
Single Supply Capability from +3 V to +36 V
Dual Supply Capability from 61.5 V to 618 V
HIGH LOAD DRIVE
Capacitive Load Drive of 350 pF, G = 1
Minimum Output Current of 15 mA
EXCELLENT AC PERFORMANCE FOR LOW POWER
800 mA Max Quiescent Current per Amplifier
Unity Gain Bandwidth: 1.8 MHz
Slew Rate of 3.0 V/ms
GOOD DC PERFORMANCE
800 mV Max Input Offset Voltage
2 mV/8C Typ Offset Voltage Drift
25 pA Max Input Bias Current
LOW NOISE
13 nV/√Hz @ 10 kHz
NO PHASE INVERSION
APPLICATIONS
Battery Powered Precision Instrumentation
Photodiode Preamps
Active Filters
12- to 14-Bit Data Acquisition Systems
Medical Instrumentation
Low Power References and Regulators
PRODUCT DESCRIPTION
The AD822 is a dual precision, low power FET input op
amp that can operate from a single supply of +3.0 V to 36 V,
or dual supplies of ± 1.5 V to ± 18 V. It has true single supply
INPUT VOLTAGE NOISE – nV/√Hz
100
CONNECTION DIAGRAM
8-Pin Plastic DIP, Cerdip and SOIC
OUT1
1
8
V+
–IN1
2
7
OUT2
+IN1
3
6
–IN2
V–
4
5
+IN2
AD822
capability with an input voltage range extending below the
negative rail, allowing the AD822 to accommodate input signals
below ground in the single supply mode. Output voltage swing
extends to within 10 mV of each rail providing the maximum
output dynamic range.
Offset voltage of 800 µV max, offset voltage drift of 2 µV/°C,
input bias currents below 25 pA and low input voltage noise
provide dc precision with source impedances up to a Gigaohm.
1.8 MHz unity gain bandwidth, –93 dB THD at 10 kHz and
3 V/µs slew rate are provided with a low supply current of
800 µA per amplifier. The AD822 drives up to 350 pF of direct
capacitive load as a follower, and provides a minimum output
current of 15 mA. This allows the amplifier to handle a wide
range of load conditions. This combination of ac and dc
performance, plus the outstanding load drive capability, results
in an exceptionally versatile amplifier for the single supply user.
The AD822 is available in four performance grades. The A and
B grades are rated over the industrial temperature range of
–40°C to +85°C. There is also a 3 volt grade—the AD822A-3V,
rated over the industrial temperature range. The mil grade is
rated over the military temperature range of –55°C to +125°C
and is available processed on standard military drawing.
The AD822 is offered in three varieties of 8-pin package: plastic
DIP, hermetic cerdip and surface mount (SOIC) as well as die
form.
1V
1V
20µ
s
100
10
5V
90
VOUT
10
0%
1
10
100
1k
FREQUENCY – Hz
10k
Input Voltage Noise vs. Frequency
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
0V
(GND)
1V
Gain of +2 Amplifier; VS = +5, 0, VIN = 2.5 V Sine Centered
at 1.25 Volts, RL = 100 kΩ
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD822–SPECIFICATIONS (V = 0, 5 volts @ T = +258C, V
S
Parameter
DC PERFORMANCE
Initial Offset
Max Offset over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
Open-Loop Gain
Conditions
VO = 0.2 V to 4 V
RL = 100 k
RL = 10 k
TMIN to TMAX
RL = 1 k
TMIN to TMAX
DYNAMIC PERFORMANCE
Unity Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
f = 100 kHz
INPUT CHARACTERISTICS
Common-Mode Voltage Range2
TMIN to TMAX
CMRR
TMIN to TMAX
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage3
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
Min
CM
AD822A
Typ
Max
0.1
0.5
2
2
0.5
2
0.5
VCM = 0 V to 4 V
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
A
500
400
80
80
15
10
RL = 10 k to 2.5 V
VO = 0.25 V to 4.75 V
VO p-p = 4.5 V
VO = 0.2 V to 4.5 V
= 0 V, VOUT = 0.2 V unless otherwise noted)
Min
0.8
1.2
0.1
0.5
2
2
0.5
2
0.5
25
5
20
1000
500
400
80
80
15
10
150
30
AD822B
Typ
Max
10
2.5
10
500
1000
150
80
150
30
15
30
0.8
25
20
mV
mV
µV/°C
pA
nA
pA
nA
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
2
25
21
16
13
2
25
21
16
13
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
18
0.8
18
0.8
fA p-p
fA/√Hz
–93
–93
–93
dB
1.8
210
3
1.8
210
3
1.8
210
3
MHz
kHz
V/µs
1.4
1.8
1.4
1.8
1.4
1.8
µs
µs
0.5
1.3
1.6
3
20
VCM = 0 V to +2 V
0.1
0.5
2
2
0.5
2
1.5
Units
2
25
21
16
13
3
10
–130
–93
–0.2
–0.2
66
66
0.4
0.9
AD822S1
Typ
Max
1000
1.0
1.6
RL = 5 kΩ
Min
20
–130
–93
4
4
80
–0.2
–0.2
69
66
–130
–93
4
4
80
–0.2
66
4
80
mV
mV
µV/°C
pA
dB
dB
V
V
dB
dB
1013||0.5
1013||2.8
1013||0.5
1013||2.8
1013||0.5
1013||2.8
Ω||pF
Ω||pF
ISINK = 20 µA
5
5
5
7
ISOURCE = 20 µA
10
10
14
ISINK = 2 mA
40
40
55
ISOURCE = 2 mA
80
80
110
ISINK = 15 mA
300
300
500
ISOURCE = 15 mA
800
800
1500
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
7
10
14
20
55
80
110
160
500
1000
1500
1900
15
12
10
40
80
300
800
15
12
350
VS+ = 5 V to 15 V
70
70
–2–
7
10
14
20
55
80
110
160
500
1000
1500
1900
1.24
80
15
350
1.6
66
66
1.24
80
350
1.6
70
1.24
80
mA
dB
dB
REV. A
AD822
(VS = 65 volts @ TA = +258C, VCM = 0 V, VOUT = 0 V unless otherwise noted)
Parameter
DC PERFORMANCE
Initial Offset
Max Offset over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
Open-Loop Gain
Conditions
VO = –4 V to 4 V
RL = 100 k
RL = 10 k
TMIN to TMAX
RL = 1 k
TMIN to TMAX
DYNAMIC PERFORMANCE
Unity Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
f = 100 kHz
INPUT CHARACTERISTICS
Common-Mode Voltage Range2
TMIN to TMAX
CMRR
TMIN to TMAX
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage3
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
REV. A
AD822A
Typ
Max
0.1
0.5
2
2
0.5
2
0.5
VCM = –5 V to 4 V
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
Min
400
400
80
80
20
10
RL = 10 k
VO = ± 4.5 V
VO p-p = 9 V
VO = 0 V to ± 4.5 V
Min
0.8
1.5
0.1
0.5
2
2
0.5
2
0.5
25
5
20
1000
400
400
80
80
20
10
150
30
AD822B
Typ
Max
10
2.5
10
400
1000
150
80
150
30
20
30
25
mV
mV
µV/°C
pA
nA
pA
nA
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
2
25
21
16
13
2
25
21
16
13
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
18
0.8
18
0.8
fA p-p
fA/√Hz
–93
–93
–93
dB
1.9
105
3
1.9
105
3
1.9
105
3
MHz
kHz
V/µs
1.4
1.8
1.4
1.8
1.4
1.8
µs
µs
0.5
2
1.6
2
3
25
VCM = –5 V to +2 V
0.1
0.5
2
2
0.5
2
1.5
Units
2
25
21
16
13
3
10
–130
–93
–5.2
–5.2
66
66
0.4
1
AD822S1
Typ
Max
1000
1.0
3
RL = 5 kΩ
Min
25
–130
–93
4
4
80
–5.2
–5.2
69
66
–130
–93
4
4
80
–5.2
66
4
80
mV
mV
µV/°C
pA
dB
dB
V
V
dB
dB
1013||0.5
1013||2.8
1013||0.5
1013||2.8
1013||0.5
1013||2.8
Ω||pF
Ω||pF
ISINK = 20 µA
5
5
5
7
ISOURCE = 20 µA
10
10
14
ISINK = 2 mA
40
40
55
ISOURCE = 2 mA
80
80
110
ISINK = 15 mA
300
300
500
ISOURCE = 15 mA
800
800
1500
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
7
10
14
20
55
80
110
160
500
1000
1500
1900
15
12
10
40
80
300
800
15
12
350
VS+ = 5 V to 15 V
70
70
–3–
7
10
14
20
55
80
110
160
500
1000
1500
1900
1.3
80
15
350
1.6
66
66
1.3
80
350
1.6
70
1.3
80
mA
dB
dB
AD822–SPECIFICATIONS (V = 615 volts @ T = +258C, V
S
Parameter
DC PERFORMANCE
Initial Offset
Max Offset over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
Open-Loop Gain
Conditions
VO = +10 V to –10 V
RL = 100 k
RL = 10 k
TMIN to TMAX
RL = 1 k
TMIN to TMAX
DYNAMIC PERFORMANCE
Unity Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
f = 100 kHz
INPUT CHARACTERISTICS
Common-Mode Voltage Range2
TMIN to TMAX
CMRR
TMIN to TMAX
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage3
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
Min
CM
AD822A
Typ
Max
0.4
0.5
2
2
40
0.5
2
0.5
VCM = 0 V
VCM = –10 V
VCM = 0 V
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
A
500
500
100
100
30
20
RL = 10 k
VO = ± 10 V
VO p-p = 20 V
VO = 0 V to ± 10 V
= 0 V, VOUT = 0 V unless otherwise noted)
Min
AD822B
Typ
Max
2
3
0.3
0.5
2
2
40
0.5
2
0.5
25
5
20
2000
500
500
100
100
30
20
500
45
12
2.5
12
500
2000
500
150
400
45
30
45
2.0
25
20
mV
mV
µV/°C
pA
pA
nA
pA
nA
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
2
25
21
16
13
2
25
21
16
13
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
18
0.8
18
0.8
fA p-p
fA/√Hz
–85
–85
–85
dB
1.9
45
3
1.9
45
3
1.9
45
3
MHz
kHz
V/µs
4.1
4.5
4.1
4.5
4.1
4.5
µs
µs
2
2.5
0.8
1.0
3
25
VCM = –15 V to 12 V
0.4
0.5
2
2
40
0.5
2
1.5
Units
2
25
21
16
13
3
12
–130
–93
–15.2
–15.2
70
70
1.5
2.5
AD822S1
Typ
Max
2000
3
4
RL = 5 kΩ
Min
25
–130
–93
14
14
80
–15.2
–15.2
74
74
–130
–93
14
14
90
–15.2
70
14
90
mV
mV
µV/°C
pA
dB
dB
V
V
dB
dB
1013||0.5
1013||2.8
1013||0.5
1013||2.8
1013||0.5
1013||2.8
Ω||pF
Ω||pF
ISINK = 20 µA
5
5
5
7
ISOURCE = 20 µA
10
10
14
ISINK = 2 mA
40
40
55
ISOURCE = 2 mA
80
80
110
ISINK = 15 mA
300
300
500
ISOURCE = 15 mA
800
800
1500
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
7
10
14
20
55
80
110
160
500
1000
1500
1900
20
15
10
40
80
300
800
20
15
350
VS+ = 5 V to 15 V
7
10
14
20
55
80
110
160
500
1000
1500
1900
1.4
80
70
70
–4–
20
350
1.8
70
70
1.4
80
350
1.8
70
1.4
80
mA
dB
dB
REV. A
AD822
(VS = 0, 3 volts @ TA = +258C, VCM = 0 V, VOUT = 0.2 V unless otherwise noted)
Parameter
DC PERFORMANCE
Initial Offset
Max Offset over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
Open-Loop Gain
Conditions
Min
0.2
0.5
1
2
0.5
2
0.5
VCM = 0 V to +2 V
VO = 0.2 V to 2 V
RL = 100 k
300
300
60
60
10
8
TMIN to TMAX
RL = 10 k
TMIN to TMAX
RL = 1 k
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
DYNAMIC PERFORMANCE
Unity Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
f = 100 kHz
INPUT CHARACTERISTICS
Common-Mode Voltage Range2
TMIN to TMAX
CMRR
TMIN to TMAX
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage3
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
VOL–VEE
TMIN to TMAX
VCC–VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
REV. A
AD822A-3 V
Typ
RL = 10 k to 1.5 V
VO = ± 1.25 V
VO p-p = 2.5 V
VO = 0.2 V to 2.5 V
Max
Units
1
1.5
mV
mV
µV/°C
pA
nA
pA
nA
25
5
20
1000
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
150
30
2
25
21
16
13
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
fA p-p
fA/√Hz
–92
dB
1.5
240
3
MHz
kHz
V/µs
1
1.4
µs
µs
1
2
2
10
RL = 5 kΩ
–130
–93
–0.2
–0.2
60
60
VCM = 0 V to +1 V
2
2
74
1013||0.5
1013||2.8
ISINK = 20 µA
5
ISOURCE = 20 µA
10
ISINK = 2 mA
40
ISOURCE = 2 mA
80
ISINK = 10 mA
200
ISOURCE = 10 mA
500
7
10
14
20
55
80
110
160
400
400
1000
1000
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
1.6
mA
dB
dB
350
70
70
–5–
1.24
80
V
V
dB
dB
Ω||pF
Ω||pF
15
12
VS+ = 3 V to 15 V
mV
mV
µV/°C
pA
dB
dB
AD822–SPECIFICATIONS
AD822
NOTES
1
See standard military drawing for 883B specifications.
2
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (+V S – 1 V) to +VS.
Common-mode error voltage is typically less than 5 mV with the common-mode voltage set at 1 volt below the positive supply.
3
VOL–VEE is defined as the difference between the lowest possible output voltage (V OL) and the minus voltage supply rail (V EE).
VCC–VOH is defined as the difference between the highest possible output voltage (V OH) and the positive supply voltage (V CC).
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD822 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation
Plastic DIP (N) . . . . . . . . . . . . . . Observe Derating Curves
Cerdip (Q) . . . . . . . . . . . . . . . . . . Observe Derating Curves
SOIC (R) . . . . . . . . . . . . . . . . . . . Observe Derating Curves
Input Voltage . . . . . . . . . . . . . . (+VS + 0.2 V) to –(20 V + VS)
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Storage Temperature Range (N) . . . . . . . . . –65°C to +125°C
Storage Temperature Range (Q) . . . . . . . . . –65°C to +150°C
Storage Temperature Range (R) . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD822A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD822S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . +260°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
8-Pin Plastic DIP Package: θJA = 90°C/Watt
8-Pin Cerdip Package: θJA = 110°C/Watt
8-Pin SOIC Package: θJA = 160°C/Watt
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD822 is
limited by the associated rise in junction temperature. For plastic
packages, the maximum safe junction temperature is 145°C. For
the cerdip packages, the maximum junction temperature is 175°C.
If these maximums are exceeded momentarily, proper circuit
WARNING!
ESD SENSITIVE DEVICE
operation will be restored as soon as the die temperature is
reduced. Leaving the device in the “overheated” condition for
an extended period can result in device burnout. To ensure
proper operation, it is important to observe the derating curves
shown in Figure 24.
While the AD822 is internally short circuit protected, this may not
be sufficient to guarantee that the maximum junction temperature
is not exceeded under all conditions. With power supplies ±12
volts (or less) at an ambient temperature of +25°C or less, if the
output node is shorted to a supply rail, then the amplifier will not
be destroyed, even if this condition persists for an extended period.
ORDERING GUIDE
Temperature
Package
Package
Model1
Range
Description
Option
AD822AN
–40°C to +85°C
N-8
AD822BN
–40°C to +85°C
AD822AR
AD822BR
AD822AR-3V
AD822AN-3V
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
AD822A Chips
Standard Military
Drawing2
–40°C to +85°C
8-Pin Plastic
Mini-DIP
8-Pin Plastic
Mini-DIP
8-Pin SOIC
8-Pin SOIC
8-Pin SOIC
8-Pin Plastic
Mini-DIP
Die
–55°C to +125°C
8-Pin Cerdip Q-8
N-8
R-8
R-8
R-8
N-8
NOTES
1
Spice model is available on ADI Model Disc.
2
Contact factory for availability.
METALIZATION PHOTOGRAPH
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
–6–
REV. A
Typical Characteristics–AD822
5
70
VS = 0V, 5V
INPUT BIAS CURRENT – pA
60
NUMBER OF UNITS
50
40
30
20
0
VS = 0V, +5V AND ±5V
VS = ±5V
10
0
–0.5
–5
–0.4
–0.3
–0.2 –0.1
0
0.1
0.2
OFFSET VOLTAGE – mV
0.3
0.4
–5
0.5
–3
–2
–1
0
1
2
COMMON-MODE VOLTAGE – V
3
4
5
Figure 4. Input Bias Current vs. Common-Mode Voltage;
VS = +5 V, 0 V and VS = ± 5 V
Figure 1. Typical Distribution of Offset Voltage (390 Units)
1k
16
VS = ±5V
VS = ±15V
INPUT BIAS CURRENT – pA
14
12
10
% IN BIN
–4
8
6
4
100
10
1
2
0
–12
–10
–8
–6
–4
–2
0
2
4
6
8
0.1
–16
10
–12
–8
OFFSET VOLTAGE DRIFT – µV/°C
–4
0
4
8
12
16
COMMON-MODE VOLTAGE – V
Figure 5. Input Bias Current vs. Common-Mode Voltage;
VS = ± 15 V
Figure 2. Typical Distribution of Offset Voltage Drift
(100 Units)
100k
50
45
10k
INPUT BIAS CURRENT – pA
NUMBER OF UNITS
40
35
30
25
20
15
10
1k
100
10
1
5
0.1
0
0
1
2
3
4
5
6
7
INPUT BIAS CURRENT – pA
8
9
10
20
Figure 3. Typical Distribution of Input Bias Current
(213 Units)
REV. A
40
60
80
100
TEMPERATURE – °C
120
140
Figure 6. Input Bias Current vs. Temperature; VS = 5 V,
VCM = 0
–7–
AD822–Typical Characteristics
10M
40
VS = ±15V
1M
INPUT VOLTAGE – µV
OPEN-LOOP GAIN – V/V
POS RAIL
V S = 0V, 5V
VS = 0V, 3V
100k
RL = 2kΩ
20
RL = 20kΩ
NEG RAIL
0
POS RAIL
POS
RAIL
–20
NEG RAIL
RL = 100kΩ
10k
100
1k
10k
100k
60
0
LOAD RESISTANCE – Ω
120
180
240
300
OUTPUT VOLTAGE FROM SUPPLY RAILS – mV
Figure 7. Open-Loop Gain vs. Load Resistance
Figure 10. Input Error Voltage with Output Voltage within
300 mV of Either Supply Rail for Various Resistive Loads;
VS = ± 5 V
1k
INPUT VOLTAGE NOISE – nV/√Hz
10M
OPEN-LOOP GAIN – V/V
NEG RAIL
–40
V S = ±15V
RL = 100kΩ
1M
100
V S = 0V, 5V
V S = ±15V
RL = 10kΩ
VS = 0V, 5V
100k
V S = ±15V
RL = 600Ω
10
V S = 0V, 5V
10k
–60
1
–40
–20
0
20
40
60
80
TEMPERATURE – °C
100
120
100
FREQUENCY – Hz
1k
10k
Figure 8. Open-Loop Gain vs. Temperature
Figure 11. Input Voltage Noise vs. Frequency
300
–40
RL = 10kΩ
ACL = –1
–50
200
–60
100
R L = 10kΩ
RL = 100kΩ
THD – dB
INPUT VOLTAGE – µV
10
1
140
0
VS = 0V, 3V; V OUT = 2.5Vp-p
–70
–80
VS = ±15V; V OUT = 20Vp-p
–90
VS = ±5V; V OUT = 9V p-p
–100
–200
R L = 600Ω
–100
VS = 0V, 5V; V OUT = 4.5V p-p
–300
–16
–12
–8
–4
0
4
OUTPUT VOLTAGE – V
8
12
–110
100
16
1k
10k
FREQUENCY – Hz
100k
Figure 12. Total Harmonic Distortion vs. Frequency
Figure 9. Input Error Voltage vs. Output Voltage for
Resistive Loads
–8–
REV. A
AD822
100
100
80
80
90
60
60
GAIN
40
40
20
20
RL = 2kΩ
CL = 100pF
0
0
70
100
1k
10k
100k
FREQUENCY – Hz
1M
40
30
20
0
10
COMMON-MODE ERROR VOLTAGE – mV
OUTPUT IMPEDANCE – Ω
10k
100k
1M
10M
5
ACL = +1
VS = ±15V
1
0.1
0.01
1k
10k
100k
FREQUENCY – Hz
1M
4
3
NEGATIVE
RAIL
2
+25 °C
–55 °C
1
+125° C
POSITIVE
RAIL
+125 °C
–55 °C
0
10M
–1
0
1
2
3
COMMON-MODE VOLTAGE FROM SUPPLY RAILS – Volts
Figure 14. Output Impedance vs. Frequency
Figure 17. Absolute Common-Mode Error vs. CommonMode Voltage from Supply Rails (VS – VCM)
+16
OUTPUT SATURATION VOLTAGE – mV
1000
+12
OUTPUT SWING FROM 0 TO ±Volts
1k
Figure 16. Common-Mode Rejection vs. Frequency
10
1%
+8
+4
0.1%
0
0.01%
ERROR
–4
–8
1%
–12
–16
0.0
1.0
2.0
3.0
SETTLING TIME – µs
4.0
100
V S – V OH
V OL – V S
10
0
0.001
5.0
Figure 15. Output Swing and Error vs. Settling Time
REV. A
100
FREQUENCY – Hz
1k
100
VS = 0V, 5V
50
–20
10M
Figure 13. Open-Loop Gain and Phase Margin vs.
Frequency
100
VS = ±15V
VS = 0V, 3V
60
10
–20
10
PHASE MARGIN IN DEGREES
OPEN-LOOP GAIN – dB
PHASE
COMMON-MODE REJECTION – dB
80
0.01
0.1
1
LOAD CURRENT – mA
10
100
Figure 18. Output Saturation Voltage vs. Load Current
–9–
AD822–Typical Characteristics
100
90
ISOURCE = 10mA
POWER SUPPLY REJECTION – dB
OUTPUT SATURATION VOLTAGE – mV
1000
ISINK = 10mA
100
ISOURCE = 1mA
ISINK = 1mA
10
ISOURCE = 10µA
ISINK = 10µA
80
70
60
+PSRR
50
40
30
–PSRR
20
10
1
–60
0
–40
–20
0
20
40
60
80
100
120
140
10
100
1k
TEMPERATURE – °C
Figure 19. Output Saturation Voltage vs. Temperature
1M
10M
Figure 22. Power Supply Rejection vs. Frequency
80
30
RL = 2k
70
25
VS = ±15V
VS = ±15V
60
50
OUTPUT VOLTAGE – V
SHORT CIRCUIT CURRENT LIMIT – mA
10k
100k
FREQUENCY – Hz
–OUT
VS = ±15V
40
VS = 0V, 5V
30
+
VS = 0V, 3V
–
–
20
VS = 0V, 5V
10
+
+
VS = 0V, 3V
20
15
10
5
VS = 0V, 5V
VS = 0V ,3V
0
–60
–20
–40
0
20
40
60
80
TEMPERATURE – °C
100
120
0
10k
140
Figure 20. Short Circuit Current Limit vs. Temperature
1600
2.4
(PLASTIC) T JMAX = 145 °C
(HERMETIC) T JMAX = 175 °C
TOTAL POWER DISSIPATION – Watts
2.2
T = +25 °C
1200
T = –55° C
1000
800
600
400
200
2.0
1.8
1.6
1.4
8-PIN MINI-DIP
(PLASTIC)
1.0
0.8
0.4
–60
0
4
8
12
16
20
24
28
30
36
8-PIN SOIC
(PLASTIC)
–40
–20
0
20
40
60
80
100
120
140
AMBIENT TEMPERATURE – °C
TOTAL SUPPLY VOLTAGE – Volts
Figure 21. Quiescent Current vs. Supply Voltage vs.
Temperature
8-PIN CERDIP
(HERMETIC)
1.2
0.6
0
10M
Figure 23. Large Signal Frequency Response
T = +125° C
1400
QUIESCENT CURRENT – µA
100k
1M
FREQUENCY – Hz
Figure 24. Maximum Power Dissipation vs. Temperature
for Plastic and Hermetic Packages
–10–
REV. A
AD822
VOUT
–70
20kΩ
+VS
2.2kΩ
–80
0.1µF
2
CROSSTALK – dB
–90
20V p-p
3
–100
1µF
6
8
1/2
AD822
1
7
5kΩ
1/2
AD822 5
5kΩ
VIN
–110
CROSSTALK = 20 LOG
–120
VOUT
10V IN
0.1µF
1µF
–VS
–130
Figure 28. Crosstalk Test Circuit
–140
300
1k
3k
10k
30k
FREQUENCY – Hz
100k
300k
1M
Figure 25. Crosstalk vs. Frequency
5V
5µs
100
90
+VS
0.01µF
8
1/2
AD822
VIN
4
0.01µF
RL
100pF
VOUT
10
–V S
0%
Figure 26. Unity-Gain Follower
5V
Figure 29. Large Signal Response Unity Gain Follower;
VS = ± 15 V, RL = 10 kΩ
10µs
10mV
100
100
90
90
10
10
0%
0%
Figure 27. 20 V p-p, 25 kHz Sine Wave Input; Unity Gain
Follower; RL = 600 Ω, VS = ± 15 V
REV. A
500ns
Figure 30. Small Signal Response Unity Gain Follower;
VS = ± 15 V, RL = 10 kΩ
–11–
AD822
1V
2µs
1V
100
100
90
90
10
GND
2µs
10
0%
GND 0%
Figure 31. VS = +5 V, 0 V; Unity Gain Follower Response
to 0 V to 4 V Step
Figure 34. VS = +5 V, 0 V; Unity Gain Follower Response
to 0 V to 5 V Step
10mV
2µs
100
+VS
90
0.01µF
8
VIN
1/2
AD822
RL
4
100pF
VOUT
10
GND
0%
Figure 35. VS = +5 V, 0 V; Unity Gain Follower Response,
to 40 mV Step Centered 40 mV Above Ground, RL = 10 kΩ
Figure 32. Unity Gain Follower
10mV
10k
20k
2µs
100
VIN
90
VOUT
+VS
0.01µF
8
1/2
AD822
4
RL
100pF
10
GND
Figure 33. Gain of Two Inverter
0%
Figure 36. VS = +5 V, 0 V; Gain of Two Inverter Response
to 20 mV Step, Centered 20 mV Below Ground, RL = 10 kΩ
–12–
REV. A
AD822
1V
2µs
1V
2µs
100
90
100
90
10
GND
0%
1V
10
GND
0%
a
1V
1V
10µs
100
+VS
90
GND
0%
Figure 37. VS = +5 V, 0 V; Gain of Two Inverter Response
to 2.5 V Step Centered –1.25 V Below Ground, RL = 10 kΩ
10
1V
500mV
10µs
b.
100
+5V
90
RP
V
IN
VOUT
10
GND
0%
Figure 39. (a) Response with RP = 0; VIN from 0 to +VS
(b) VIN = 0 to +VS + 200 mV
VOUT = 0 to +VS
RP = 49.9 kΩ
Figure 38. VS = 3 V, 0 V; Gain of Two Inverter, VIN = 1.25 V,
25 kHz, Sine Wave Centered at –0.75 V, RL = 600 Ω
APPLICATION NOTES
INPUT CHARACTERISTICS
In the AD822, n-channel JFETs are used to provide a low
offset, low noise, high impedance input stage. Minimum input
common-mode voltage extends from 0.2 V below –VS to 1 V
less than +VS. Driving the input voltage closer to the positive
rail will cause a loss of amplifier bandwidth (as can be seen by
comparing the large signal responses shown in Figures 31 and
34) and increased common-mode voltage error as illustrated in
Figure 17.
The AD822 does not exhibit phase reversal for input voltages
up to and including +VS. Figure 39a shows the response of an
AD822 voltage follower to a 0 V to +5 V (+VS) square wave
input. The input and output arc superimposed. The output
tracks the input up to +VS without phase reversal. The reduced
bandwidth above a 4 V input causes the rounding of the output
wave form. For input voltages greater than +VS, a resistor in
series with the AD822’s noninverting input will prevent phase
reversal, at the expense of greater input voltage noise. This is
illustrated in Figure 39b.
REV. A
Since the input stage uses n-channel JFETs, input current
during normal operation is negative; the current flows out from
the input terminals. If the input voltage is driven more positive
than +VS – 0.4 V, the input current will reverse direction as
internal device junctions become forward biased. This is
illustrated in Figure 4.
A current limiting resistor should be used in series with the
input of the AD822 if there is a possibility of the input voltage
exceeding the positive supply by more than 300 mV, or if an
input voltage will be applied to the AD822 when ± VS = 0. The
amplifier will be damaged if left in that condition for more than
10 seconds. A 1 kΩ resistor allows the amplifier to withstand up
to 10 volts of continuous overvoltage, and increases the input
voltage noise by a negligible amount.
Input voltages less than –VS are a completely different story.
The amplifier can safely withstand input voltages 20 volts below
the minus supply voltage as long as the total voltage from the
positive supply to the input terminal is less than 36 volts. In
addition, the input stage typically maintains picoamp level input
currents across that input voltage range.
–13–
AD822
The AD822 is designed for 13 nV/√Hz wideband input voltage
noise and maintains low noise performance to low frequencies
(refer to Figure 11). This noise performance, along with the
AD822’s low input current and current noise means that the
AD822 contributes negligible noise for applications with source
resistances greater than 10 kΩ and signal bandwidths greater
than 1 kHz. This is illustrated in Figure 40.
20mV
90
10
0%
WHENEVER JOHNSON NOISE IS GREATER THAN
AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE
CONSIDERED NEGLIGIBLE FOR APPLICATION.
1kHz
Figure 41. Small Signal Response of AD822 as Unity Gain
Follower Driving 350 pF Capacitive Load
1k
RESISTOR JOHNSON
NOISE
100
5
10
10Hz
4
RF
NOISE GAIN – 1+ –––
RI
INPUT VOLTAGE NOISE – µVRMS
100k
10k
2µ s
100
1
AMPLIFIER GENERATED
NOISE
0.1
10k
100k
1M
10M
100M
SOURCE IMPEDANCE – Ω
1G
3
10G
Figure 40. Total Noise vs. Source Impedance
2
OUTPUT CHARACTERISTICS
The AD822 s unique bipolar rail-to-rail output stage swings
within 5 mV of the minus supply and 10 mV of the positive
supply with no external resistive load. The AD822’s
approximate output saturation resistance is 40 Ω sourcing and
20 Ω sinking. This can be used to estimate output saturation
voltage when driving heavier current loads. For instance, when
sourcing 5 mA, the saturation voltage to the positive supply rail
will be 200 mV, when sinking 5 mA, the saturation voltage to
the minus rail will be 100 mV.
The amplifier’s open-loop gain characteristic will change as a
function of resistive load, as shown in Figures 7 through 10. For
load resistances over 20 kΩ, the AD822’s input error voltage is
virtually unchanged until the output voltage is driven to 180 mV
of either supply.
If the AD822’s output is overdriven so as to saturate either of
the output devices, the amplifier will recover within 2 µs of its
input returning to the amplifier’s linear operating region.
Direct capacitive loads will interact with the amplifier’s effective
output impedance to form an additional pole in the amplifier’s
feedback loop, which can cause excessive peaking on the pulse
response or loss of stability. Worst case is when the amplifier is
used as a unity gain follower. Figure 41 shows the AD822’s
pulse response as a unity gain follower driving 350 pF. This
amount of overshoot indicates approximately 20 degrees of
phase margin—the system is stable, but is nearing the edge.
Configurations with less loop gain, and as a result less loop
bandwidth, will be much less sensitive to capacitance load
effects. Figure 42 is a plot of capacitive load that will result in a
20 degree phase margin versus noise gain for the AD822. Noise
gain is the inverse of the feedback attenuation factor provided
by the feedback network in use.
1
300
1k
3k
10k
CAPACITIVE LOAD FOR 20° PHASE MARGIN – pF
30k
RF
CL
RI
Figure 42. Capacitive Load Tolerance vs. Noise Gain
Figure 43 shows a method for extending capacitance load drive
capability for a unity gain follower. With these component
values, the circuit will drive 5,000 pF with a 10% overshoot.
+VS
0.01µF
8
VIN
100Ω
1/2
AD822
VOUT
0.01µF
4
CL
–VS
20pF
20kΩ
Figure 43. Extending Unity Gain Follower Capacitive Load
Capability Beyond 350 pF
–14–
REV. A
AD822
APPLICATIONS
Single Supply Voltage-to-Frequency Converter
Table I. AD822 In Amp Performance
The circuit shown in Figure 44 uses the AD822 to drive a low
power timer, which produces a stable pulse of width t1. The
positive going output pulse is integrated by R1-C1 and used as
one input to the AD822, which is connected as a differential
integrator. The other input (nonloading) is the unknown
voltage, VIN. The AD822 output drives the timer trigger input,
closing the overall feedback loop.
+10V
U4
REF-02
2
6 VREF = 5V
C5
0.1µF
3
5
CMOS
74HCO4
RSCALE **
10k
4
OUT2
U3B
4
3
U3A
2
R1
VIN
U1
C1
VS = 65 V
CMRR
Common-Mode
Voltage Range
3 dB BW, G = 10
G = 100
tSETTLING
2 V Step (VS = 0 V, 3 V)
5 V (VS = ± 5 V)
Noise @ f = 1 kHz, G = 10
G = 100
ISUPPLY (Total)
74 dB
80 dB
–0.2 V to +2 V –5.2 V to +4 V
180 kHz
180 kHz
18 kHz
18 kHz
2 µs
R3 *
116k
5 µs
270 nV/√Hz
2.2 µV/√Hz
1.15 mA
270 nV/√Hz
2.2 µV/√Hz
1.10 mA
1
OUT1
5µs
U2
CMOS 555
4
6
2
1/2
AD822B
7
499k, 1%
0V TO 2.5V
FULL SCALE
C2
0.01µF, 2%
VS = 3 V, 0 V
C3
0.1µF
0.01µF, 2%
R2
499k, 1%
Parameters
C6
390pF
5%
(NPO)
100
8
V+
R
THR
OUT
TR
DIS
GND
CV
90
3
5
1
C4
0.01µF
10
0%
NOTES:
1V
fOUT = V IN /(VREF*t 1 ), t 1 = 1.1*R3*C6
= 25kHz f S AS SHOWN.
* = 1% METAL FILM, <50ppm/ °C TC
Figure 45a. Pulse Response of In Amp to a 500 mV p-p
Input Signal; VS = +5 V, 0 V; Gain = 10
** = 10%, 20T FILM, <100ppm/° C TC
t1 = 33µs FOR fOUT = 20kHz @ V IN = 2.0V
Figure 44. Single Supply Voltage-to-Frequency Converter
VREF
Typical AD822 bias currents of 2 pA allow megaohm-range
source impedances with negligible dc errors. Linearity errors on
the order of 0.01% full scale can be achieved with this circuit.
This performance is obtained with a 5 volt single supply which
delivers less than 1 mA to the entire circuit.
R1
R2
R3
R4
R5
R6
90k
9k
1k
1k
9k
90k
G =10
G =100
G =100
OHMTEK
PART # 1043
G =10
+V S
0.1µF
Single Supply Programmable Gain Instrumentation Amplifier
The AD822 can be configured as a single supply instrumentation amplifier that is able to operate from single supplies down
to 3 V, or dual supplies up to ± 15 V. Using only one AD822
rather than three separate op amps, this circuit is cost and power
efficient. AD822 FET inputs’ 2 pA bias currents minimize offset
errors caused by high unbalanced source impedances.
An array of precision thin-film resistors sets the in amp gain to
be either 10 or 100. These resistors are laser-trimmed to ratio
match to 0.01%, and have a maximum differential TC of
5 ppm/°C.
REV. A
6
2
VIN1
1/2 8
3 AD822
RP
1kΩ
1
1/2
7
5 AD822
4
RP
VOUT
VIN2
1kΩ
(G =10)
V OUT = (VIN1 –V IN2 ) (1+
R6
) +VREF
R4 + R5
(G =100)
VOUT = (V IN1 –V IN2 ) (1+
R5 + R6
) +VREF
R4
FOR R1 = R6, R2 = R5, AND R3 = R4
Figure 45b. A Single Supply Programmable
Instrumentation Amplifier
–15–
AD822
0.1µF
95.3k
1µF
8
1/2
AD822
3
CHANNEL 1
MYLAR
47.5k
The AD822 can be used for driving a 350 ohm Wheatstone
bridge. Figure 47 shows one half of the AD822 being used to
buffer the AD589—a 1.235 V low power reference. The output
of +4.5 V can be used to drive an A/D converter front end. The
other half of the AD822 is configured as a unity-gain inverter,
and generates the other bridge input of –4.5 V. Resistors R1 and
R2 provide a constant current for bridge excitation. The AD620
low power instrumentation amplifier is used to condition the
differential output voltage of the bridge. The gain of the AD620
is programmed using an external resistor RG, and determined
by:
0.1µF
1
500µF
2
L
4.99k
95.3k
10k
HEADPHONES
32Ω IMPEDANCE
10k
R
4.99k
G=
6
47.5k
1µF
CHANNEL 2
1/2
AD822
5
4
7
500µF
MYLAR
C1821a–10–9/94
Low Dropout Bipolar Bridge Driver
+3V
49.4 kΩ
+1
RG
+VS
49.9k
Figure 46. 3 Volt Single Supply Stereo Headphone Driver
+1.235V
3 Volt, Single Supply Stereo Headphone Driver
The AD822 exhibits good current drive and THD+N performance, even at 3 V single supplies. At 1 kHz, total harmonic
distortion plus noise (THD+N) equals –62 dB (0.079%) for a
300 mV p-p output signal. This is comparable to other single
supply op amps which consume more power and cannot run on
3 V power supplies.
3
AD589
8
1/2
AD822
R1
20Ω
TO A/D CONVERTER
REFERENCE INPUT
1
2
26.4k, 1%
10k
1%
350Ω
+VS
350Ω
7
3
350Ω
350Ω
AD620
RG
2
In Figure 46, each channel s input signal is coupled via a 1 µF
Mylar capacitor. Resistor dividers set the dc voltage at the noninverting inputs so that the output voltage is midway between
the power supplies (+1.5 V). The gain is 1.5. Each half of the
AD822 can then be used to drive a headphone channel. A 5 Hz
high-pass filter is realized by the 500 µF capacitors and the headphones, which can be modeled as 32 ohm load resistors to
ground. This ensures that all signals in the audio frequency
range (20 Hz–20 kHz) are delivered to the headphones.
6
5
4
10k
VREF
–VS
1%
10k
6
1%
5
1/2
AD822
4
7
+VS
–4.5V
R2
20Ω
+5V
0.1µF
GND
1µF
0.1µF
–VS
1µF
+VS
–5V
Figure 47. Low Dropout Bipolar Bridge Driver
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Mini-DIP (N) Package
Cerdip (Q) Package
0.005 (0.13) MIN
8
SOIC (R) Package
0.150 (3.81)
0.055 (1.35) MAX
5
1
8
5
0.31
(7.87)
1
4
0.035±0.01
(0.89±0.25)
0.18±0.03
(4.57±0.76)
0.125
(3.18)
MIN
0.018±0.003
(0.46±0.08)
0.033
(0.84)
NOM
SEATING
PLANE
4
1
0.197 (5.01)
0.189 (4.80)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
0.023 (0.58)
0.014 (0.36)
0.30 (7.62)
REF
0.100 (2.54)
BSC
0.320 (8.13)
0.290 (7.37)
0.011±0.003
(0.28±0.08)
15 °
0°
PIN 1
0.157 (3.99)
0.150 (3.81)
0.405 (10.29) MAX
0.200
(5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.10
(2.54)
BSC
5
0.244 (6.20)
0.228 (5.79)
0.070 (1.78)
0.030 (0.76)
0.39 (9.91) MAX
0.165±0.01
(4.19±0.25)
8
0.310 (7.87)
0.220 (5.59)
4
0.015 (0.38)
0.008 (0.20)
0.102 (2.59)
0.094 (2.39)
0.010 (0.25)
0.004 (0.10)
0.050
(1.27)
BSC
SEATING
PLANE
0.019 (0.48)
0.014 (0.36)
0.020 (0.051) x 45°
CHAMF
0.190 (4.82)
0.170 (4.32)
8°
0°
0.090
(2.29)
10°
0°
0.098 (0.2482)
0.075 (0.1905)
0.030 (0.76)
0.018 (0.46)
0°-15°
–16–
REV. A
PRINTED IN U.S.A.
0.25
(6.35)
PIN 1