LINER LTM8062A 36vin, 5a, 2-quadrant cvcc step-down Datasheet

LTM8052
36VIN, 5A, 2-Quadrant
CVCC Step-Down
µModule Regulator
Features
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Description
Complete Step-Down Switch Mode Power Supply
CVCC: Constant-Voltage Constant-Current
2-Quadrant: Sources and Sinks Output Current
Adjustable Output Current
Wide Input Voltage Range: 6V to 36V
1.2V to 24V Output Voltage
Forced Continuous Operation
Selectable Switching Frequency: 100kHz to 1MHz
(e4) RoHS Compliant Package with Gold Pad Finish
Programmable Soft-Start
Tiny, Low Profile (11.25mm × 15mm × 2.82mm)
Surface Mount LGA Package
The LTM®8052 is a 36VIN, 5A, 2-quadrant constant-voltage,
constant-current (CVCC) step-down μModule® regulator.
Included in the package are the switching controller, power
switches, inductor and support components. Operating
over an input voltage range of 6V to 36V, the LTM8052
supports an output voltage range of 1.2V to 24V. The
LTM8052 is able to sink or source current to maintain
voltage regulation up to the positive and negative current
limits. This output current limit can be set by a control
voltage, a single resistor or a thermistor.
The LTM8052 is packaged in a thermally-enhanced, compact (11.25mm × 15mm × 2.82mm) RoHS compliant,
overmolded land grid array (LGA) package suitable for automated assembly by standard surface mount equipment.
Applications
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Constant-Frequency Voltage Regulation Even at
No Load
Peltier Driver
Battery Tester
Battery/Supercap Charging and Cell Balancing
Motor Drive Power Regulator
High Power LED Drive
PART NUMBER
BEST FOR
LTM8052
Sinking and Sourcing Output Current
LTM8026
Sourcing more than 3A of output current.
(Less than 3A maximum consider LTM8025.)
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7199560, 7321203 and others pending.
Typical Application
±5A, 2.5V (2-Quadrant) µModule Voltage Regulator
Output Voltage vs Output Current
3.5
10µF
510k
RUN
VREF
100µF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
+
SS
OPTIONAL
INPUT
PROTECTION
RT
90.9k
9.09k
330µF
3.0
OUTPUT VOLTAGE (V)
VIN*
6V TO 36V
VOUT
2.5V
±5A
LTM8052
VIN
VOUT
2.5
2.0
1.5
1.0
0.5
*INPUT VOLTAGE PROTECTION MAY BE NECESSARY WHEN THE
LTM8052 IS SINKING CURRENT (SEE APPLICATIONS INFORMATION)
8052 TA01a
0
–10
–5
0
5
10
LOAD CURRENT (A)
8052 TA01b
8052fa
1
LTM8052
Pin Configuration
VIN.............................................................................40V
ADJ, RT, COMP, CTL_I, CTL_T, VREF............................3V
VOUT...........................................................................25V
RUN, SYNC, SS............................................................6V
Current Into RUN Pin.............................................100µA
Internal Operating Temperature Range... –40°C to 125°C
Solder Temperature................................................ 250°C
Storage Temperature.............................. –55°C to 125°C
ADJ
SS
COMP
RT
CTL_T
TOP VIEW
VREF
(Note 1)
CTL_I
Absolute Maximum Ratings
8
7
SYNC
BANK 2 GND
6
RUN
5
4
BANK 1
3
BANK 3
VOUT
2
VIN
1
A
B
C
D
E
F
G
J
H
K
L
LGA PACKAGE
81-LEAD (15mm × 11.25mm × 2.82mm)
TJMAX = 125°C, θJA = 18.6°C/W, θJC(bottom) = 5.4°C/W, θJB = 5.6°C/W, θJC(top) = 10.8°C/W
PCB WEIGHT = 1.4 GRAMS, θ VALUES DERIVED FROM A 4-LAYER 7.62cm × 7.62cm
Order Information
TEMPERATURE RANGE †
LEAD FREE FINISH
TRAY
PART MARKING*
PACKAGE DESCRIPTION
LTM8052EV#PBF
LTM8052EV#PBF
LTM8052V
81-Lead (15mm × 11.25mm × 2.82mm) LGA –40°C to 125°C
LTM8052IV#PBF
LTM8052IV#PBF
LTM8052V
81-Lead (15mm × 11.25mm × 2.82mm) LGA –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
† Refer to Note 3
Electrical Characteristics
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. RUN = 3V, unless otherwise noted. (Note 3)
PARAMETER
Minimum Input Voltage
Output DC Voltage
Output DC Current
Quiescent Current Into VIN
Line Regulation
Load Regulation
Output RMS Voltage Ripple
Switching Frequency
Voltage at ADJ Pin
Current Out of ADJ Pin
RUN Pin Current
CONDITIONS
MIN
TYP
l
IOUT = 1A, RADJ Open
IOUT = 1A, RADJ = 499Ω
CTL_T, CTL_I = 1.5V
VIN = 12V, RUN = 0V
VIN = 12V, No Load
6V < VIN < 36V, IOUT = 1A
VIN = 12V, 0A < IOUT < 5A
VIN = 12V, IOUT = 4.5A
RT = 40.2k
RT = 453k
1.2
24
–6
l
ADJ = 0V, VOUT = 1V
RUN = 1.45V
MAX
6
1.16
0.1
17
0.1
0.7
10
1000
100
1.19
100
5.5
5
3
30
1.22
UNITS
V
V
V
A
µA
mA
%
%
mV
kHz
kHz
V
µA
µA
8052fa
2
LTM8052
Electrical Characteristics
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. RUN = 3V, unless otherwise noted. (Note 3)
PARAMETER
RUN Threshold Voltage (Falling)
RUN Input Hysteresis
CTL_I Control Range
CTL_I Pin Current
CTL_I Positive Current Limit
CONDITIONS
MIN
1.49
CTL_T Control Range
CTL_T Pin Current
CTL_T Positive Current Limit
CTL_T Negative Current Limit
VREF Voltage
SS Pin Current
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Bias Current
CTL_I = 1.5V
CTL_I = 0.75V
CTL_I = 1.5V
CTL_I = 0.75V
5.1
2.24
–8.5
–5.7
0
5.6
2.8
–7.7
–5.1
CTL_T = 1.5V
CTL_T = 0.75V
CTL_T = 1.5V
CTL_T = 0.75V
0.5mA Load
5.1
2.24
–8.5
–5.5
1.93
5.6
2.8
–7.7
–4.9
2
11
fSYNC = 400kHz
fSYNC = 400kHz
SYNC = 0V
1.2
1
1.5VOUT Efficiency
1.8VOUT Efficiency
95
85
85
90
80
80
85
70
65
50
1
2
4
3
OUTPUT CURRENT (A)
75
70
65
60
6VIN
12VIN
24VIN
36VIN
0
EFFICIENCY (%)
90
EFFICIENCY (%)
EFFICIENCY (%)
TA = 25°C, unless otherwise noted.
90
75
6VIN
12VIN
24VIN
36VIN
55
5
8052 G01
50
0
1
UNITS
V
mV
V
µA
A
A
A
A
V
µA
A
A
A
A
V
µA
V
V
µA
Note 3: The LTM8052E is guaranteed to meet performance specifications
from 0°C to 125°C internal operating temperature. Specifications over the
full –40°C to 125°C internal operating temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTM8052I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Typical Performance Characteristics
1.2VOUT Efficiency
1.5
1.5
6.1
3.36
–6.9
–4.5
1.5
1.5
6.1
3.36
–6.9
–4.3
2.04
0.6
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: This µModule regulator includes overtemperature protection that
is intended to protect the device during momentary overload conditions.
Internal temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum internal
operating junction temperature may impair device reliability.
55
MAX
1.61
0
CTL_I Negative Current Limit
60
TYP
1.55
160
2
4
3
OUTPUT CURRENT (A)
80
75
70
65
6VIN
12VIN
24VIN
36VIN
60
55
5
8052 G02
50
0
1
2
4
3
OUTPUT CURRENT (A)
5
8052 G03
8052fa
3
LTM8052
Typical Performance Characteristics
2.5VOUT Efficiency
3.3VOUT Efficiency
5VOUT Efficiency
95
95
100
90
90
95
85
85
75
70
65
6VIN
12VIN
24VIN
36VIN
60
55
50
0
1
2
4
3
OUTPUT CURRENT (A)
90
80
EFFICIENCY (%)
EFFICIENCY (%)
80
EFFICIENCY (%)
TA = 25°C, unless otherwise noted.
75
70
65
6VIN
12VIN
24VIN
36VIN
60
55
50
5
0
1
2
4
3
OUTPUT CURRENT (A)
85
80
75
70
65
55
50
5
8VOUT Efficiency
12VOUT Efficiency
95
90
90
85
85
85
65
10VIN
12VIN
24VIN
36VIN
55
50
0
1
2
4
3
OUTPUT CURRENT (A)
EFFICIENCY (%)
95
90
EFFICIENCY (%)
95
EFFICIENCY (%)
100
60
80
75
70
65
60
50
5
0
1
2
4
3
OUTPUT CURRENT (A)
8052 G07
75
70
65
50
5
–3.3VOUT Efficiency
95
85
85
80
80
EFFICIENCY (%)
EFFICIENCY (%)
90
65
75
70
65
60
60
0
1
2
3
OUTPUT CURRENT (A)
4
8052 G10
2
4
3
OUTPUT CURRENT (A)
50
0
1
2
5
4
3
OUTPUT CURRENT (A)
75
70
65
60
12VIN
24VIN
32.5VIN
55
28VIN
36VIN
55
50
EFFICIENCY (%)
90
70
1
–5VOUT Efficiency
90
75
0
8052 G09
100
80
22VIN
24VIN
36VIN
55
8052 G08
24VOUT Efficiency
5
80
60
15VIN
24VIN
36VIN
55
85
2
4
3
OUTPUT CURRENT (A)
18VOUT Efficiency
100
70
1
8052 G06
100
75
0
8052 G05
8052 G04
80
8VIN
12VIN
24VIN
36VIN
60
12VIN
24VIN
31VIN
55
5
8052 G11
50
0
1
2
4
3
OUTPUT CURRENT (A)
5
8052 G12
8052fa
4
LTM8052
Typical Performance Characteristics
Input Current vs Output Current
1.2VOUT
–12VOUT Efficiency
90
1.0
85
85
0.8
80
80
0.6
75
70
65
60
50
0
1
2
4
3
OUTPUT CURRENT (A)
75
70
65
60
12VIN
24VIN
28VIN
55
INPUT CURRENT (A)
90
EFFICIENCY (%)
EFFICIENCY (%)
–8VOUT Efficiency
TA = 25°C, unless otherwise noted.
55
50
5
1
2
4
3
OUTPUT CURRENT (A)
0.2
0
2
0
–2
OUTPUT CURRENT (A)
–4
4
0.6
0.4
0.2
0
–0.2
–0.4
12VIN
24VIN
36VIN
–6
4
12VIN
24VIN
36VIN
–0.6
–0.8
6
–8
–6
0
–2
–4
2
OUTPUT CURRENT (A)
1.0
0.5
0
–0.5
12VIN
24VIN
36VIN
–1.0
–1.5
6
4
–8
–6
0
–2
2
–4
OUTPUT CURRENT (A)
4
Input Current vs Output Current
5VOUT
5
3
2
6
8052 G18
8052 G17
8052 G16
Input Current vs Output Current
3.3VOUT
6
1.5
INPUT CURRENT (A)
INPUT CURRENT (A)
INPUT CURRENT (A)
0.4
2
0
–2
OUTPUT CURRENT (A)
–4
2.0
0.8
0.6
–6
Input Current vs Output Current
2.5VOUT
1.0
–8
–8
8052 G15
1.2
0.8
–0.6
12VIN
24VIN
36VIN
Input Current vs Output Current
1.8VOUT
1.0
–0.4
–0.2
8052 G14
Input Current vs Output Current
1.5VOUT
–0.2
0
–0.6
5
8052 G13
0.2
–0.4
12VIN
24VIN
0
0.4
Input Current vs Output Current
8VOUT
4
0
–1
–2
12VIN
24VIN
36VIN
–8
–6
2
–4
–2
0
OUTPUT CURRENT (A)
4
3
INPUT CURRENT (A)
1
INPUT CURRENT (A)
INPUT CURRENT (A)
2
1
0
–1
6
8052 G19
–3
–8
–6
0
–2
2
–4
OUTPUT CURRENT (A)
4
1
0
–1
–2
–3
12VIN
24VIN
36VIN
–2
2
12VIN
24VIN
36VIN
–4
6
8052 G20
–5
–8
–6
0
–2
–4
2
OUTPUT CURRENT (A)
4
6
8052 G21
8052fa
5
LTM8052
Typical Performance Characteristics
Input Current vs Output Current
18VOUT
Input Current vs Output Current
12VOUT
3
INPUT CURRENT (A)
INPUT CURRENT (A)
2
1
0
–1
4
4
3
3
2
2
1
0
–1
–2
–2
–3
5
INPUT CURRENT (A)
4
TA = 25°C, unless otherwise noted.
24VIN
36VIN
–6
2
0
–2
OUTPUT CURRENT (A)
–4
–4
6
4
–6
–4
–2
0
2
OUTPUT CURRENT (A)
8052 G22
400
300
200
INPUT CURRENT (A)
INPUT CURRENT (A)
INPUT CURRENT (mA)
5
4
Input Current vs Output Current
–5VOUT
1.0
500
0.5
0
–0.5
–1.0
100
0
10
20
–1.5
40
30
INPUT VOLTAGE (V)
24VIN
12VIN
–6 –5 –4 –3 –2 –1 0 1 2
OUTPUT CURRENT (A)
3
8052 G25
4
1
0
–1
–2
5
24VIN
12VIN
–6
Input Current vs Output Current
–8VOUT
25
IOUT = 4A
IOUT = 3A
IOUT = 2A
IOUT = 1A
1.5
20
–1
INPUT VOLTAGE (V)
INPUT CURRENT (A)
1.0
0.5
24VIN
0
–0.5
–1.0
–1.5
–2
24VIN
12VIN
–6
–4
–2
0
2
OUTPUT CURRENT (A)
4
Minimum Required Input Running
Voltage vs Negative Output Voltage
2.0
0
0
2
–2
OUTPUT CURRENT (A)
8052 G27
Input Current vs Output Current
–12VOUT
1
–4
8052 G26
2
INPUT CURRENT (A)
–5 –4 –3 –2 –1 0 1
2 3
OUTPUT CURRENT (A)
2
1.5
600
–3
–2
8052 G24
Input Current vs Output Current
–3.3VOUT
700
3
–1
8052 G23
Input Current vs Input Voltage
(Output Shorted)
0
36VIN
0
–4
6
4
1
–3
24VIN
36VIN
–3
Input Current vs Output Current
24VOUT
15
10
5
–2.0
4
8052 G28
–2.5
–6
–4
0
–2
OUTPUT CURRENT (A)
2
4
8052 G29
0
0
–5
–10
OUTPUT VOLTAGE (V)
–15
8052 G30
8052fa
6
LTM8052
Typical Performance Characteristics
30
Minimum Required Input Running
Voltage vs Output Voltage,
IOUT = 5A
6.4
TA = 25°C, unless otherwise noted.
Minimum Required Input Voltage
vs Load 3.3VOUT and Below
7.2
Minimum Required Input Voltage
vs Load 5VOUT
7.0
20
15
10
INPUT VOLTAGE (V)
6.2
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
25
6.0
6.8
6.6
5.8
5
0
0
10
15
20
OUTPUT VOLTAGE (V)
5
25
5.6
30
0
1
3
2
LOAD CURRENT (A)
4
6.4
5
0
1
8052 G32
3
2
LOAD CURRENT (A)
4
5
8052 G33
8052 G31
Minimum Required Input Voltage
vs Load 12VOUT
14.4
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
21.5
14.2
9.8
9.6
9.4
9.2
9.0
21.0
14.0
13.8
13.6
0
1
3
2
LOAD CURRENT (A)
4
13.2
5
Minimum Required Input Voltage
vs Load 24VOUT
0
1
2
3
LOAD CURRENT (A)
26.5
26.0
35
4
5
8052 G37
2
3
LOAD CURRENT (A)
25
20
15
10
0
5
4
TO START
TO RUN
30
5
2
3
LOAD CURRENT (A)
1
Minimum Required Input Voltage
vs Load –5VOUT
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
27.0
0
8052 G36
TO START
TO RUN
30
1
19.0
5
4
Minimum Required Input Voltage
vs Load –3.3VOUT
35
0
20.0
8052 G35
27.5
25.5
20.5
19.5
13.4
8052 G34
28.0
Minimum Required Input Voltage
vs Load 18VOUT
INPUT VOLTAGE (V)
10.0
Minimum Required Input Voltage
vs Load 8VOUT
25
20
15
10
5
0
1
2
3
LOAD CURRENT (A)
4
5
8052 G38
0
0
1
2
3
LOAD CURRENT (A)
4
5
8052 G39
8052fa
7
LTM8052
Typical Performance Characteristics
Minimum Required Input Voltage
vs Load –8VOUT
30
TO START
TO RUN
20
15
10
5
0
1
2
3
4
20
15
10
0
5
60
70
30
20
10
50
3
1
2
3
4
5
1
8052 G41
3
4
5
8052 G42
36VIN
24VIN
12VIN
80
20
2
Temperature Rise vs Load Current
8VOUT
90
30
0
0
LOAD CURRENT (A)
10
0
20
0
4
40
70
60
50
40
30
20
10
0
1
LOAD CURRENT (A)
2
3
4
0
5
0
1
LOAD CURRENT (A)
3
2
LOAD CURRENT (A)
4
5
8052 G43
8052 G44
8052 G45
Temperature Rise vs Load Current
12VOUT
Temperature Rise vs Load Current
18VOUT
Temperature Rise vs Load Current
24VOUT
120
36VIN
24VIN
15VIN
100
TEMPERATURE RISE (°C)
100
80
60
40
100
36VIN
24VIN
80
60
40
20
20
0
0
36VIN
28VIN
90
TEMPERATURE RISE (°C)
120
TEMPERATURE RISE (°C)
2
36VIN
24VIN
12VIN
7VIN
60
40
30
Temperature Rise vs Load Current
5VOUT
TEMPERATURE RISE (°C)
TEMPERATURE RISE (°C)
50
1
0
8052 G40
36VIN
24VIN
12VIN
6VIN
40
10
LOAD CURRENT (A)
Temperature Rise vs Load Current
3.3VOUT
36VIN
24VIN
12VIN
6VIN
50
5
LOAD CURRENT (A)
0
60
TEMPERATURE RISE (°C)
0
Temperature Rise vs Load Current
2.5VOUT
TO START
TO RUN
25
INPUT VOLTAGE (V)
25
INPUT VOLTAGE (V)
Minimum Required Input Voltage
vs Load –12VOUT
TEMPERATURE RISE (°C)
30
TA = 25°C, unless otherwise noted.
80
70
60
50
40
30
20
10
0
1
2
3
4
5
LOAD CURRENT (A)
0
1
2
3
4
5
LOAD CURRENT (A)
8052 G46
8052 G47
0
0
1
3
2
LOAD CURRENT (A)
4
5
8052 G48
8052fa
8
LTM8052
Typical Performance Characteristics
Temperature Rise vs Load Current
–3.3VOUT
80
32.5VIN
24VIN
12VIN
50
40
30
20
10
90
1
2
60
50
40
30
20
3
4
0
5
1
0
2
3
LOAD CURRENT (A)
4
40
30
20
0
1
3
2
LOAD CURRENT (A)
8052 G50
Temperature Rise vs Load Current
–12VOUT
4
5
8052 G51
Switching Frequency vs RT Value
500
24VIN
12VIN
100
50
0
5
8052 G49
120
70
60
10
LOAD CURRENT (A)
450
400
350
80
RT VALUE (kΩ)
TEMPERATURE RISE (°C)
60
40
300
250
200
150
100
20
50
0
1
0
2
3
0
4
0
LOAD CURRENT (A)
0.2
0.6
0.8
0.4
SWITCHING FREQUENCY (MHz)
1.0
8052 G53
8052 G52
CTL_I Voltage vs Maximum
Output Current, CTL_T = 2V
CTL_T Voltage vs Maximum
Output Current, CTL_I = 2V
6
6
4
4
MAXIMUM CURRENT (A)
0
28VIN
24VIN
12VIN
80
10
MAXIMUM CURRENT (A)
0
Temperature Rise vs Load Current
–8VOUT
31VIN
24VIN
12VIN
70
TEMPERATURE RISE (°C)
60
TEMPERATURE RISE (°C)
Temperature Rise vs Load Current
–5VOUT
TEMPERATURE RISE (°C)
70
TA = 25°C, unless otherwise noted.
2
0
–2
–4
–6
–8
2
0
–2
–4
–6
0
0.25
1
0.75
0.5
CTL_I VOLTAGE (V)
1.25
1.5
8052 G54
–8
0
0.25
1
0.75
0.5
CTL_T VOLTAGE (V)
1.25
1.5
8052 G55
8052fa
9
LTM8052
Pin Functions
VOUT (Bank 1): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins. When reverse current is being driven into the
LTM8052’s output by the load, the energy is delivered back
through the LTM8052 and out to the VIN pins. Care must be
taken to prevent excessive voltage if other devices on the
VIN bus cannot absorb this energy. See Input Precautions
in the Applications Information section for more details
and circuit suggestions.
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8052 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8052
is through these pads, so the printed circuit design has a
large impact on the thermal performance of the part. See
the PCB Layout and Thermal Considerations sections for
more details. Return the feedback divider (RADJ) to this net.
VIN (Bank 3): The VIN pins supply current to the LTM8052’s
internal regulator and to the internal power switches. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
CTL_T (Pin D8): Connect a resistor/NTC thermistor network
to the CTL_T pin to reduce the maximum regulated output
current of the LTM8052 in response to temperature. The
maximum control voltage is 1.5V. If this function is not
used, tie this pin to VREF .
CTL_I (Pin E8): The CTL_I pin reduces the maximum
regulated output current of the LTM8052. The maximum
control voltage is 1.5V. If this function is not used, tie
this pin to VREF .
VREF (Pin F8): Buffered 2V Reference Capable of 0.5mA
Drive. It is valid when VIN > 6V and RUN is active high.
RT (Pin G8): The RT pin is used to program the switching
frequency of the LTM8052 by connecting a resistor from
this pin to ground. The Applications Information section of
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. When using the SYNC function, apply a resistor value equivalent to
20% lower than the clock frequency applied to the SYNC
pin. Do not leave this pin open.
COMP (Pin H8): Compensation Pin. This pin is generally
not used. The LTM8052 is internally compensated, but
some rare situations may arise that require a modification to the control loop. This pin connects directly to the
input PWM comparator of the LTM8052. In most cases,
no adjustment is necessary. If this function is not used,
leave this pin open.
SS (Pin J8): Soft-Start Pin. Place an external capacitor to
ground to ramp the output voltage during start-up conditions. The soft-start pin has an 11µA charging current.
ADJ (Pin K8): The LTM8052 regulates its ADJ pin to 1.19V.
Connect the adjust resistor from this pin to ground. The
value of RADJ is given by the equation:
R ADJ =
11.9
VOUT – 1.19
where RADJ is in kΩ.
RUN (Pin L6): The RUN pin acts as an enable pin and turns
on the internal circuitry. It may also be used to implement
a precision UVLO. See the Applications Information section for details. The RUN pin is internally clamped, so it
may be pulled up to a voltage source that is higher than
the absolute maximum voltage of 6V through a resistor,
provided the pin current does not exceed 100µA. Do not
leave this pin open.
SYNC (Pin L7): Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to an
external clock. The RT resistor should be chosen to operate the internal clock at 20% lower than the SYNC pulse
frequency. This pin should be grounded when not in use.
Do not leave this pin floating. When laying out the board,
avoid noise coupling to or from the SYNC trace. See the
Synchronization section in Applications Information.
8052fa
10
LTM8052
Block Diagram
2.2µH
VIN
0.2µF
RSENSE
VOUT
10k
2.2µF
RUN
SS
SYNC
CURRENT
MODE
CONTROLLER
VREF
VIN
CTL_I
INTERNAL
REGULATOR
CTL_T
COMP
10k
2.2nF
GND
RT
ADJ
8026 BD
Operation
The LTM8052 is a standalone nonisolated constant-voltage,
constant-current step-down switching DC/DC power supply that can deliver up to 5A of positive or 6A of negative
output current. This µModule regulator provides a precisely
regulated output voltage programmable via one external
resistor from 1.2V to 24V. The input voltage range is 6V
to 36V. Given that the LTM8052 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current.
The LTM8052 is a 2-quadrant device, meaning that it
can both source and sink current in order to regulate its
output voltage. Most traditional voltage regulators are one
quadrant; that is, they only source current. If the load, for
whatever reason, forces current into a traditional regulator,
the output voltage will typically rise. In a similar situation,
the LTM8052 will sink current to keep the output voltage
in regulation.
It should be clear that the above situation is only possible
if the load is providing energy to the LTM8052 output.
The LTM8052 will be able to maintain the output voltage
at the target regulation point as long as the current from
the load does not exceed its negative current limit. If
the current does exceed the negative current limit, the
LTM8052 output will start to rise. If the output continues
to rise, the LTM8052’s output overvoltage protection
circuitry will turn off the internal power switches, and
the output will be free to rise. If this voltage rises above
the LTM8052 input voltage, current will flow through an
internal diode, and the output will be clamped to a diode
drop above the input.
8052fa
11
LTM8052
Operation
When the LTM8052 is sinking current, it maintains its
output voltage regulation by power conversion, not power
dissipation. This means that the energy provided to the
LTM8052 is in turn delivered to its input power bus. There
must be something on this power bus to accept or use
the energy, or the LTM8052’s input voltage will rise. Left
unchecked, the energy can raise the input voltage above
the absolute maximum voltage and damage the LTM8052.
Please see the Input Precautions section for further details.
For applications where only sourcing current (one quadrant
operation) is desired, use LTM8026.
The LTM8052 operates in forced continuous mode. This
means that the part will not skip cycles when the load
approaches zero amps. This may be particularly useful in
applications where the synchronization function is used,
or any time discontinuous switching is undesirable. The
LTM8052 will not operate in forced continuous mode
when an input UVLO, output OVLO or minimum duty cycle
violation occurs.
As shown in the Block Diagram, the LTM8052 contains a
current mode controller, power switches, power inductor,
and a modest amount of input and output capacitance.
The LTM8052 utilizes fixed frequency, average current
mode control to accurately regulate the inductor current,
independent from the output voltage. This is an ideal solution for applications requiring a regulated current source.
The control loop will regulate the current in the internal
inductor. Once the output has reached the regulation
voltage determined by the resistor from the ADJ pin to
ground, the inductor current will be reduced by the voltage regulation loop.
The output current loop has two control inputs, determined by the voltage at the analog control pins, CTL_I
and CTL_T . CTL_I is typically used to set the maximum
allowable current output of the LTM8052, while CTL_T
is typically used with a NTC thermistor to reduce the
output current in response to temperature. The lower of
the two analog voltages on CTL_I and CTL_T determines
the regulated output current. The analog control range
of both the CTL_I and CTL_T pin is from 0V to 1.5V. As
shown in the Typical Performance Characteristics section,
the positive and negative currents are not symmetric. The
negative current limit is offset by approximately 2A.
The RUN pin functions as a precision shutdown pin. When
the voltage at the RUN pin is lower than 1.55V, switching is terminated. Below the turn-on threshold, the RUN
pin sinks 5.5µA. This current can be used with a resistor
between RUN and VIN to set a hysteresis. During startup, the SS pin is held low until the part is enabled, after
which the capacitor at the soft-start pin is charged with
an 11µA current source.
The LTM8052 is equipped with a thermal shutdown to
protect the device during momentary overload conditions.
It is set above the 125°C absolute maximum internal temperature rating to avoid interfering with normal specified
operation, so internal device temperatures will exceed
the absolute maximum rating when the overtemperature
protection is active. So, continuous or repeated activation
of the thermal shutdown may impair device reliability.
During thermal shutdown, all switching is terminated and
the SS pin is driven low.
The switching frequency is determined by a resistor at
the RT pin. The LTM8052 may also be synchronized to an
external clock through the use of the SYNC pin.
8052fa
12
LTM8052
Applications Information
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RADJ and RT
values.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions. Bear in mind that the maximum
output current is limited by junction temperature, the
relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the
Table 1. Recommended Component Values and Configuration.
(TA = 25°C. See Typical Performance Characteristics for Load Conditions)
VIN
VOUT
CIN
COUT CERAMIC COUT ELECTROLYTIC
6V to 36V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
6V to 36V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
6V to 36V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
6V to 36V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
6V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
7V to 36V
5 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
10V to 36V 8 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
15V to 36V 12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
22V to 36V 18 10µF, 50V, 1210 22µF, 25V, 1210 47µF, 20V, 45mΩ, OS-CON, 20SVPS47M
28V to 36V 24 4.7µF, 50V, 1210 10µF, 50V, 1206 47µF, 35V, 30mΩ, OS-CON, 35SVPC47M
9V to 15V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
9V to 15V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
9V to 15V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
9V to 15V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9V to 15V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9V to 15V
5 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
10V to 15V 8 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
18V to 36V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
18V to 36V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
18V to 36V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
18V to 36V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
18V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
18V to 36V 5 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
18V to 36V 8 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
18V to 36V 12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
2.7V to
–3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
32.5V*
2V to 31V* –5 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
2V to 28V* –8 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
3V to 24V* –12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
*Running voltage. See the Typical Performance Characteristics section for starting requirements.
Note: An input bulk capacitor is required.
RADJ fOPTIMAL RT(OPTIMAL) fMAX RT(MIN)
Open 200kHz
210k
250kHz 169k
38.3k
300kHz
140k
350kHz
118k
19.6k
350kHz
118k
400kHz
102k
9.09k
5.62k
3.09k
1.74k
1.10k
604
523
Open
450kHz
550kHz
600kHz
625kHz
650kHz
675kHz
700kHz
200kHz
90.9k
75.0k
68.1k
64.9k
61.9k
59.0k
57.6k
210k
525kHz
625kHz
700kHz
750kHz
800kHz
900kHz
1MHz
525kHz
78.7k
64.9k
57.6k
53.6k
49.9k
44.2k
39.2k
78.7k
38.3k
300kHz
140k
650kHz
61.9k
19.6k
350kHz
118k
800kHz
49.9k
9.09k
5.62k
3.09k
1.74k
Open
450kHz
550kHz
600kHz
625kHz
200kHz
90.9k
75.0k
68.1k
64.9k
210k
1MHz
1MHz
1MHz
1MHz
250kHz
39.2k
39.2k
39.2k
39.2k
169k
38.3k
300kHz
140k
350kHz
118k
19.6k
350kHz
118k
400kHz
102k
9.09k
5.62k
3.09k
1.74k
1.10k
5.62k
450kHz
550kHz
600kHz
625kHz
650kHz
550kHz
90.9k
75.0k
68.1k
64.9k
61.9k
75.0k
525kHz
625kHz
700kHz
750kHz
800kHz
625kHz
78.7k
64.9k
57.6k
53.6k
49.9k
64.9k
3.09k
1.74k
1.10k
600kHz
625kHz
650kHz
68.1k
64.9k
61.9k
700kHz
750kHz
800kHz
57.6k
53.6k
49.9k
8052fa
13
LTM8052
Applications Information
graphs in the Typical Performance Characteristics section
for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8052 should be allowed to switch is given
in Table 1 in the fMAX column, while the recommended
frequency (and RT value) for optimal efficiency over the
given input condition is given in the fOPTIMAL column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated operating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
necessary. Again, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
Ceramic capacitors are small, robust and have very low ESR.
However, not all ceramic capacitors are suitable. X5R and
X7R types are stable over temperature, applied voltage and
give dependable service. Other types, including Y5V and
Z5U have very large temperature and voltage coefficients
of capacitance. In an application circuit they may have only
a small fraction of their nominal capacitance resulting in
much higher output voltage ripple than expected.
Many of the output capacitances given in Table 1 specify
an electrolytic capacitor. Ceramic capacitors may also be
used in the application, but it may be necessary to use
more of them. Many high value ceramic capacitors have a
large voltage coefficient, so the actual capacitance of the
component at the desired operating voltage may be only
a fraction of the specified value. Also, the very low ESR of
ceramic capacitors may necessitate additional capacitors
for acceptable stability margin.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8052. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8052 circuit is plugged into a live supply, the
14
input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily
avoided; see the Hot Plugging Safely section.
Programming Switching Frequency
The LTM8052 has an operational switching frequency
range between 100kHz and 1MHz. This frequency is
programmed with an external resistor from the RT pin to
ground. Do not leave this pin open under any circumstance.
See Table 2 for resistor values and the corresponding
switching frequencies.
Table 2. RT Resistor Values and Their Resultant Switching
Frequencies
SWITCHING FREQUENCY (MHz)
1
0.75
0.5
0.3
0.2
0.1
RT (kΩ)
39.2
53.6
82.5
140
210
453
In addition, the Typical Performance Characteristics section contains a graph that shows the switching frequency
versus RT value.
Switching Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8052 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8052 in some fault conditions. A frequency that is too
low can result in a final design that has too much output
ripple or too large of an output capacitor.
Switching Frequency Synchronization
The nominal switching frequency of the LTM8052 is
determined by the resistor from the RT pin to GND and
may be set from 100kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through
the SYNC pin. The external clock applied to the SYNC pin
8052fa
LTM8052
Applications Information
must have a logic low below 0.6V, a logic high greater
than 1.2V and frequency between 100kHz and 1MHz. The
input frequency must be 20% higher than the frequency
determined by the resistor at the RT pin. Input signals
outside of these specified parameters may cause erratic
switching behavior and subharmonic oscillations. The
SYNC pin must be tied to GND if synchronization to an
external clock is not required. When SYNC is grounded,
the switching frequency is determined by the resistor at
the RT pin.
current limit can be set as shown in Figure 1 with the
following equation:
Switching Mode
In high current applications, derating the maximum current
based on operating temperature may prevent damage to the
load. In addition, many applications have thermal limitations
that will require the regulated current to be reduced based
on the load and/or board temperature. To achieve this,
the LTM8052 uses the CTL_T pin to reduce the effective
regulated current in the load. While CTL_I programs the
regulated current in the load, CTL_T can be configured to
reduce this regulated current based on the analog voltage
at the CTL_T pin. The load/board temperature derating is
programmed using a resistor network with a temperature
dependant resistance (Figure 2). When the board/load
temperature rises, the CTL_T voltage will decrease. To
reduce the regulated current, the CTL_T voltage must be
lower than the voltage at the CTL_I pin. VCTL_T may be
higher than VCTL_I, but then it will have no effect.
The LTM8052 operates in forced continuous mode. This
means that the part will not skip cycles when the load
approaches zero amps. This may be particularly useful in
applications where the synchronization function is used,
or any time discontinuous switching is undesirable. The
LTM8052 will not operate in forced continuous mode
when an input UVLO, output OVLO or minimum duty cycle
violation occurs.
Soft-Start
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltage ramp minimizes output voltage overshoot, reduces
inrush current from the VIN supply, and facilitates supply
sequencing. A capacitor connected from the SS pin to
GND programs the slew rate. The capacitor is charged
from an internal 11µA current source to produce a ramped
output voltage.
IMAX =
7.467 • R2
Amps (Positive Current )
R1+R2
IMAX = −
7.467 • R2
+ 2.1 Amps (Negative Current )
R1+R2
Load Current Derating Using the CTL_T Pin
VREF
2V
LTM8052
R1
CTL_I OR CTL_T
R2
Maximum Output Current Adjust
To adjust the regulated load current, an analog voltage
is applied to the CTL_I pin or CTL_T pins. Varying the
voltage between 0V and 1.5V adjusts the maximum
current between the minimum and the maximum current,
typically 5.6A positive and 7.7A negative. Graphs of the
output current vs CTL_I and CTL_T voltages are given
in the Typical Performance Characteristics section. The
LTM8052 provides a 2V reference voltage for conveniently
applying resistive dividers to set the current limit. The
8052 F01
Figure 1. Setting the Output Current Limit
RV
RV
VREF
R1
LTM8052
RNTC
RNTC
RX
RNTC
RNTC
RX
CTL_T
8052 F02
R2
(OPTION A TO D)
A
B
C
D
Figure 2. Load Current Derating vs
Temperature Using NTC Resistor
8052fa
15
LTM8052
Applications Information
Voltage Regulation and Output Overvoltage Protection
The LTM8052 uses the ADJ pin to regulate the output
voltage and to provide a high speed overvoltage lockout
to avoid high voltage conditions. If the output voltage
exceeds 125% of the regulated voltage level (1.5V at the
ADJ pin), the LTM8052 terminates switching and shuts
down switching for a brief time before restarting. The
regulated output voltage must be greater than 1.19V and
is set by the equation:

10k 
VOUT = 1.19V  1+
 R ADJ 
where RADJ is shown in Figure 3.
VOUT
VOUT
LTM8052
ADJ
RADJ
8052 F03
Figure 3. Voltage Regulation and Overvoltage Protection
Feedback Connections
In situations where the output of the LTM8052 is required
to sink current (that is, the load is driving current into the
LTM8052 output), the μModule regulator will maintain
voltage regulation as long as the negative current limit is
not exceeded. If the current limit is exceeded, the output
voltage may begin to rise. If the output voltage rises more
than 125% of the target regulation voltage, the output
overvoltage protection will engage, and the LTM8052 will
stop switching. In this situation, the load will be free to
pull up the LTM8052 output. If the voltage exceeds the
LTM8052 input, an internal power diode will clamp the
output to a diode drop above the input.
Thermal Shutdown
If the part is too hot, the LTM8052 engages its thermal
shutdown, terminates switching and discharges the softstart capacitor. When the part has cooled, the part automatically restarts. This thermal shutdown is set to engage at
temperatures above the 125°C absolute maximum internal
operating rating to ensure that it does not interfere with
functionality in the specified operating range. This means
that internal temperatures will exceed the 125°C absolute
maximum rating when the overtemperature protection is
active, possibly impairing the device’s reliability.
UVLO and Shutdown
The LTM8052 has an internal UVLO that terminates switching, resets all logic, and discharges the soft-start capacitor
when the input voltage is below 6V. The LTM8052 also has
a precision RUN function that enables switching when the
voltage at the RUN pin rises to 1.68V and shuts down the
LTM8052 when the RUN pin voltage falls to 1.55V. There
is also an internal current source that provides 5.5μA of
pull-down current to program additional UVLO hysteresis.
For RUN rising, the current source is sinking 5.5µA until
RUN = 1.68V, after which the current source turns off.
For RUN falling, the current source is off until the RUN =
1.55V, after which it sinks 5.5µA. The following equations
determine the voltage divider resistors for programming
the falling UVLO voltage and rising enable voltage (VENA)
as configured in Figure 4.
R1=
1.55V •R2
UVLO– 1.55V
R2 =
VENA – 1.084 •UVLO
5.5µA
The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
VIN
LTM8052
VIN
R2
RUN
R1
8052 F04
Figure 4. UVLO Configuration
8052fa
16
LTM8052
Applications Information
Input Precautions
When the LTM8052 is sinking current, it maintains its
output voltage regulation by power conversion, not power
dissipation. This means that the energy provided to the
LTM8052 is in turn delivered to its input power bus.
There must be something on this power bus to accept or
use the energy, or the LTM8052’s input voltage will rise.
Left unchecked, the energy can raise the input voltage
above the absolute maximum voltage rating and damage
the LTM8052.
In many cases, the system load on the LTM8052 input
bus will be sufficient to absorb the energy delivered by the
μModule regulator. The power required by other devices
will consume more than enough to make up for what the
LTM8052 delivers. In cases where the LTM8052 is the
largest or only power converter, this may not be true and
some means may be need to be devised to prevent the
LTM8052’s input from rising too high. Figure 5a shows a
passive crowbar circuit that will dissipate energy during
momentary input overvoltage conditions. The breakdown
voltage of the zener diode is chosen in conjunction with
the resistor R to set the circuit’s trip point. The trip point
is typically set well above the maximum VIN voltage under
normal operating conditions. This circuit does not have a
precision threshold, and is subject to both part-to-part and
temperature variations, so it is not suitable for applications
where high accuracy is required or large voltage margins
are not available.
The circuit in Figure 5b also dissipates energy during momentary overvoltage conditions, but is more precise than
that in Figure 5a. It uses an inexpensive comparator and
the VREF output of the LTM8052 to establish a reference
voltage. The optional hysteresis resistor in the comparator
circuit avoids MOSFET chatter. Figure 5c shows a circuit
that latches on and crowbars the input in an overvoltage
event. The SCR latches when the input voltage threshold
is exceeded, so this circuit should be used with a fuse, as
shown, or employ some other method to interrupt current
from the load.
As mentioned, the LTM8052 sinks current by energy
conversion and not dissipation. Thus, no matter what
protection circuit that is used, the amount of power that the
protection circuit must absorb depends upon the amount
of power at the input. For example, if the output voltage is
2.5V and can sink 5A, the input protection circuit should
be designed to absorb at least 7.5W. In Figures 5a and 5b,
let us say that the protection activation threshold is 30V.
Then the circuit must be designed to be able to dissipate
7.5W and accept 7.5W/30V = 250mA.
LOAD
CURRENT
VIN
ZENER
DIODE
Q
VOUT
LTM8052
GND
SOURCING
LOAD
R
8052 F05a
Figure 5a. The MOSFET Q Dissipates Momentary Energy to
GND. The Zener Diode and Resistor Are Chosen to Ensure That
the MOSFET Turns On Above the Maximum VIN Voltage Under
Normal Operation
LOAD
CURRENT
OPTIONAL
HYSTERESIS
RESISTOR
Q
+
–
VIN
VOUT
LTM8052
VREF GND
SOURCING
LOAD
8052 F05b
Figure 5b. The Comparator in This Circuit Activates the Q
MOSFET at a More Precise Voltage Than the One Shown in
Figure 5a. The Reference for the Comparator is Derived from
the VREF Pin of the LTM8052
8052fa
17
LTM8052
Applications Information
capacitance must absorb is 1/2 LI2 = 27.5μJ. Suppose
the comparator circuit in Figure 5d is set to pull the RUN
pin down when VTRIP = 15V. The input voltage will rise
according to the capacitor energy equation:
Figures 5a through 5c are crowbar circuits, which attempt
to prevent the input voltage from rising above some level
by clamping the input to GND through a power device. In
some cases, it is possible to simply turn off the LTM8052
when the input voltage exceeds some threshold. This
is possible when the voltage power source that drives
current into VOUT never exceeds VIN. An example of this
circuit is shown in Figure 5d. When the power source on
the output drives VIN above a predetermined threshold,
the comparator pulls down on the RUN pin and stops
switching in the LTM8052. When this happens, the input
capacitance needs to absorb the energy stored within the
LTM8052’s internal inductor, resulting in an additional
voltage rise. As shown in the Block Diagram, the internal
inductor value is 2.2uH. If the LTM8052 negative current
limit is set to 5A, for example, the energy that the input
1
C (VIN 2 − VTRIP 2) = 27.5µJ
2
If the total input capacitance is 10μF, the input voltage
will rise to:
1
27.5µJ = 10µF(VIN 2 − 15V 2)
2
VIN = 15.2V
For applications where only sourcing current (one quadrant
operation) is desired, use LTM8026.
LOAD
CURRENT
VIN
SCR
ZENER
DIODE
VOUT
FUSE
LTM8052
GND
SOURCING
LOAD
8052 F05a
Figure 5c. The SCR Latches On When the Activation Threshold is
Reached, So a Fuse or Some Other Method of Disconnecting the
Load Should be Used
LOAD
CURRENT
VIN
VOUT
LTM8052
RUN
10µF
–
+
GND
SOURCING
LOAD
EXTERNAL
REFERENCE
VOLTAGE
8052 F05d
Figure 5d. This Comparator Circuit Turns Off the LTM8052 if
the Input Rises Above a Predetermined Threshold. When the
LTM8052 Turns Off, the Energy Stored in the Internal Inductor
Will Raise VIN a Small Amount Above the Threshold.
8052fa
18
LTM8052
Applications Information
No Output Current Sharing
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8052.
The LTM8052 is a two quadrant device, able to both sink
and source current to maintain voltage regulation. It is
therefore not suitable for current sharing.
4. Place the CIN and COUT capacitors such that their
ground currents flow directly adjacent or underneath
the LTM8052.
PCB Layout
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8052.
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8052. The LTM8052 is nevertheless a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 6
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
1. Place the RADJ and RT resistors as close as possible to
their respective pins.
•
•
•
•
GND
•
•
•
•
•
•
•
•
•
COUT
VREF
RT
CTL_I
CTL_T
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8052.
•
•
•
•
•
•
•
•
•
•
•
•
SYNC
RUN
•
•
•
•
•
•
•
•
•
•
•
•
•
VIN
VOUT
GND
SS
ADJ
A few rules to keep in mind are:
COMP
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 6. The LTM8052 can benefit from
the heat sinking afforded by vias that connect to internal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
VOUT
CIN
GND
• THERMAL AND INTERCONNECT VIAS
VIN
8052 F06
Figure 6. Layout Showing Suggested External Components,
GND Plane and Thermal Vias.
8052fa
19
LTM8052
Applications Information
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8052. However, these capacitors
can cause problems if the LTM8052 is plugged into a live
input supply (see Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
underdamped tank circuit, and the voltage at the VIN pin
of the LTM8052 can ring to more than twice the nominal
input voltage, possibly exceeding the LTM8052’s rating
and damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8052 into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to VIN, but the most
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the VIN net. This
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit,
though it is physically large.
Thermal Considerations
The LTM8052 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by the LTM8052 mounted to a 58cm2
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
For increased accuracy and fidelity to the actual application, many designers use finite element analysis (FEA) to
predict thermal performance. To that end, Page 2 of the
data sheet typically gives four thermal coefficients:
θJA – Thermal resistance from junction to ambient
θJCbottom – Thermal resistance from junction to the
bottom of the product case
θJCtop – Thermal resistance from junction to top of the
product case
θJB – Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through the
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
θJCtop is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
8052fa
20
LTM8052
Applications Information
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a 2-sided,
2-layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 7.
The blue resistances are contained within the µModule
device, and the green are outside.
The die temperature of the LTM8052 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8052. The bulk of the heat flow out of the LTM8052
is through the bottom of the module and the LGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
AMBIENT
BOARD-TO-AMBIENT
RESISTANCE
8052 F07
µMODULE DEVICE
Figure 7. Thermal Resistances Among µModule Device,
Printed Circuit Board and Environment
8052fa
21
LTM8052
Typical Applications
36VIN, 3.3VOUT Step-Down CVCC Converter
VIN
6V TO 36V
10µF
VIN
510k
VOUT
3.3V
5A
LTM8052
VOUT
RUN
SS
OPTIONAL
INPUT
PROTECTION
+
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
330µF
100µF
5.62k
75.0k
8052 TA02
36VIN, LTM8052 Charges Two 2.5V Series Supercapacitors at 5.6A
VIN
7V TO 36V
10µF
510k
VIN
RUN
SS
OPTIONAL
INPUT
PROTECTION
VOUT
5V
5A
LTM8052
VOUT
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
68.1k
2.5V
2.2F
VREF
47µF
2.5V
2.2F
3.09k
8052 TA03
8052fa
22
LTM8052
Typical Applications
36VIN, 12VOUT Step-Down CVCC Converter
VIN
16V TO 36V
10µF
510k
VIN
RUN
SS
OPTIONAL
INPUT
PROTECTION
VOUT
12V
3.5A
LTM8052
VOUT
+
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
120µF
47µF
1.1k
61.9k
8052 TA04
36VIN, –5VOUT Negative CVCC Converter
VIN
7V TO 31V
10µF
510k
VIN
LTM8052
VOUT
RUN
SS
SYNC
OPTIONAL
INPUT
PROTECTION
VREF
CTL_I
CTL_T
COMP
RT GND ADJ
68.1k
8052 TA05
3.09k
+
120µF
100µF
VOUT
–5V
3A
8052fa
23
LTM8052
Typical Applications
Two LTM8052s Used to Regulate Positive or Negative Voltage
(and Current) Across a Peltier Device
VIN
10V TO 36V
383k
10µF
VOUT
2V TO 8V
VOUT
VIN
RUN LTM8052
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
+
ADJ
118k
PELTIER
100µF
100µF
(OPTIONAL)
330µF
1.74k to
14.7k
VIN
FIXED
5V
VOUT
RUN LTM8052
SS
VREF
10µF
SYNC
CTL_I
COMP
CTL_T
RT
GND
68.1k
ADJ
+
100µF
120µF
3.09k
8052 TA06
Stack Two LTM8052s to Charge and Actively Balance Supercapacitors (or Batteries)
VIN
8.5V TO 36V
383k
10µF
RUN LTM8052
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
90.9k
VIN
10µF
VOUT
VOUT
VIN
ADJ
2.5V SUPERCAP
47µF
9.09k
VOUT
RUN LTM8052
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
90.9k
ADJ
2.5V SUPERCAP
47µF
9.09k
8052 TA07
8052fa
24
1.905
3.175
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
aaa Z
0.630 ±0.025 Ø 81x
0.635
PACKAGE TOP VIEW
E
0.635
4
1.905
Y
X
D
6.350
5.080
0.000
5.080
6.350
aaa Z
2.45 – 2.55
SYMBOL
A
b
D
E
e
F
G
aaa
bbb
eee
0.15
0.10
0.05
MAX
2.92
0.66
A
NOTES
DETAIL B
TOTAL NUMBER OF LGA PADS: 81
NOM
2.82
0.63
15.0
11.25
1.27
12.70
8.89
DIMENSIONS
0.27 – 0.37
SUBSTRATE
eee S X Y
MIN
2.72
0.60
DETAIL A
DIA (0.630) 81x
DETAIL B
MOLD
CAP
Z
4.445
4.445
(Reference LTC DWG # 05-08-1868 Rev Ø)
// bbb Z
PAD “A1”
CORNER
3.175
LGA Package
81-Lead (15mm × 11.25mm × 2.82mm)
e
b
7
5
G
4
e
3
PACKAGE BOTTOM VIEW
6
2
1
L
K
J
H
G
F
E
D
C
B
A
3
SEE NOTES
PAD 1
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
LGA 81 0310 REV Ø
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
6. THE TOTAL NUMBER OF PADS: 81
5. PRIMARY DATUM -Z- IS SEATING PLANE
LAND DESIGNATION PER JESD MO-222, SPP-010
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
F
b
8
DETAIL A
LTM8052
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
8052fa
25
LTM8052
Package Description
Table 3. Pin Assignment Table (Arranged by Pin Number)
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
A1
VOUT
B1
VOUT
C1
VOUT
D1
VOUT
E1
GND
F1
GND
A2
VOUT
B2
VOUT
C2
VOUT
D2
VOUT
E2
GND
F2
GND
A3
VOUT
B3
VOUT
C3
VOUT
D3
VOUT
E3
GND
F3
GND
A4
VOUT
B4
VOUT
C4
VOUT
D4
VOUT
E4
GND
F4
GND
A5
GND
B5
GND
C5
GND
D5
GND
E5
GND
F5
GND
A6
GND
B6
GND
C6
GND
D6
GND
E6
GND
F6
GND
A7
GND
B7
GND
C7
GND
D7
GND
E7
GND
F7
GND
A8
GND
B8
GND
C8
GND
D8
CTL_T
E8
CTL_I
F8
VREF
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
G1
GND
–
–
J1
VIN
K1
VIN
L1
VIN
G2
GND
–
–
J2
VIN
K2
VIN
L2
VIN
G3
GND
–
–
J3
VIN
K3
VIN
L3
VIN
G4
GND
–
–
–
–
–
–
–
–
G5
GND
H5
GND
J5
GND
K5
GND
L5
GND
G6
GND
H6
GND
J6
GND
K6
GND
L6
RUN
G7
GND
H7
GND
J7
GND
K7
GND
L7
SYNC
G8
RT
H8
COMP
J8
SS
K8
ADJ
L8
GND
Package Photo
8052fa
26
LTM8052
Revision History
REV
DATE
DESCRIPTION
A
3/12
Modified the Description section.
PAGE NUMBER
1
Updated the Absolute Maximum Ratings and Pin Configuration sections.
2
Corrected the pin name on schematics using two LTM8052s.
24
Updated the Related Parts table.
28
8052fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTM8052
Typical Application
36VIN, 3.3VOUT Step-Down Converter with 4.75A Accurate Current Limit
VIN
6V TO 36V
10µF
VIN
510k
LTM8052
VOUT
VOUT
3.3V
4.75A
RUN
SS
OPTIONAL
INPUT
PROTECTION
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
75k
5.62k
100µF
+
330µF
71.5k
127k
8052 TA08
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTM8026
36VIN, 5A Step-Down µModule Regulator with
Adjustable Current Limit
6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, Adjustable Current Limit, Parallelable
Outputs, CLK Input, 11.25mm × 15mm × 2.82mm LGA Package
LTM8025
36VIN, 3A Step-Down µModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, CLK Input, 9mm × 15mm × 4.32mm
LGA Package
LTM8062/
LTM8062A
32VIN, 2A µModule Battery Charger with Maximum
Peak Power Tracking (MPPT)
Adjustable VBATT up to 14.4V (18.8V for the LTM8062A), C/10 or Timer
Termination, 9mm × 15mm × 4.32mm LGA Package
LTM8027
60VIN, 4A DC/DC Step-Down µModule Regulator
4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, 15mm × 15mm × 4.32mm LGA Package
LTM4613
EN55022B Compliant 36VIN, 8A Step-Down µModule
Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, Synchronizable, Parallelable,
15mm × 15mm × 4.32mm LGA Package
8052fa
28 Linear Technology Corporation
LT 0312 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
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