LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 LM3525 Single Port USB Power Switch and Over-Current Protection Check for Samples: LM3525 FEATURES DESCRIPTION • • • The LM3525 provides Universal Serial Bus standard power switch and over-current protection for all host port applications. The single port device is ideal for Notebook PC and Handheld PC applications that supply power to one port. 1 2 • • • • • • • • • • Compatible with USB1.1 and USB 2.0 1 ms Fault Flag Delay During Hot-Plug Events Smooth Turn-On Eliminates Inrush Induced Voltage Drop UL Recognized Component: REF # 205202 1A Nominal Short Circuit Output Current Protects Notebook PC Power Supplies Thermal Shutdown Protects Device in Direct Short Condition 500mA Minimum Continuous Load Current Small SOIC-8 Package Minimizes Board Space 2.7V to 5.5V Input Voltage Range Switch Resistance ≤ 120 mΩ Max. at VIN = 5V 1µA Max Standby Current 100 µA Max Operating Current Undervoltage Lockout (UVLO) A 1 ms delay on fault flag output prevents erroneous overcurrent reporting caused by inrush currents during the hot-plug events. The LM3525 accepts an input voltage between 2.7V and 5.5V allowing use as a device-based inrush current limiter for 3.3V USB peripherals, as well as Root and Self-Powered Hubs at 5.5V. The Enable input accepts both 3.3V and 5.0V logic thresholds. The small size, low RON, and 1 ms fault flag delay make the LM3525 a good choice for root hubs as well as ganged power control in space-critical selfpowered hubs. APPLICATIONS • • • • • Universal Serial Bus (USB) Root Hubs including Desktop and Notebook PC USB Monitor Hubs Other Self-Powered USB Hub Devices High Power USB Devices Requiring Inrush Limiting General Purpose High Side Switch Applications Typical Operating Circuit and Connection Diagram 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LM3525 SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 www.ti.com Figure 1. LM3525M-L Figure 2. LM3525M-H These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage −0.3V to 6.0V Output Voltage −0.3V to 6.0V Voltage at All Other Pins −0.3V to 5.5V Power Dissipation (TA = 25°C) (3) TJMAX (1) (2) (3) 700 mW (3) 150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. Products are not tested under negative Absolute Maximum conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX (maximum junction temperature), θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDMAX = (TJMAX − TA)/θJA or the number given in the Absolute Maximum Ratings, which ever is lower. The thermal resistance θJA of the LM3525 in the SOIC-8 package is 150°C/W. Operating Ratings Supply Voltage Range 2.7 to 5.5V −40°C to +85°C Operating Ambient Range Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 5 seconds) 260°C ESD Rating (1) (1) 2 2 kV The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 DC Electrical Characteristics Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 5.0V, EN = 0V (LM3525-L) or EN = VIN (LM3525-H). Symbol Parameter Conditions Min Typ Max Units 80 120 120 160 mΩ 1.0 1.5 A 0.15 10 µA 2.25 3.2 A IFO = 10 mA, VIN = 5V 6 25 IFO = 10 mA, VIN = 2.7V 8 40 IN to Out pins VIN = 5V VIN = 2.7V RON On-Resistance IOUT OUT pins continuous output current ISC Short Circuit Output Current See (1) ILEAK OUT pins Output Leakage Current EN = VIN (LM3525-L) or EN = GND (LM3525-H), OCTHRESH Over-current Threshold RFO FLAG Output Resistance IEN EN/EN Leakage Current EN/EN = 0V or EN/EN = VIN −0.5 VIH EN/EN Input Voltage See (2) 2.4 VIL EN/EN Input Voltage See (2) VUVLO Under-Voltage Lockout VIN = Increasing VIN = Decreasing 1.9 1.8 IDDOFF Supply Current Switch OFF 0.05 1 µA IDDON Supply Current Switch ON 65 100 µA ThSD Overtemperature Shutdown Threshold (1) TJ Increasing TJ Decreasing 135 125 IFH Error Flag Leakage Current VFLAG= 5V 0.1 (1) (2) 0.5 0.5 A Ω 0.5 µA 1.9 1.7 V 0.8 V V °C °C 1 µA Thermal shutdown will protect the device from permanent damage. For the LM3525-L, OFF is EN ≥ 2.4V and ON is EN ≤ 0.8V. For the LM3525-H, OFF is EN ≤ 0.8V and ON is EN ≥ 2.4V AC Electrical Characteristics Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 5.0V. Symbol Parameter Conditions Min Typ Max Units tr OUT Rise Time RL = 10Ω 200 µs tf OUT Fall Time RL = 10Ω 20 µs tON Turn on Delay, EN to OUT RL = 10Ω 200 µs tOFF Turn off Delay, EN to OUT RL = 10Ω 20 µs tOC Over Current Flag Delay RL = 0 1 ms Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 3 LM3525 SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 www.ti.com TYPICAL APPLICATION CIRCUIT PIN DESCRIPTION Pin Number 1 Pin Name Pin Function EN (LM3525-L) Enable (Input): Logic-compatible enable input. EN (LM3525-H) 2 FLG Fault Flag (Output): Active-low, open-drain output. Indicates overcurrent, UVLO and thermal shutdown. 3 GND Ground 4, 5 NC Not internally connected. 7 IN Supply Input: This pin is the input to the power switch and the supply voltage for the IC. 6, 8 OUT Switch Output: This pin is the output of the high side switch. Pins 6 & 8 must be tied together. Figure 3. Typical Application Circuit 4 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 Typical Performance Characteristics VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified. RDSON vs VIN RDSON vs Temperature Figure 4. Figure 5. Current Limit vs Temperature Over Current Threshold vs Temperature Figure 6. Figure 7. Delay vs Temperature UVLO Threshold Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 5 LM3525 SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VIN = 5.0V, IL = 500 mA, TA = 25°C unless otherwise specified. 6 Short Circuit Response Under Voltage Lock Out (UVLO) Figure 10. Figure 11. Turn-ON/OFF Delay and Rise Time/Fall Time Short Circuit Current Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 FUNCTIONAL DESCRIPTION The LM3525-H and LM3525-L are high side P-Channel switches with active-high and active-low enable inputs, respectively. Fault conditions turn off and inhibit turn-on of the output transistor and activate the open-drain error flag transistor sinking current to the ground. INPUT AND OUTPUT IN (Input) is the power supply connection to the control circuitry and the source of the output MOSFET. OUT (Output) is the drain of the output MOSFET. In a typical application circuit, current flows through the switch from IN to OUT towards the load. If VOUT is greater than VIN when the switch is enabled, current will flow from OUT to IN since the MOSFET is bidirectional. THERMAL SHUTDOWN LM3525 is internally protected against excessive power dissipation. In the event of a shorted output or heavy loads that could elevate the die temperature to above approximately 135°C, the thermal shutdown circuit of the LM3525 will be activated and the power switch turned off. The switch is turned on after die temperature drops by 10°C. This built-in temperature hysteresis prevents undesirable oscillation of the thermal protection circuit and allows the device to reset itself after it is cooled down. UNDERVOLTAGE LOCKOUT UVLO prevents the MOSFET switch from turning on until input voltage exceeds 1.9V. UVLO shuts off the MOSFET switch and signals the fault flag if input voltage drops below 1.8V. UVLO functions only when device is enabled. CURRENT LIMIT The current limit circuit is designed to protect the system supply, the MOSFET switches and the load from damage caused by excessive currents. The current limit threshold is set internally to allow a minimum of 500 mA through the MOSFET but limit the maximum current to 1.0A typical. FAULT FLAG The fault flag is an open-drain output capable of sinking 10 mA load current to typically 60 mV above ground. The fault flag is active (pulled low) when any of the following conditions are present: undervoltage, current limit, or thermal shutdown. A 1ms delay in reporting fault condition prevents erroneous fault flags and eliminates the need for external RC delay network. Application Information FILTERING The USB specification indicates that “no less than 120 µF tantalum capacitors” must be used on the output of each downstream port. This bulk capacitance provides the short-term transient current needed during a hot plugin. Current surges caused by the input capacitance of the down stream device could generate undesirable EMI signals. Ferrite beads in series with all power and ground lines are recommended to eliminate or significantly reduce EMI. In selecting a ferrite bead, the DC resistance of the wire used must be kept to minimum to reduce the voltage drop. A 0.01 µF ceramic capacitor is recommended on each port directly between the Vbus and ground pins to prevent EMI damage to other components during the hot - detachment. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 7 LM3525 SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 www.ti.com Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hotplug event to less than 330 mV. For a few tens of µs, the host must supply the inrush current to the peripheral, charging its bulk capacitance to Vbus. This current is initially supplied by the input capacitor. A 33 µF 16V tantalum capacitor is recommended. In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the capacitors to minimize the IR drop across the capacitor's ESR. SOFT START To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the inrush current is internally limited to 1.0A. TRANSIENT OVER-CURRENT DELAY In USB applications, it is required that output bulk capacitance is utilized to support hot-plug events. During hotplug events, inrush currents may also cause the flag to go active. Since these conditions are not valid overcurrent faults, the USB controller must ignore the flag during these events. High transient current is also generated when switch is enabled and large values of capacitance at the output have to be rapidly charged. The inrush currents created could exceed the short circuit current limit threshold of the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit current set by the LM3525. The duration of the inrush current depends on the size of the output capacitance and load current. Since this is not a valid fault condition, the LM3525 delays the generation of the fault flag for 1 ms. If condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has elapsed. The LM3525's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required, an RC filter as shown in Figure 14 may be used. Figure 14. Transient Fitter PCB LAYOUT CONSIDERATIONS In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit must be evaluated for its contribution to the circuit performance as shown in Figure 15. The PCB layout rules and guidelines must be followed. • Place the switch as close to the USB connector as possible. Keep all Vbus traces as short as possible and use at least 50-mil, 1 ounce copper for all Vbus traces. Solder plating the traces will reduce the trace resistance. • Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as possible. • Place the output capacitor and ferrite beads as close to the USB connector as possible. • If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection resistance. 8 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 Figure 15. Self-Powered Hub Per-Port Voltage Drop Typical Applications Figure 16. SIngle-Port USB Self-Powered Hub Figure 17. Soft-Start Application Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 9 LM3525 SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 www.ti.com Figure 18. Inrush Current-limit Application 10 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 10 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM3525 11 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM3525M-H NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 3525 M-H LM3525M-H/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3525 M-H LM3525M-L NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 3525 M-L LM3525M-L/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3525 M-L LM3525MX-H NRND SOIC D 8 TBD Call TI Call TI -40 to 125 3525 M-H LM3525MX-H/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3525 M-H LM3525MX-L/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 3525 M-L (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2015 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3525MX-H/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM3525MX-L/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3525MX-H/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM3525MX-L/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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