Fairchild FDS4935 Dual 30v p-channel powertrench mosfet Datasheet

FDS4935
Dual 30V P-Channel PowerTrench MOSFET
General Description
Features
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
• –7 A, –30 V
Applications
• Fast switching speed
• Power management
• High performance trench technology for extremely
low RDS(ON)
RDS(ON) = 23 mΩ @ VGS = –10 V
RDS(ON) = 35 mΩ @ VGS = –4.5 V
• Low gate charge (15nC typical)
• Load switch
• Battery protection
• High power and current handling capability
DD1
DD1
D2
D
5
DD2
6
4
3
Q1
7
SO-8
Pin 1 SO-8
G2
S2 S
G1
S1 G
1
S
Absolute Maximum Ratings
Symbol
8
S
2
Q2
TA=25oC unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
–30
V
VGSS
Gate-Source Voltage
±25
V
ID
Drain Current
–7
A
– Continuous
(Note 1a)
– Pulsed
PD
Power Dissipation for Dual Operation
PD
Power Dissipation for Single Operation
–30
2
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
TJ, TSTG
W
0.9
–55 to +175
°C
(Note 1a)
78
°C/W
(Note 1)
40
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS4935
FDS4935
13’’
12mm
2500 units
2003 Fairchild Semiconductor Corporation
FDS4935 Rev B(W)
FDS4935
June 2001
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
VGS = 0 V, ID = –250 µA
–30
V
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = –250 µA, Referenced to 25°C
VDS = –24 V,
VGS = 0 V
–1
µA
IGSSF
IGSSR
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VGS = –25 V,
VGS = 25 V,
VDS = 0 V
VDS = 0 V
–100
100
nA
nA
–3
V
On Characteristics
–24
mV/°C
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = –250 µA
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA, Referenced to 25°C
4.4
VGS = –10 V,
ID = –7 A
ID = –5.5 A
VGS = –4.5 V,
VGS= –10 V, ID = –7 A, TJ=125°C
19
28
26
ID(on)
On–State Drain Current
VGS = –10 V,
VDS = –5 V
gFS
Forward Transconductance
VDS = –5 V,
ID = –7 A
19
VDS = –15 V,
f = 1.0 MHz
V GS = 0 V,
1233
pF
311
pF
152
pF
–1
–1.6
mV/°C
23
35
34
mΩ
–30
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
(Note 2)
VDD = –15 V,
VGS = –10 V,
ID = –1 A,
RGEN = 6 Ω
13
23
ns
10
20
ns
ns
td(off)
Turn–Off Delay Time
48
77
tf
Turn–Off Fall Time
25
40
ns
Qg
Total Gate Charge
15
21
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDS = –15 V,
VGS = –5 V
ID = –7 A,
4.4
nC
4.5
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
VSD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = –2.1 A
Voltage
(Note 2)
–0.75
–2.1
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 0.5in2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4935 Rev B(W)
FDS4935
Electrical Characteristics
FDS4935
Typical Characteristics
50
VGS = -10V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
2.4
-5.0V
-4.5V
-6.0V
40
-4.0V
30
-3.5V
20
-3.0V
10
0
2.2
VGS = -3.5V
2
1.8
-4.0V
1.6
-4.5V
-5.0V
1.4
-6.0V
1.2
-10V
1
0.8
0
1
2
3
4
5
0
10
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
50
0.08
ID = -7A
VGS = -10V
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
40
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
1.4
1.2
1
0.8
0.6
ID = -3.5A
0.06
0.04
TA = 125oC
0.02
TA = 25oC
0
-50
-25
0
25
50
75
100
125
150
2
4
TJ, JUNCTION TEMPERATURE (oC)
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
50
TA = -55oC
-IS, REVERSE DRAIN CURRENT (A)
100
VDS = -5.0V
-ID, DRAIN CURRENT (A)
30
-ID, DRAIN CURRENT (A)
25oC
40
125oC
30
20
10
0
VGS = 0V
10
TA = 125oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
1
2
3
4
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4935 Rev B(W)
FDS4935
Typical Characteristics
2000
VDS = -5V
ID = -8.8A
f = 1 MHz
VGS = 0 V
1800
-10V
8
1600
CAPACITANCE (pF)
-VGS, GATE-SOURCE VOLTAGE (V)
10
-15V
6
4
1400
CISS
1200
1000
2
800
600
400
COSS
200
0
CRSS
0
0
4
8
12
16
20
24
0
5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
20
25
30
50
P(pk), PEAK TRANSIENT POWER (W)
100µs
RDS(ON) LIMIT
-ID, DRAIN CURRENT (A)
15
Figure 8. Capacitance Characteristics.
100
1ms
10ms
10
100ms
1s
10s
1
DC
VGS = -10V
SINGLE PULSE
RθJA = 135oC/W
0.1
TA = 25oC
0.01
0.1
1
10
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
100
0.01
-VDS, DRAIN-SOURCE VOLTAGE (V)
0.1
1
10
100
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
RθJA = 135 °C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
t1
0.01
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4935 Rev B(W)
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LIFE SUPPORT POLICY
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I2
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