AOSMD AOI4126 100v n-channel mosfet Datasheet

AOD4126/AOI4126
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AOD4126&AOI4126 are fabricated with SDMOSTM
trench technology that combines excellent RDS(ON) with
low gate charge.The result is outstanding efficiency with
controlled switching behavior. This universal technology is
well suited for PWM, load switching and general purpose
applications.
VDS
ID (at VGS=10V)
100V
43A
RDS(ON) (at VGS=10V)
< 24mΩ
RDS(ON) (at VGS = 7V)
< 30mΩ
100% UIS Tested
100% Rg Tested
TO252
DPAK
Top View
Top View
Bottom View
TO-251A
IPAK
D
Bottom View
D
D
D
G
S
G
S
S
G
G
D
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current B
Pulsed Drain Current
Continuous Drain
Current A
C
Units
V
±25
V
A
100
7.5
IDSM
TA=70°C
Maximum
100
30
IDM
TA=25°C
S
D
43
ID
TC=100°C
G
A
6
Avalanche Current C
IAS, IAR
28
A
Avalanche energy L=0.1mH C
TC=25°C
EAS, EAR
39
mJ
Power Dissipation B
TC=100°C
Power Dissipation A
TA=70°C
TA=25°C
Rev1 : May 2012
3
Steady-State
Steady-State
RθJA
RθJC
W
1.9
TJ, TSTG
Symbol
t ≤ 10s
W
50
PDSM
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
100
PD
-55 to 175
Typ
8
35
1
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°C
Max
10
42
1.5
Units
°C/W
°C/W
°C/W
Page 1 of 7
AOD4126/AOI4126
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
100
10
TJ=55°C
50
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±25V
Gate Threshold Voltage
VDS=VGS ID=250µA
2
ID(ON)
On state drain current
VGS=10V, VDS=5V
100
nA
4
V
19
24
36
43
VGS=7V, ID=15A
23.5
30
mΩ
34
1
V
40
A
TJ=125°C
gFS
Forward Transconductance
VDS=5V, ID=20A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
A
0.66
mΩ
S
1400
1770
2200
pF
VGS=0V, VDS=50V, f=1MHz
115
165
214
pF
33
55
80
pF
VGS=0V, VDS=0V, f=1MHz
0.3
0.65
1.0
Ω
14
28
42
nC
4
9
14
nC
10
14
nC
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
µA
100
Static Drain-Source On-Resistance
Output Capacitance
Units
3.3
VGS=10V, ID=20A
Coss
Max
V
VDS=100V, VGS=0V
VGS(th)
RDS(ON)
Typ
VGS=10V, VDS=50V, ID=20A
6
12
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
12
20
26
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
60
82
110
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
4
ns
17
ns
5
ns
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 1 : May 2012
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Page 2 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
60
10V
8V
VDS=5V
7V
50
40
ID(A)
ID (A)
40
6.5V
30
20
20
125°C
VGS=6V
10
25°C
0
0
0
1
2
3
4
3
5
30
6
7
Normalized On-Resistance
2.4
27
VGS=7V
24
21
VGS=10V
18
2.2
VGS=10V
ID=20A
2
1.8
1.6
1.4
VGS=7V
ID=15A
1.2
17
5
2
10
1
0.8
15
0
5
10
15
20
25
30
35
0
40
25
50
75
100
125
150
175
200
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
50
1.0E+02
ID=20A
1.0E+01
1.0E+00
40
IS (A)
40
RDS(ON) (mΩ
Ω)
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
RDS(ON) (mΩ
Ω)
4
125°C
30
125°C
1.0E-01
1.0E-02
25°C
1.0E-03
1.0E-04
20
25°C
1.0E-05
0.0
10
6
7
8
9
10
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 1: May 2012
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Page 3 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
2500
VDS=50V
ID=20A
2000
Capacitance (pF)
VGS (Volts)
8
6
4
Ciss
1500
1000
Coss
2
Crss
500
0
0
0
5
10
15
20
25
Qg (nC)
Figure 7: Gate-Charge Characteristics
30
0
20
40
60
80
VDS (Volts)
Figure 8: Capacitance Characteristics
100
1000
1000.0
10µs
100.0
TJ(Max)=175°C
TC=25°C
800
10.0
100µs
1ms
1.0
10ms
DC
0.1
Power (W)
ID (Amps)
10µs
RDS(ON)
limited
TJ(Max)=175°C
TC=25°C
400
200
0.0
0
0.01
0.1
1
10
VDS (Volts)
100
1000
0.0001
10
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18Junction-toFigure 10: Single Pulse Power Rating
Case (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
17
5
2
10
600
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
40
RθJC=1.5°C/W
1
0.1
PD
Single Pulse
Ton
T
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 1: May 2012
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Page 4 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
Power Dissipation (W)
IAR (A) Peak Avalanche Current
120
TA=25°C
TA=100°C
TA=150°C
90
60
30
TA=125°C
0
10
0
0.000001
0.00001
0.0001
0.001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
(Note C)
25
50
75
100
125
150
TCASE (°
°C)
Figure 13: Power De-rating (Note F)
1000
60
TA=25°C
50
100
40
17
5
2
10
Power (W)
Current rating ID(A)
175
30
10
20
10
1
0
0
Zθ JA Normalized Transient
Thermal Resistance
10
1
25
50
75
100
125
150
TCASE (°
°C)
Figure 14: Current De-rating (Note F)
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
0.01
175
1
1000
Pulse Width (s)
18
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=42°C/W
40
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 1: May 2012
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Page 5 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
24
2
125ºC
125ºC
250
Irm
150
6
125ºC
Qrr
1
0.8
S
50
0.4
4
15
20
25
0
30
0
0
IS (A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
150
30
30
10
Irm
200
400
600
800
1000
di/dt (A/µ
µs)
Figure 19: Diode Reverse Recovery Charge and Peak
Current vs. di/dt
Rev 1: May 2012
18
2.5
25ºC
trr
1.5
12
1
125ºC
6
-2
0
125ºC
Is=20A
2
0
30
3
6
25ºC
25
2
Irm (A)
Qrr (nC)
14
125ºC
20
IS (A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
24
18
25ºC
Qrr
15
30
22
90
10
26
125ºC
120
5
trr (ns)
Is=20A
0.2
25ºC
0
10
0.6
125ºC
25ºC
5
1.2
12
3
60
25ºC
8
100
0
trr
trr (ns)
25ºC
Irm (A)
Qrr (nC)
9
1.6
1.4
16
200
1.8
di/dt=800A/µs
20
12
S
15
di/dt=800A/µs
S
300
S
25ºC
0
0
200
400
0.5
0
600
800
1000
di/dt (A/µ
µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
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Page 6 of 7
AOD4126/AOI4126
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds Isd
Vgs
Ig
Rev 1: May 2012
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 7 of 7
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