ON MC74VHCT00AMEL Quad 2-input nand gate Datasheet

MC74VHCT00A
Quad 2-- Input NAND Gate
The MC74VHCT00A is an advanced high speed CMOS 2--input
NAND gate fabricated with silicon gate CMOS technology. It
achieves high speed operation while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL--type input thresholds and the
output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic--level translator from 3.0 V
CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high--voltage power supply.
The MC74VHCT00A input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHCT00A to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when VCC = 0 V.
These input and output structures help prevent device destruction caused
by supply voltage -- input/output voltage mismatch, battery backup, hot
insertion, etc.
•
•
•
•
•
•
•
•
•
•
http://onsemi.com
MARKING DIAGRAMS
14
VHCT00A
AWLYYWW
1
SOIC--14
D SUFFIX
CASE 751A
14
VHCT
00A
AWLYWW
1
TSSOP--14
DT SUFFIX
CASE 948G
High Speed: tPD = 5.0 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 2 μA (Max) at TA = 25°C
TTL--Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
14
Designed for 3.0 V to 5.5 V Operating Range
VHCT00A
ALYW
1
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
SOIC EIAJ--14
M SUFFIX
CASE 965
Chip Complexity: 48 FETs or 12 Equivalent Gates
These devices are available in Pb--free package(s). Specifications herein
apply to both standard and Pb--free devices. Please see our website at
www.onsemi.com for specific Pb--free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
A
L, WL
Y, YY
W, WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
© Semiconductor Components Industries, LLC, 2006
March, 2006 -- Rev. 3
1
Package
Shipping
MC74VHCT00AD
SOIC--14
48 Units/Rail
MC74VHCT00ADR2
SOIC--14
2500 Units/Reel
MC74VHCT00ADT
TSSOP--14
96 Units/Rail
MC74VHCT00ADTEL
TSSOP--14 2000 Units/Reel
MC74VHCT00ADTR2
TSSOP--14 2000 Units/Reel
MC74VHCT00AM
SOIC
EIAJ--14
48 Units/Rail
MC74VHCT00AMEL
SOIC
EIAJ--14
2000 Units/Reel
Publication Order Number:
MC74VHCT00A/D
MC74VHCT00A
1
A1
VCC
B4
A4
Y4
B3
A3
Y3
14
13
12
11
10
9
8
4
A2
2
3
4
5
6
A1
B1
Y1
A2
B2
Y2
12
A4
7
Figure 1. Pin Assignment
(Top View)
Y3
11
13
B4
GND
8
10
B3
Y2
Y = AB
9
A3
Y1
6
5
B2
1
3
2
B1
Y4
Figure 2. Logic Diagram
FUNCTION TABLE
PIN ASSIGNMENT
Inputs
Output
1
IN A1
A
B
Y
2
IN B1
3
OUT Y1
L
H
L
H
H
H
H
L
4
IN A2
L
L
H
5
IN B2
H
6
OUT Y2
7
GND
8
OUT Y3
A1
1
B1
2
A2
4
B2
5
A3
9
B3
10
9
IN A3
10
IN B3
11
OUT Y4
12
IN A4
13
IN B4
A4
12
14
VCC
B4
13
&
3
Y1
6
Y2
8
Y3
11
Y4
Figure 3. IEC LOGIC DIAGRAM
http://onsemi.com
2
MC74VHCT00A
MAXIMUM RATINGS (Note 1)
Symbol
Value
Unit
VCC
DC Supply Voltage
Characteristics
--0.5 to +7.0
V
VIN
DC Input Voltage
--0.5 to +7.0
V
VOUT
DC Output Voltage
--0.5 to 7.0
--0.5 to VCC + 0.5
V
IIK
Input Diode Current
IOK
Output Diode Current
IOUT
VCC = 0
High or Low State
--20
mA
+20
mA
DC Output Current, per Pin
+25
mA
ICC
DC Supply Current, VCC and GND
+50
mA
PD
Power Dissipation in Still Air,
500
450
mW
TL
Lead temperature, 1 mm from case for 10 s
260
°C
Tstg
Storage temperature
--65 to +150
°C
VESD
ESD Withstand Voltage
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
> 2000
> 200
> 3000
V
ILatch--Up
Latch--Up Performance
(Note 6)
Above VCC and Below GND at 125°C
±300
mA
VOUT < GND; VOUT > VCC
SOIC Packages (Note 2)
TSSOP Package (Note 2)
This device contains
protection circuitry to guard
against damage due to high
static voltages or electric
fields. However, precautions must be taken to
avoid applications of any
voltage higher than maximum rated voltages to this
high--impedance circuit. For
proper operation, Vin and
Vout should be constrained
to the range GND ≤ (Vin or
Vout) ≤ VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either GND or V CC ). Unused outputs must be left
open.
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute--maximum--rated conditions
is not implied.
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute--maximum--rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
2. Derating -- SOIC Packages: –7 mW/_C from 65_ to 125_C
-- TSSOP Package: --6.1 mW/_C from 65_ to 125_C
3. Tested to EIA/JESD22--A114--A
4. Tested to EIA/JESD22--A115--A
5. Tested to JESD22--C101--A
6. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
Max
Unit
VCC
DC Supply Voltage
3.0
5.5
V
VIN
DC Input Voltage
0.0
5.5
V
VOUT
DC Output Voltage
0.0
0.0
5.5
VCC
V
TA
Operating Temperature Range
--55
+125
°C
tr , tf
Input Rise and Fall Time
0
0
100
20
ns/V
VCC = 0
High or Low State
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
http://onsemi.com
3
MC74VHCT00A
The θJA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and
figure below.
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80 ° C
47.9
TJ = 90 ° C
117.8
419,300
TJ = 100 ° C
1,032,200
90
TJ = 110° C
80
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 120° C
Time, Years
TJ = 130 ° C
Time, Hours
NORMALIZED FAILURE RATE
Junction
Temperature °C
1
1
10
100
1000
TIME, YEARS
Figure 4. Failure Rate vs. Time
Junction Temperature
DC ELECTRICAL CHARACTERISTICS
VCC
Symbol
Parameter
Test Conditions
(V)
Min
1.4
2.0
2.0
VIH
Minimum High--Level
Input Voltage
3.0
4.5
5.5
VIL
Maximum Low--Level
Input Voltage
3.0
4.5
5.5
VOH
Minimum High--Level
Output Voltage
VIN = VIH or VIL
VOL
Maximum Low--Level
Output Voltage
VIN = VIH or VIL
TA = 25°C
Typ
TA ≤ 85°C
Max
Min
1.4
2.0
2.0
0.53
0.8
0.8
VIN = VIH or VIL
IOH = --50 μA
3.0
4.5
2.9
4.4
VIN = VIH or VIL
IOH = --4 mA
IOH = --8 mA
3.0
4.5
2.58
3.94
VIN = VIH or VIL
IOL = 50 μA
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
Max
3.0
4.5
0.0
0.0
TA ≤ 125°C
Min
Max
1.4
2.0
2.0
0.53
0.8
0.8
V
0.53
0.8
0.8
2.9
4.4
2.9
4.4
2.48
3.80
2.34
3.66
Unit
V
V
V
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
V
IIN
Maximum Input
Leakage Current
VIN = 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
μA
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
2.0
20
40
μA
ICCT
Quiescent Supply
Current
Input: VIN = 3.4 V
5.5
1.35
1.50
1.65
mA
IOPD
Output Leakage
Current
VOUT = 5.5 V
0.0
0.5
5.0
10
μA
http://onsemi.com
4
MC74VHCT00A
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns
TA = 25°C
Symbol
Parameter
tPLH,
tPHL
Maximum
Propogation Delay,
Input A or B to Y
CIN
Min
TA ≤ 85°C
Typ
Max
Max
Unit
VCC = 3.3 ± 0.3 V
CL = 15 pF
CL = 50 pF
4.1
5.5
10.0
13.5
11.0
15.0
13.0
17.5
ns
VCC = 5.0 ± 0.5 V
CL = 15 pF
CL = 50 pF
3.1
3.6
6.9
7.9
8.0
9.0
9.5
10.5
5.5
10
10
10
Test Conditions
Maximum Input
Capacitance
Min
TA ≤ 125°C
Max
Min
pF
Typical @ 25°C, VCC = 5.0 V
17
CPD
Power Dissipation Capacitance (Note 7)
pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD ¯ VCC ¯ fin + ICC. CPD is used to determine the no--load dynamic
power consumption; PD = CPD ¯ VCC2 ¯ fin + ICC ¯ VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, Measured in SO Package)
TA = 25°C
Characteristic
Symbol
Typ
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.4
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
-- 0.4
-- 0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
TEST POINT
A or B
3.0 V
50%
OUTPUT
DEVICE
UNDER
TEST
GND
tPLH
tPHL
CL*
VOH
Y
50% VCC
VOL
*Includes all probe and jig capacitance
Figure 5. Switching Waveforms
Figure 6. Test Circuit
INPUT
OUTPUT
*
*Parastic Diode
Figure 7. Input Equivalent Circuit
Figure 8. Output Equivalent Circuit
http://onsemi.com
5
MC74VHCT00A
PACKAGE DIMENSIONS
D SUFFIX
SOIC PACKAGE
CASE 751A--03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
--A-14
8
--B-1
P 7 PL
0.25 (0.010)
7
G
0.25 (0.010)
M
T B
F
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
D 14 PL
M
R X 45 _
C
--T-SEATING
PLANE
B
M
S
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.228
0.244
0.010
0.019
DT SUFFIX
TSSOP PACKAGE
CASE 948G--01
ISSUE O
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
--U--
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE --W--.
S
S
DETAIL E
K
A
--V--
K1
J J1
SECTION N--N
--W--
C
0.10 (0.004)
--T-- SEATING
PLANE
D
G
H
DETAIL E
http://onsemi.com
6
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
-----1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
-----0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.020
0.024
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
MC74VHCT00A
M SUFFIX
SOIC EIAJ PACKAGE
CASE 965--01
ISSUE O
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
8
Q1
E HE
L
7
1
M_
DETAIL P
Z
D
VIEW P
A
e
A1
b
0.13 (0.005)
c
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
-----2.05
0.05
0.20
0.35
0.50
0.18
0.27
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
-----1.42
INCHES
MIN
MAX
-----0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
-----0.056
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800--282--9855 Toll Free
Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082--1312 USA
Phone: 480--829--7710 or 800--344--3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2--9--1 Kamimeguro, Meguro--ku, Tokyo, Japan 153--0051
Fax: 480--829--7709 or 800--344--3867 Toll Free USA/Canada
Phone: 81--3--5773--3850
Email: [email protected]
http://onsemi.com
7
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
MC74VHCT00A/D
Similar pages