Intersil ISL8601 Single-phase, pmbus-enabled pwm controller with integrated fet driver Datasheet

ISL8601
®
Data Sheet
PRELIMINARY*
March 23, 2007
FN6449.0
*All functional details and specifications are preliminary and subject to change
Single-Phase, PMBus-Enabled PWM
Controller with Integrated FET Drivers
The ISL8601 is a single-phase PWM controller with integrated
MOSFET drivers utilizing analog voltage mode control. The
ISL8601 features extensive PMBus compliance that enables
rapid and flexible power supply design and comprehensive
product evaluation and testing. Exceptional flexibility in the
customization of operating parameters and system monitoring
functions is provided via the large PMBus command set. The
ISL8601 supports both low-side MOSFET rDS(ON) and
Inductor DCR current sensing. Programmable temperature
compensation for sensed current values is provided to ensure
maximum accuracy. In addition to the I2C interface, select
PMBus commands for the ISL8601 can also be programmed
via external resistors, bringing the power and flexibility of
PMBus into low-cost power supply systems.
• Input Voltage Range: +1.8V to 13.2V
• VBIAS Voltage Range: +4.5V to 13.2V
• Minimum Output Voltage: +0.5V
• ±1.0% System Accuracy Over the Range of -40°C to
+85°C When Using the 0.8V Reference
• Internal Reference Voltage Programmable from 0.4V to
0.9V in 4mV Steps
• Integrated 2A to 4A MOSFET Drivers
• External Frequency Synchronization
• Selectable Phase Delay: 0°, 90°, 120°, 180°, 240°, or 270°
• Precision MOSFET rDS(ON) or Inductor DCR Current
Sensing
• Voltage Feedforward Compensation
Ordering Information
PART NUMBER TEMP RANGE (°C)
ISL8601IRZ
Features
-40 to +85
PACKAGE
PKG. DWG. #
40 Ld 6x6 QFN L40.6x6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
• Extensive PMBus Compliance
• Broad PMBus Programmability Including Output Voltage,
Overvoltage Threshold, Overcurrent Threshold,
Overtemperature Threshold, Switching Frequency, TurnOn and Turn-Off
• PMBus Monitoring of Load Current, Input Voltage, Output
Voltage and Temperature
• PMBus Programming Via I2C Interface
• Resistor Programming of Select PMBus Parameters
Pinout
• Operating Frequency Range: 200kHz to 2MHz
• Internal and External Temperature Measurement
• Overvoltage, Undervoltage and Overtemperature
Protection
REG5V
VFF
VBIAS
UVLO
C50A
RCONF1
RCONF2
ROV
RADDR
THERM
ISL8601
(40 LD 6x6 QFN)
• Low-Side and High-Side Overcurrent Protection
40 39 38 37 36 35 34 33 32 31
• Programmable Supply Sequencing and Tracking
ROSC 1
30 RGND
ISENSN 2
29 PGND
• Digital Soft-Start with Multiple Soft-Start Modes
ISENSP 3
28 LGATE
• Multiple Programmable Fault-Handling Modes
27 PVCC
• Multiple Prebiased Startup Options
N/C 4
GND
BOTTOM
SIDE PAD
N/C 5
LSOC 6
26 PHASE
25 UGATE
AGND 7
24 BOOT
C25A 8
23 HSOC
SS 9
22 DGND
COMP 10
21 PGOOD
1
SYNC
C25D
SMBCLK
SMBDAT
SMBALRT
EN
VSENSP
VSENSN
FB
VMON
11 12 13 14 15 16 17 18 19 20
• Differential Remote Voltage Sensing
• Power-Good Output with Programmable Delay
Applications
• Ethernet Routers and Switches
• Point-of-Load Modules
• Industrial Power Management
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL8601
Functional Block Diagram
UVLO
EXTERNAL
TEMP
MEASUREMENT
THERM
LDO2
INTERNAL
TEMP
SENSE
RCONF1
RCONF2
ROSC
VBIAS
LDO1
REG5V
C50A
UVLO
DETECT
LDO3
RESISTOR
DECODE
LDO4
C25D
C25A
ROV
RADDR
LSOC
HSOC
CURRENT
SENSE
8-BIT
MEASUREMENT
ADC
ISENSP
ISENSN
SMBDAT
SMBCLK
PGOOD
GENERATOR
SERIAL
INTERFACE
SMBALRT
PGOOD
MAIN CONTROL LOGIC
EN
VMON
VSENSP
DIFA
VSENSN
AV = 1
VFF
UGATE
PWM
COMP
SYNC
SS
BOOT
OSCILLATOR
DRIVER
CONTROL
SOFT-START
CIRCUIT
PHASE
PVCC
LGATE
8-BIT
DAC
1.024V
REFERENCE
PGND
EA
FB
COMP
AGND DGND RGND
2
FN6449.0
March 23, 2007
ISL8601
Typical Application Circuit
+4.5V to +13.2V
RVBIAS
RREG5V
CVBIAS
DBOOT
CPVCC
CREG5V
RBOOT
RVFF
VBIAS
REG5V
RHSOC
PVCC
HSOC
VFF
BOOT
RUVLO1
CVFF
CHSOC
UVLO
Q1
UGATE
RUVLO2
SYNC
LOUT
PHASE
VOUT
EN
Q2
PGOOD
C50A
C25A
C50A
ISENSP
ISENSN
C25D
C25A
RLSOC
LSOC
SS
C25D
CLSOC
COMP
CSS
COUT
LGATE
PGND
C2
C3
C1
3
I2C Bus
R2
SMBDAT
SMBCLK
SMBALRT
R3
FB
R1
VMON
RADDR
RCONF1
RCONF2
ROSC
ROV
RADDR
RCONF0
RCONF2
ROSC
VSENSP
CSEN
RFB
ROS
VSENSN
THERM
ROV
AGND DGND
RGND
RTHERM
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
3
FN6449.0
March 23, 2007
ISL8601
Package Outline Drawing
L40.6x6
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 3, 10/06
4X 4.5
6.00
36X 0.50
A
B
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
40
31
30
1
6.00
4 . 10 ± 0 . 15
21
10
0.15
(4X)
11
20
0.10 M C A B
TOP VIEW
40X 0 . 4 ± 0 . 1
4 0 . 23 +0 . 07 / -0 . 05
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
(
C
BASE PLANE
( 5 . 8 TYP )
SEATING PLANE
0.08 C
SIDE VIEW
4 . 10 )
( 36X 0 . 5 )
C
0 . 2 REF
5
( 40X 0 . 23 )
0 . 00 MIN.
0 . 05 MAX.
( 40X 0 . 6 )
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
4
FN6449.0
March 23, 2007
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