MC10EP101, MC100EP101 3.3V / 5VECL Quad 4−Input OR/NOR Description The MC10/100EP101 is a Quad 4−input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the fastest AC performance available. The 100 Series contains temperature compensation. http://onsemi.com MARKING DIAGRAM* Features • 250 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V • • • MCxxx EP101 AWLYYWWG LQFP−32 FA SUFFIX CASE 873A with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Pb−Free Packages are Available* 1 1 32 QFN32 MN SUFFIX CASE 488AM MCxxx EP101 AWLYYWWG G xxx = 10 or 100 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 11 1 Publication Order Number: MC10EP101/D MC10EP101, MC100EP101 D0d D1a D1b D1c D1d D2a D2b D2c VCC VCC Q0 24 23 22 21 20 19 18 32 17 31 30 Q0 VEE D0a D0b D0c 29 28 27 26 25 D0c 25 16 D2d VCC 1 24 D0d D0b 26 15 D3a Q1 2 23 D1a D0a 27 14 D3b Q1 3 22 D1b VEE 28 13 VCC Q2 4 Q0 29 12 D3c Q2 5 Q0 30 11 D3d Q3 6 19 D2a VCC 31 10 VEE Q3 7 18 D2b VCC 32 9 NC VCC 8 17 D2c MC10EP101 MC100EP101 1 2 3 4 5 6 7 8 21 D1c MC10EP101 MC100EP101 9 10 11 12 13 14 20 D1d 15 16 NC VEE D3d D3c VCC D3b D3a D2d VCC Q1 Q1 Q2 Q2 Q3 Q3 VCC Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 2. 32−Lead QFN Pinout (Top View) Figure 1. 32−Lead LQFP Pinout (Top View) Table 1. PIN DESCRIPTION PIN D0a FUNCTION D0a*−D3d* ECL Data Inputs D0b Q0 D0c Q0 D0d Q0−Q3, Q0−Q3 ECL Data Outputs VCC Positive Supply D1a VEE Negative Supply D1b Q1 NC No Connect D1c Q1 EP for QFN−32, only The Exposed Pad (EP) on the QFN−32 package bottom is thermally connected to the die for improved heat transfer out of package. The exposed pad must be attached to a heat− sinking conduit. The pad is electrically connected to VEE. D1d D2a D2b Q2 D2c Q2 D2d * Pins will default LOW when left open. D3a Table 2. TRUTH TABLE D3b D3c Dna Dnb Dnc Dnd Qn Qn L H X X X H L X H X X H L X X H X H L X X X H H L H H H H H H L L L L L D3d VEE Figure 3. Logic Diagram http://onsemi.com 2 Q3 Q3 MC10EP101, MC100EP101 Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor ESD Protection N/A Human Body Model Machine Model Charged Device Model > 4 kV > 100 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) LQFP−32 QFN−32 Flammability Rating Pb Pkg Pb−Free Pkg Level 2 Level 2 Level 1 Oxygen Index: 28 to 34 UL−94 V−0 @ 0.125 in Transistor Count 173 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm 32 LQFP 32 LQFP 80 55 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard 32 LQFP 12 to 17 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm QFN−32 QFN−32 31 27 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) 2S2P QFN−32 12 °C/W Tsol Wave Solder 265 265 °C Pb Pb−Free VI ≤ VCC VI ≤ VEE Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 3 MC10EP101, MC100EP101 Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 45 57 75 45 58 75 45 59 75 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV VIH Input HIGH Voltage (Single−Ended) 2090 2415 2155 2480 2215 2540 mV VIL Input LOW Voltage (Single−Ended) 1365 1690 1460 1755 1490 1815 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 150 −150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 3. All loading with 50 W to VCC − 2.0 V. Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 4) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 45 57 75 45 58 75 45 59 75 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 5) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mV VOL Output LOW Voltage (Note 5) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV VIH Input HIGH Voltage (Single−Ended) 3790 4115 3855 4180 3915 4240 mV VIL Input LOW Voltage (Single−Ended) 3065 3390 3130 3455 3190 3515 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 150 −150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 5. All loading with 50 W to VCC − 2.0 V. Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 6) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 45 57 75 45 58 75 45 59 75 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 7) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV VOL Output LOW Voltage (Note 7) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV VIH Input HIGH Voltage (Single−Ended) −1210 −885 −1145 −820 −1085 −760 mV VIL Input LOW Voltage (Single−Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 −150 150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary 1:1 with VCC. 7. All loading with 50 W to VCC − 2.0 V. http://onsemi.com 4 MC10EP101, MC100EP101 Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 8) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 40 55 75 40 58 75 45 60 85 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 9) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 9) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV VIH Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV VIL Input LOW Voltage (Single−Ended) 1355 1675 1355 1675 1355 1675 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 150 −150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 9. All loading with 50 W to VCC − 2.0 V. Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 10) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 40 58 75 40 61 75 45 64 85 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 11) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV VOL Output LOW Voltage (Note11) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV VIH Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV VIL Input LOW Voltage (Single−Ended) 3055 3375 3055 3375 3055 3375 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 150 −150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 11. All loading with 50 W to VCC − 2.0 V. Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 12) −40°C Symbol 25°C 85°C Characteristic Min Typ Max Min Typ Max Min Typ Max Unit IEE Power Supply Current VCC = −3.3V VCC = −5.0 V 40 40 55 58 75 75 40 40 58 61 75 75 45 45 60 64 85 85 mA IEE Power Supply Current 50 63 80 55 67 85 60 70 88 mA VOH Output HIGH Voltage (Note 13) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV VOL Output LOW Voltage (Note 13) −1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV VIH Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV VIL Input LOW Voltage (Single−Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV IIH Input HIGH Current 150 mA IIL Input LOW Current 150 −150 150 −150 −150 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 12. Input and output parameters vary 1:1 with VCC. 13. All loading with 50 W to VCC − 2.0 V. http://onsemi.com 5 MC10EP101, MC100EP101 Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 14) −40°C Symbol Characteristic Min fmax Maximum Frequency (See Figure 4. Fmax/JITTER) tPLH, tPHL Propagation Delay tSKEW Typ 25°C Max Min >3 D to Q, Q 10 100 Max Min >3 Typ Max >3 Unit GHz ps 225 280 325 380 Within Device Skew Q, Q Device to Device Skew (Note 15) 15 tJITTER Cycle−to−Cycle Jitter (See Figure 4. Fmax/JITTER) tr tf Output Rise/Fall Times (20% − 80%) Q, Q 85°C Typ 125 180 100 150 200 250 300 370 400 50 200 20 0.2 <1 150 200 120 170 250 300 320 420 450 50 200 20 50 200 ps 0.2 <1 0.2 <1 ps 170 220 190 250 ps 150 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1000 10 900 9 800 8 700 7 600 6 500 5 400 4 300 3 ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ 200 2 (JITTER) 100 0 0 1000 2000 1 3000 4000 JITTER OUT ps (RMS) VOUTpp (mV) 14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. 15. Skew is measured between outputs under identical transitions. ÉÉ ÉÉ 5000 FREQUENCY (MHz) Figure 4. Fmax/Jitter Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 5. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 6 MC10EP101, MC100EP101 ORDERING INFORMATION Package Shipping † MC10EP101FA LQFP−32 250 Units / Tray MC10EP101FAG LQFP−32 (Pb−Free) 250 Units / Tray MC10EP101FAR2 LQFP−32 2000 / Tape & Reel MC10EP101FAR2G LQFP−32 (Pb−Free) 2000 / Tape & Reel MC100EP101FA LQFP−32 250 Units / Tray MC100EP101FAG LQFP−32 (Pb−Free) 250 Units / Tray MC100EP101FAR2 LQFP−32 2000 / Tape & Reel MC100EP101FAR2G LQFP−32 (Pb−Free) 2000 / Tape & Reel QFN−32 (Pb−Free) 1000 / Tape & Reel Device MC10EP101MNG MC10EP101MNR4G MC100EP101MNG 74 Units / Rail 74 Units / Rail MC100EP101MNR4G 1000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 7 MC10EP101, MC100EP101 PACKAGE DIMENSIONS 32 A1 A −T−, −U−, −Z− 32 LEAD LQFP CASE 873A−02 ISSUE C 4X 25 0.20 (0.008) AB T−U Z 1 AE −U− −T− B P V 17 8 BASE METAL DETAIL Y V1 AC T−U Z AE DETAIL Y ÉÉ ÉÉ ÉÉ ÉÉ 9 −Z− S1 4X 0.20 (0.008) AC T−U Z F S 8X M_ D DETAIL AD G −AB− SECTION AE−AE C E −AC− H W K X DETAIL AD NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE −AB− IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS −T−, −U−, AND −Z− TO BE DETERMINED AT DATUM PLANE −AB−. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE −AC−. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE −AB−. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X http://onsemi.com 8 MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.450 0.750 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.018 0.030 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF Q_ 0.250 (0.010) 0.10 (0.004) AC GAUGE PLANE SEATING PLANE J R M N 9 0.20 (0.008) B1 MC10EP101, MC100EP101 PACKAGE DIMENSIONS QFN32 5*5*1 0.5 P CASE 488AM−01 ISSUE O A B ÉÉ ÉÉ D PIN ONE LOCATION 2X 0.15 C 2X NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM TERMINAL 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. E DIM A A1 A3 b D D2 E E2 e K L TOP VIEW 0.15 C (A3) 0.10 C A 32 X 0.08 C C L 32 X 9 D2 SEATING PLANE A1 SIDE VIEW MILLIMETERS MIN NOM MAX 0.800 0.900 1.000 0.000 0.025 0.050 0.200 REF 0.180 0.250 0.300 5.00 BSC 2.950 3.100 3.250 5.00 BSC 2.950 3.100 3.250 0.500 BSC 0.200 −−− −−− 0.300 0.400 0.500 EXPOSED PAD 16 K 32 X 17 SOLDERING FOOTPRINT* 8 5.30 E2 3.20 1 24 32 32 X 0.63 25 32 X b 0.10 C A B e 3.20 0.05 C 5.30 BOTTOM VIEW 32 X 0.28 28 X 0.50 PITCH *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10EP101/D