Control Integrated POwer System (CIPOS™) IGCM10F60HA Datasheet For Power Management Application 1 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Table of Contents CIPOS™ Control Integrated POwer System ........................................................................................................ 3 Features .............................................................................................................................................................. 3 Target Applications ........................................................................................................................................... 3 Description ......................................................................................................................................................... 3 System Configuration ....................................................................................................................................... 3 Pin Configuration .................................................................................................................................................... 4 Internal Electrical Schematic ................................................................................................................................. 4 Pin Assignment ....................................................................................................................................................... 5 Pin Description .................................................................................................................................................. 5 HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ................................................ 5 VFO (Fault-output, Pin 14) ................................................................................................................................ 6 ITRIP (Over current detection function, Pin 15) ................................................................................................ 6 VDD, VSS (Low side control supply and reference, Pin 13, 16) ....................................................................... 6 VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) ............................................................................... 6 NW, NV, NU (Low side emitter, Pin 17 - 19) ..................................................................................................... 6 W, V, U (High side emitter and low side collector, Pin 20 - 22) ........................................................................ 6 P (Positive bus input voltage, Pin 23)................................................................................................................ 6 Absolute Maximum Ratings................................................................................................................................... 7 Module Section .................................................................................................................................................. 7 Inverter Section.................................................................................................................................................. 7 Control Section .................................................................................................................................................. 7 Recommended Operation Conditions .................................................................................................................. 8 Static Parameters ................................................................................................................................................... 9 Dynamic Parameters ............................................................................................................................................ 10 Bootstrap Parameters .......................................................................................................................................... 10 Mechanical Characteristics and Ratings............................................................................................................ 11 Circuit of a Typical Application ........................................................................................................................... 12 Switching Times Definition .................................................................................................................................. 12 Electrical characteristic ....................................................................................................................................... 13 Package Outline .................................................................................................................................................... 14 Datasheet 2 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA CIPOS™ Control Integrated POwer System Dual In-Line Intelligent Power Module 3Φ-bridge 600V / 10A Features Description Fully isolated Dual In-Line molded module Infineon reverse conducting IGBTs with monolithic body diode Rugged SOI gate driver technology with stability against transient and negative voltage Allowable negative VS potential up to -11V for signal transmission at VBS=15V Integrated bootstrap functionality Over current shutdown Under-voltage lockout at all channels Low side emitter pins accessible for all phase current monitoring (open emitter) Cross-conduction prevention All of 6 switches turn off during protection Lead-free terminal plating; RoHS compliant The CIPOS™ module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. It is designed to control three phase AC motors and permanent magnet motors in variable speed drives for applications like an air conditioning, a refrigerator and a washing machine. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. The features of Infineon reverse conducting IGBT are combined with an optimized SOI gate driver for excellent electrical performance. System Configuration 3 half bridges with reverse conducting IGBT Target Applications 3Φ SOI gate driver Dish washers Pin-to-heasink creepage distance typ. 1.6mm Refrigerators Washing machines Air-conditioners Fans Low power motor drives Datasheet 3 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Pin Configuration Bottom View Figure 1: Pin configuration Internal Electrical Schematic Figure 2: Internal schematic Datasheet 4 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Pin Assignment Pin Number Pin Name Pin Description 1 VS(U) U-phase high side floating IC supply offset voltage 2 VB(U) U-phase high side floating IC supply voltage 3 VS(V) V-phase high side floating IC supply offset voltage 4 VB(V) V-phase high side floating IC supply voltage 5 VS(W) W-phase high side floating IC supply offset voltage 6 VB(W) W-phase high side floating IC supply voltage 7 HIN(U) U-phase high side gate driver input 8 HIN(V) V-phase high side gate driver input 9 HIN(W) W-phase high side gate driver input 10 LIN(U) U-phase low side gate driver input 11 LIN(V) V-phase low side gate driver input 12 LIN(W) W-phase low side gate driver input 13 VDD Low side control supply 14 VFO Fault output 15 ITRIP Over current shutdown input 16 VSS Low side control negative supply 17 NW W-phase low side emitter 18 NV V-phase low side emitter 19 NU U-phase low side emitter 20 W Motor W-phase output 21 V Motor V-phase output 22 U Motor U-phase output 23 P Positive bus input voltage 24 NC No Connection Pin Description HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input Schmitttrigger and noise filter provide beneficial noise rejection to short input pulses. 5k Figure 3: Input pin structure The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. Datasheet Figure 4: Input filter timing diagram 5 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA It is recommended for proper work of CIPOS™ not to provide input pulse-width lower than 1us. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1V is present. The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. The IC shuts down all the gate drivers’ outputs, when the VDD supply voltage is VDDUV- = 10.4V. This prevents the external switches from critically low gate voltage during on-state and therefore from excessive dissipation. A minimum deadtime insertion of typically 380ns is also provided by driver IC, in order to reduce crossconduction of the external power switches. VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter voltage. VFO (Fault-output, Pin 14) The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 12.1V and a falling threshold of VBSUV- = 10.4V. VDD VFO RON,FLT from ITRIP -Latch >1 VSS power below power levels power VS(U,V,W) provide a high robustness against negative voltage in respect of VSS of -50V transiently. This ensures very stable designs even under rough conditions. from uv -detection CIPOS™ Figure 5: Internal circuit at pin VFO NW, NV, NU (Low side emitter, Pin 17 - 19) The low side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. ITRIP (Over current detection function, Pin 15) CIPOS™ provides an over current detection function by connecting the ITRIP input with the motor current feedback. The ITRIP comparator threshold (typ. 0.47V) is referenced to VSS ground. An input noise filter (typ: tITRIPMIN = 530ns) prevents the driver to detect false over-current events. W, V, U (High side emitter and low side collector, Pin 20 - 22) These pins are motor U, V, W input pins Over current detection generates a shut down of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. P (Positive bus input voltage, Pin 23) The high side IGBT are connected to the bus voltage. It is noted that the bus voltage does not exceed 450 V. The fault-clear time is set to typical 65us. VDD, VSS (Low side control supply and reference, Pin 13, 16) VDD is the low side supply and it provides power both to input logic and to low side output power stage. Input logic is referenced to VSS ground. Datasheet 6 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Absolute Maximum Ratings (VDD = 15V and TJ = 25°C, if not stated otherwise) Module Section Description Condition Storage temperature range Insulation test voltage RMS, f = 60Hz, t =1min Operating case temperature range Refer to Figure 6 Symbol Value Unit min max Tstg -40 125 °C VISOL 2000 - V TC -40 100 °C Inverter Section Description Condition Symbol Value min max Unit Max. blocking voltage IC = 250µA VCES 600 - V DC link supply voltage of P-N Applied between P-N VPN - 450 V DC link supply voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V Output current TC = 25°C, TJ < 150°C TC = 100°C, TJ < 150°C IC -10 -6 10 6 A Maximum peak output current less than 1ms IC -20 20 A Short circuit withstand time1 VDC ≤400V, TJ = 150°C tSC - 5 µs Power dissipation per IGBT Ptot - 26.1 W Operating junction temperature range TJ -40 150 °C RthJC - 4.79 K/W Single IGBT thermal resistance, junction-case Control Section Description Condition Value min max Unit Module supply voltage VDD -1 20 V High side floating supply voltage (VB vs. VS) VBS -1 20 V VIN VITRIP -1 -1 10 10 V fPWM - 20 kHz Input voltage LIN, HIN, ITRIP Switching frequency 1 Symbol Allowed number of short circuits: <1000; time between short circuits: >1s. Datasheet 7 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Recommended Operation Conditions All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol min DC link supply voltage of P-N VPN 0 High side floating supply voltage (VB vs. VS) VBS Low side supply voltage Value typ max Unit - 400 V 13.5 - 18.5 V VDD 14.0 16 18.5 V Control supply variation ΔVBS, ΔVDD -1 -1 - 1 1 V/µs Logic input voltages LIN,HIN,ITRIP VIN VITRIP 0 0 - 5 5 V Between VSS - N (including surge) VSS -5 - 5 V Figure 6: TC measurement point2 2 Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information. Datasheet 8 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Static Parameters (VDD = 15V and TJ = 25°C, if not stated otherwise) Description Condition Symbol min typ max VCE(sat) - 1.6 1.8 2.0 - Iout = 6A Collector-Emitter saturation voltage TJ = 25°C 150°C Value Iout = -6A Unit V Emitter-Collector forward voltage TJ = 25°C 150°C VF - 1.75 1.8 2.2 Collector-Emitter leakage current VCE = 600V ICES - - 1 mA Logic "1" input voltage (LIN,HIN) VIH - 2.1 2.5 V Logic "0" input voltage (LIN,HIN) VIL 0.7 0.9 - V ITRIP positive going threshold VIT,TH+ 400 470 540 mV ITRIP input hysteresis VIT,HYS 40 70 - mV VDD and VBS supply under voltage positive going threshold VDDUV+ VBSUV+ 10.8 12.1 13.0 V VDD and VBS supply under voltage negative going threshold VDDUVVBSUV- 9.5 10.4 11.2 V VDD and VBS supply under voltage lockout hysteresis VDDUVH VBSUVH 1.0 1.7 - V VINCLAMP 9.0 10.1 12.5 V V Input clamp voltage (HIN, LIN, ITRIP) Iin = 4mA Quiescent VBx supply current (VBx only) HIN = 0V IQBS - 300 500 µA Quiescent VDD supply current (VDD only) LIN = 0V, HINX = 5V IQDD - 370 900 µA Input bias current VIN = 5V IIN+ - 1 1.5 mA Input bias current VIN = 0V IIN- - 2 - µA ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 µA VFO input bias current VFO = 5V, VITRIP = 0V IFO - 2 - nA VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 - V Datasheet 9 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Dynamic Parameters (VDD = 15V and TJ = 25°C, if not stated otherwise) Description Condition Turn-on propagation delay time Turn-on rise time VLIN,HIN = 5V; Iout = 6A, VDC = 300V Turn-on switching time Turn-off propagation delay time typ max ton - 670 - ns tr - 20 - ns tc(on) 80 ns trr 110 ns toff - 820 - ns tf - 170 - ns VLIN,HIN = 0V; Iout = 6A, VDC = 300V Turn-off switching time tc(off) Short circuit propagation delay time From VIT,TH+ to 10% ISC Input filter time ITRIP VITRIP = 1V Input filter time at LIN, HIN for turn on and off VLIN,HIN = 0V & 5V Fault clear time after ITRIP-fault VITRIP = 1V Deadtime between low side and high side Unit min Reverse recovery time Turn-off fall time Value Symbol 180 ns tSCP - 1250 - ns tITRIPmin - 530 - ns tFILIN - 290 - ns tFLTCLR 40 65 200 µs DTPWM 1.0 - - µs Deadtime of gate drive circuit DTIC 380 ns IGBT turn-on energy (includes reverse recovery of diode) VDC = 300V, IC = 6A, TJ = 25°C 150°C Eon - 110 155 - µJ IGBT turn-off energy VDC = 300V, IC = 6A, TJ = 25°C 150°C Eoff - 155 220 - µJ Diode recovery energy VDC = 300V, IC = 6A, TJ = 25°C 150°C Erec - 45 75 - µJ Bootstrap Parameters (TJ = 25°C, if not stated otherwise) Description Condition Symbol Repetitive peak reverse voltage 1 VRRM Bootstrap resistance of U-phase1 VS2 or VS3 = 300V, TJ = 25°C VS2 and VS3 = 0V, TJ = 25°C VS2 or VS3 = 300V, TJ = 125°C VS2 and VS3 = 0V, TJ = 125°C Reverse recovery time Forward voltage drop Value min typ 600 max Unit V RBS1 35 40 50 65 IF = 0.6A, di/dt = 80A/µs trr_BS 50 ns IF = 20mA, VS2 and VS3 = 0V VF_BS 2.6 V RBS2 and RBS3 have same values to RBS1. Datasheet 10 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Mechanical Characteristics and Ratings Description Condition Value Unit min typ max Mounting torque M3 screw and washer 0.59 0.69 0.78 Nm Flatness Refer to Figure 7 -50 - 100 µm - 6.15 - g Weight Figure 7: Flatness measurement position Datasheet 11 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Circuit of a Typical Application Figure 8: Application circuit Switching Times Definition Figure 9: Switching times definition Datasheet 12 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Electrical characteristic 20 14 12 10 8 VDD=13V VDD=15V VDD=20V 6 4 2 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VCE(sat), Collector - Emitter voltage [V] 12 10 8 6 TJ=25℃ 4 TJ=150℃ 2 0.5 1.0 High side @ T J=25 ℃ 1.2 High side @ T J=150 ℃ Low side @ T J =25 ℃ 1.0 Low side @ T J =150 ℃ 0.8 0.6 0.4 0.2 0 2 4 6 8 10 12 14 16 18 20 3.5 4.0 12 10 8 High side @ T J =25 ℃ High side @ T J =150 ℃ Low side @ T J =25 ℃ Low side @ T J =150 ℃ 700 600 High side @ T J =150 ℃ Low side @ T J =25 ℃ Low side @ T J =150 ℃ 0.4 0.3 0.2 0.1 V D C =300V V D D =15V 0 2 4 6 8 10 12 14 16 18 6 8 10 12 14 16 18 20 High side @ T J=150 ℃ Low side @ T J=25 ℃ 250 Low side @ T J=150 ℃ 200 150 100 50 0 2 4 6 8 10 12 14 16 18 trr, Reverse recovery time [ns] High side @ T J=25 ℃ High side @ T J=150 ℃ Low side @ T J=25 ℃ 300 Low side @ T J=150 ℃ 200 100 2 4 6 8 10 12 14 16 Ic, C ollector current [A] Typ. Turn off switching time Datasheet Low side @ T J =25 ℃ Low side @ T J =150 ℃ 150 120 90 60 30 0 2 4 18 20 6 8 10 12 14 16 18 20 V D C =300V V D D =15V 1500 1400 High side @ T J =25 ℃ 1300 High side @ T J =150 ℃ 1200 Low side @ T J =25 ℃ Low side @ T J =150 ℃ 1100 1000 900 800 700 0 2 300 High side @ T J =25 ℃ High side @ T J =150 ℃ 250 6 8 10 12 14 16 18 20 Typ. Turn off propagation delay time V DC =300V V DD =15V 350 4 Ic, C ollector current [A] Low side @ T J =25 ℃ Low side @ T J =150 ℃ 200 10 1 D : d u ty ratio 0 .1 D =50% D =20% D =10% D =5% D =2% Single pulse 0 .0 1 150 100 1 E -3 50 0 3.5 High side @ T J =150 ℃ 180 1600 20 400 500 3.0 High side @ T J =25 ℃ 210 Typ. Turn on switching time V DC =300V V DD =15V 2.5 Typ. Reverse recovery energy loss High side @ T J=25 ℃ Typ. Turn on propagation delay time 400 240 Ic, C ollector current [A] 700 2.0 1700 300 0 1.5 Ic, C ollector current [A] V DC =300V V DD =15V 350 Ic, C ollector current [A] 600 1.0 VF, Emitter - Collector voltage [V] V DC =300V V DD =15V 270 0 20 ZthJC, RC-IGBT transient thermal resistance [K/W] 4 0.5 Typ. Emitter – Collector forward voltage toff, Turn off propagation delay time [ns] tc(on), Turn on switching time [ns] 900 2 TJ=150℃ 0 0.0 4.5 400 0 TJ=25℃ 4 2 Typ. Turn off switching energy loss V DC =300V V DD =15V 800 6 Ic, C ollector current [A] 1000 ton, Turn on propagation delay time [ns] 3.0 14 300 0.5 0.0 Typ. Turn on switching energy loss tc(off), Turn off switching time [ns] 2.5 High side @ T J =25 ℃ Ic, C ollector current [A] 0 2.0 V CE(sat), Collector - Emitter voltage [V] 16 Erec, Reverse recovery energy loss [uJ] 1.4 500 1.5 18 0.6 V D C =300V V D D =15V 1.6 Eoff, Turn off switching energy loss [mJ] Eon, Turn on switching energy loss [mJ] 14 Typ. Collector – Emitter saturation voltage 1.8 0.0 16 0 0.0 4.0 Typ. Collector – Emitter saturation voltage 18 IF, Emitter - Collector current [A] 16 0 0.0 20 V DD=15V TJ=25℃ 18 Ic, Collector - Emitter current [A] Ic, Collector - Emitter current [A] 20 0 0 2 4 6 8 10 12 14 16 Ic, C ollector current [A] Typ. Reverse recovery time 13 18 20 1 E -4 1 E -7 1 E -6 1 E -5 1 E -4 1 E -3 0 .0 1 0 .1 t P , P u lse w id th [se c.] 1 10 100 IGBT transient thermal resistance at all six IGBTs operation Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Package Outline Datasheet 14 Ver. 1.6, 2014-06-01 CIPOS™ IGCM10F60HA Revision History Previous Version: Datasheet Ver. 1.5 Major changes since the last revision Page or Reference 8 14 Datasheet Description of change Figure 6 updated Package Outline updated 15 Ver. 1.6, 2014-06-01 Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolGaN™, CoolMOS™, CoolSET™, CoolSiC™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, DrBLADE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, ISOFACE™, IsoPACK™, i-Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™, POWERCODE™, PRIMARION™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. ANSI™ of American National Standards Institute. AUTOSAR™ of AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. HYPERTERMINAL™ of Hilgraeve Incorporated. MCS™ of Intel Corp. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ of Openwave Systems Inc. RED HAT™ of Red Hat, Inc. RFMD™ of RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex. Last Trademarks Update 2014-07-17 www.Infineon.com Edition 2014-06-01 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015. All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). 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