Micropower, Rail to Rail Input Current Sense Amplifier with Voltage Output ISL28006 Features The ISL28006 is a micropower, uni-directional high-side and low-side current sense amplifier featuring a proprietary rail-to-rail input current sensing amplifier. The ISL28006 is ideal for high-side current sense applications where the sense voltage is usually much higher than the amplifier supply voltage. The device can be used to sense voltages as high as 28V when operating from a supply voltage as low as 2.7V. The micropower ISL28006 consumes only 50µA of supply current when operating from a 2.7V to 28V supply. • Low Power Consumption. . . . . . . . . . . . . . . . . . . . . . 50µA, Typ The ISL28006 features a common-mode input voltage range from 0V to 28V. The proprietary architecture extends the input voltage sensing range down to 0V, making it an excellent choice for low-side ground sensing applications. The benefit of this architecture is that a high degree of total output accuracy is maintained over the entire 0V to 28V common mode input voltage range. The ISL28006 is available in fixed (100V/V, 50V/V, 20V/V and Adjustable) gains in the space saving 5 Ld SOT-23 package and the 6 Ld SOT-23 package for the adjustable gain part. The parts operate over the extended temperature range from -40°C to +125°C. • Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 28V • Wide Common Mode Input. . . . . . . . . . . . . . . . . . . . 0V to 28V • Gain Versions - ISL28006-100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100V/V - ISL28006-50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50V/V - ISL28006-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/V - ISL28006-ADJ . . . . . . . . . . . . . . . . ADJ (Min Gain = 20V/V) • Operating Temperature Range . . . . . . . . . . . . -40°C to +125°C • Packages. . . . . . . . . . . . . . . . . . . . . .5 Ld SOT-23, 6 Ld SOT-23 Applications • Power Management/Monitors • Power Distribution and Safety • DC/DC, AC/DC Converters • Battery Management/Charging • Automotive Power Distribution Related Literature • See AN1532 for “ISL28006 Evaluation Board User’s Guide” SENSE +12VDC OUTPUT RSENSE +5VDC ISL28006 + SENSE +5VDC RSENSE - ISENSE +12VDC 0.6 +5VDC OUTPUT 0.2 +5VDC ISL28006 + ISENSE +5VDC SENSE +1.0VDC RSENSE MULTIPLE OUTPUT POWER SUPPLY +5VDC ISL28006 + +1.0VDC OUTPUT ISENSE +1.0VDC +25°C +125°C GAIN 100 0 -0.4 -0.6 -0.8 -1 -1.2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 1. TYPICAL APPLICATION May 23, 2011 FN6548.5 -40°C -0.2 -1.4 GND +100°C 0.4 ACCURACY (%) +12VDC 1 FIGURE 2. GAIN ACCURACY vs VRS+ = 0V TO 28V CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2010, 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL28006 Block Diagram VCC VCC I = 2.86µA I = 2.86µA VSENSE VSENSE HIGH-SIDE AND LOW-SIDE SENSING RS+ R1 gmHI HIGH-SIDE AND LOW-SIDE SENSING RS+ R1 RS- gmHI RSR2 RR44 OUT - 1.35V R3 R2 + gmLO R3 Rg VSENSE IMIRROR RR44 GND FIXED GAIN PARTS OUT - 1.35V Rf R5 + Rf FB gmLO Rg R5 VSENSE IMIRROR GND ADJUSTABLE GAIN PART Pin Configurations ISL28006-ADJ (6 LD SOT-23) TOP VIEW ISL28006-100, 50, 20 (5 LD SOT-23) TOP VIEW GND 1 OUT 2 FB 1 5 RSFIXED GAIN ADJ. GAIN OUT 2 VCC 3 4 RS+ VCC 3 6 GND 5 RS4 RS+ Pin Descriptions ISL28006-100, 50, 20 (5 LD SOT-23) ISL28006-ADJ (6 LD SOT-23) PIN NAME 1 6 GND 1 FB 2 2 OUT Amplifier Output 3 3 VCC Positive Power Supply 4 4 RS+ Sense Voltage Non-inverting Input 5 5 RS- Sense Voltage Inverting Input DESCRIPTION Power Ground Input Pin for External Resistors FB VCC RS- CAPACITIVELY COUPLED ESD CLAMP OUT RS+ GND 2 FN6548.5 May 23, 2011 ISL28006 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING (Note 4) GAIN PACKAGE Tape & Reel (Pb-Free) PKG. DWG. # ISL28006FH100Z-T7 100V/V BDJA 5 Ld SOT-23 P5.064A ISL28006FH100Z-T7A 100V/V BDJA 5 Ld SOT-23 P5.064A ISL28006FH50Z-T7 50V/V BDHA 5 Ld SOT-23 P5.064A ISL28006FH50Z-T7A 50V/V BDHA 5 Ld SOT-23 P5.064A ISL28006FH20Z-T7 20V/V BDGA 5 Ld SOT-23 P5.064A ISL28006FH20Z-T7A 20V/V BDGA 5 Ld SOT-23 P5.064A ISL28006FHADJZ-T7 ADJ BDFA 6 Ld SOT-23 P6.064 ISL28006FHADJZ-T7A ADJ BDFA 6 Ld SOT-23 P6.064 ISL28006FH-100EVAL1Z 100V/V Evaluation Board ISL28006FH-50EVAL1Z 50V/V Evaluation Board ISL28006FH-20EVAL1Z 20V/V Evaluation Board ISL28006FH-ADJEVAL1Z Adjustable Evaluation Board NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28006. For more information on MSL please see techbrief TB363. 4. The part marking is located on the bottom of the part. 3 FN6548.5 May 23, 2011 ISL28006 Absolute Maximum Ratings Thermal Information Max Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28V Max Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Max Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.5V Max Input Voltage (RS+, RS-, FB) . . . . . . . . . . . . . . . . . . . GND - 0.5V to 30V Max Input Current for Input Voltage <GND - 0.5V. . . . . . . . . . . . . . . . ±20mA Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite Di-Electrically Isolated PR40 Process . . . . . . . . . . . . . . . . . . . Latch-up free ESD Rating Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 4kV Machine Model (Tested per EIA/JESD22-A115-A) . . . . . . . . . . . . . . 200V Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . . .1.5kV Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 5 Ld SOT-23 (Notes 5, 6) . . . . . . . . . . . . . . . 190 90 6 Ld SOT-23 (Notes 5, 6) . . . . . . . . . . . . . . . 180 90 Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Maximum Junction Temperature (TJMAX) . . . . . . . . . . . . . . . . . . . . .+150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . .-40°C to +125°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. For θJC, the “case temp” location is taken at the package top center. Electrical Specifications VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. PARAMETER VOS (Input Offset Voltage) DESCRIPTION Gain = 100 (Notes 8, 9) CONDITIONS VCC = VRS+ = 12V, VSENSE = 20mV to 100mV MIN (Note 7) TYP MAX (Note 7) UNIT -250 60 250 µV 300 µV -1.2 2.5 mV 2.8 mV 60 300 µV 450 µV 2.8 mV 3.2 mV 300 µV -300 VCC = 12V, VRS+ = 0.2V, VSENSE = 20mV to 100mV -2.5 VCC = VRS+ = 12V, VSENSE = 20mV to 100mV -300 -2.8 Gain = 50, Gain = 20 (Notes 8, 9) -450 VCC = 12V, VRS+ = 0.2V, VSENSE = 20mV to 100mV -2.8 -1.2 -3.2 Adjustable, Gain = 21 Rf = 100kΩ, Rg = 5kΩ (Notes 8, 9) VCC = VRS+ = 12V, VSENSE = 20mV to 100mV -300 60 -450 VCC = 12V, VRS+ = 0.2V, VSENSE = 20mV to 100mV -3.1 -1.2 -3.4 IRS+, IRS IRS+ (+ Input Bias Current) Leakage Current Gain = 100 VCC = 0V, VRS+ = 28V 0.041 VRS+ = 2V, VSENSE = 5mV VRS+ = 0V, VSENSE = 5mV 4.7 -500 450 µV 3.1 mV 3.4 mV 1.2 µA 1.5 µA 6 µA 7 µA -432 nA -600 Gain = 50, Gain = 20 VRS+ = 2V, VSENSE = 5mV VRS+ = 0V, VSENSE = 5mV nA 4.7 -700 6 µA 8 µA -432 nA -840 ADJ Gain = 101 Rf = 100kΩ, Rg = 1kΩ VRS+ = 2V, VSENSE = 5mV VRS+ = 0V, VSENSE = 5mV 4.7 -500 -600 4 nA -432 6 µA 7 µA nA nA FN6548.5 May 23, 2011 ISL28006 Electrical Specifications VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) PARAMETER IRS (- Input Bias Current) DESCRIPTION G = 100, 50, 20, ADJ CONDITIONS MIN (Note 7) VRS+ = 2V, VSENSE = 5mV TYP MAX (Note 7) UNIT 5 50 nA 75 VRS+ = 0V, VSENSE = 5mV -125 -45 nA nA -130 nA CMRR Common Mode Rejection Ratio VRS+ = 2V to 28V 105 115 dB PSRR Power Supply Rejection Ratio VCC = 2.7V to 28V, VRS+ = 2V 90 105 dB VFS Full-scale Sense Voltage VCC = 28V, VRS+ = 0.2V, 12V 200 G (Gain) (Note 8) ISL28006-100 100 V/V ISL28006-50 50 V/V ISL28006-20 20 V/V GA (Gain Accuracy) Gain = 100 (Note 10) ISL28006-ADJ 20 VCC = VRS+ = 12V, VSENSE = 20mV to 100mV -0.2 0.7 % -1 1 % VCC = 12V, VRS+ = 0.1V, VSENSE = 20mV to 100mV Gain = 50, Gain = 20 (Note 10) ADJ Gain = 21 Rf = 100kΩ, Rg = 5kΩ (Note 10) VCC = VRS+ = 12V, VSENSE = 20mV to 100mV -0.25 % -0.35 0.7 % -1 1 % 2.2 % -2.2 -2.3 2.3 % VCC = VRS+ = 12V, VSENSE = 20mV to 100mV -0.65 1 % -1 1.05 % 2.2 % Gain = 100 (Note 11) VCC = VRS+ = 12V, VSENSE = 100mV Gain = 50, Gain = 20 (Note 11) VCC = VRS+ = 12V, VSENSE = 100mV -2.2 VCC = 12V, VRS+ = 0.1V, VSENSE = 100mV -0.33 -0.33 -2.3 2.3 -0.7 0.7 % -0.9 0.9 % VCC = 12V, VRS+ = 0.1V, VSENSE = 100mV ADJ Gain = 21 Rf = 100kΩ, Rg = 5kΩ (Note 11) V/V VCC = 12V, VRS+ = 0.1V, VSENSE = 20mV to 100mV VCC = 12V, VRS+ = 0.1V, VSENSE = 20mV to 100mV VOA (Total Output Accuracy) mV -1.25 % -0.7 0.7 % -0.9 0.9 % -4.7 1.8 % -5.2 -1.41 2.3 % VCC = VRS+ = 12V, VSENSE = 100mV -0.7 1.05 % VCC = 12V, VRS+ = 0.1V, VSENSE = 100mV -4.7 -0.9 -1.41 -5.2 1.2 % 1.8 % 2.3 % VOH Output Voltage Swing, High VCC - VOUT IO = -500µA, VCC = 2.7V, VSENSE = 100mV, VRS+ = 2V 39 50 mV VOL Output Voltage Swing, Low VOUT IO = 500µA, VCC = 2.7V, VSENSE = 0V, VRS+ = 2V 30 50 mV ROUT Output Resistance VCC = VRS+ = 12V, VSENSE = 100mV, IOUT = 10µA to 1mA 6.5 Ω ISC+ Short Circuit Sourcing Current VCC = VRS+ = 5V, RL = 10Ω 4.8 mA ISC- Short Circuit Sinking Current VCC = VRS+ = 5V, RL = 10Ω 8.7 mA 5 FN6548.5 May 23, 2011 ISL28006 Electrical Specifications VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued) PARAMETER IS VCC Slew Rate BW-3dB DESCRIPTION tS Power-up MIN (Note 7) TYP MAX (Note 7) UNIT µA Gain = 100 VRS+ > 2V, VSENSE = 5mV 50 59 62 µA Gain = 50, 20, VRS+ > 2V, VSENSE = 5mV 50 62 µA 63 µA 62 µA 63 µA 28 V ADJ Gain = 21 Rf = 100kΩ, Rg = 5kΩ VRS+ > 2V, VSENSE = 5mV Supply Voltage Guaranteed by PSRR 2.7 50 Gain = 100 Pulse on RS+ pin, VOUT = 8VP-P (Figure 67) 0.58 0.76 V/µs Gain = 50 Pulse on RS+ pin, VOUT = 8VP-P (Figure 67) 0.58 0.67 V/µs Gain = 20 Pulse on RS+ pin, VOUT = 3.5VP-P (Figure 67) 0.50 0.67 V/µs ADJ Gain = 21 Rf = 100kΩ, Rg = 5kΩ Pulse on RS+ pin, VOUT = 3.5VP-P (Figure 67) 0.50 0.67 V/µs Gain = 100 VRS+ = 12V, 0.1V, VSENSE = 100mV 110 kHz Gain = 50 VRS+ = 12V, 0.1V, VSENSE = 100mV 160 kHz Gain = 20 VRS+ = 12V, 0.1V, VSENSE = 100mV 180 kHz ADJ, Gain = 101 (Figure 59) VRS+ = 12V, 0.1V, VSENSE = 100mV, Rf = 100kΩ, Rg = 1kΩ 40 kHz ADJ, Gain = 51 (Figure 59) VRS+ = 12V, VSENSE = 100mV, Rf = 100kΩ, Rg = 2kΩ 78 kHz VRS+ = 0.1V, VSENSE = 100mV, Rf = 100kΩ, Rg = 2kΩ 122 kHz ADJ, Gain = 21 (Figure 59) tS CONDITIONS VRS+ = 12V, VSENSE = 100mV, Rf = 100kΩ, Rg = 5kΩ 131 kHz VRS+ = 0.1V, VSENSE = 100mV, Rf = 100kΩ, Rg = 5kΩ 237 kHz Output Settling Time to 1% of Final Value VCC = VRS+ = 12V, VOUT = 10V step, VSENSE > 7mV 15 µs VCC = VRS+ = 0.2V, VOUT = 10V step, VSENSE > 7mV 20 µs Capacitive-Load Stability No sustained oscillations 300 pF Power-Up Time to 1% of Final Value VCC = VRS+ = 12V, VSENSE = 100mV 15 µs VCC = 12V, VRS+ = 0.2V, VSENSE = 100mV 50 µs VCC = VRS+ = 12V, VSENSE = 100mV, overdrive 10 µs Saturation Recovery Time NOTES: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 8. DEFINITION OF TERMS: • VSENSEA = VSENSE @ 100mV • VSENSEB = VSENSE @ 20mV • VOUTA = VOUT @ VSENSEA = 100mV • VOUTB = VOUT @ VSENSEB = 20mV ⎛ V OUT A – V OUT B ⎞ • G = GAIN = ⎜ ------------------------------------------------------⎟ ⎝ V SENSE A – V SENSE B⎠ V OUT A 9. VOS is extrapolated from the gain measurement. V OS = V SENSE A – ----------------G ⎛ G MEASURED – G EXPECTED⎞ 10. % Gain Accuracy = GA = ⎜ ---------------------------------------------------------------------⎟ × 100 G EXPECTED ⎝ ⎠ ⎛ VOUT MEASURED – VOUT EXPECTED⎞ 11. Output Accuracy % VOA = ⎜ -------------------------------------------------------------------------------------------⎟ × 100, where VOUT = VSENSE X GAIN and VSENSE = 100mV VOUT EXPECTED ⎝ ⎠ 6 FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. 1.6 VRS+ 2.0 1.4 VTH(L-H) = 1.52V 1.2 0.8 VOUT (G = 100) 0.6 0.2 1.2 0 0 0.2 0.4 0.6 0.8 1.0 1.2 TIME (ms) 1.4 1.6 1.8 2.0 FIGURE 3. HIGH-SIDE and LOW-SIDE THRESHOLD VOLTAGE VRS+(L-H) and VRS+(H-L), VSENSE = 10mV 6 4 G100, VOUT = 2V G50, VOUT = 1V G20, VOUT = 400mV 0.4 0 8 RL = 1MΩ VCC = 12V 0.8 G100, VOUT = 1V G50, VOUT = 500mV G20, VOUT = 200mV 0.4 10 VOUT (G = 100) 1.6 VTH(H-L) = 1.23V 1.0 VRS+ (V) VOLTS (V) 12 2.4 VRS+ 0 0.2 0.4 0.6 0.8 1.0 1.2 TIME (ms) 2 1.4 0 2.0 GAIN 100 10 10 8 8 VOUT (V) VOUT (V) 1.8 12 GAIN 100 6 6 4 4 2 2 0 10 20 30 40 50 60 70 80 90 0 100 0 10 20 30 TIME (µs) FIGURE 5. LARGE SIGNAL TRANSIENT RESPONSE VRS+ = 0.2V, VSENSE = 100mV GAIN 100 18 VSENSE = 20mV, 100mV 16 14 VOS (µV) 12 10 8 6 4 2 0 -250 -200 -150 -100 -50 VOS (µV) 0 50 100 FIGURE 7. VOS (µV) DISTRIBUTION AT +25°C, VRS+ = 12V, QUANTITY: 100 7 40 50 60 TIME (µs) 70 80 90 100 FIGURE 6. LARGE SIGNAL TRANSIENT RESPONSE VRS+ = 12V, VSENSE = 100mV 20 UNITS 1.6 FIGURE 4. VOUT vs VRS+, VSENSE = 20mV TRANSIENT RESPONSE 12 0 VOUT (V) 1.8 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 GAIN 100 VSENSE = 20mV, 100mV +125°C +100°C -40°C 0 2 4 6 8 +25°C 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 8. VOS vs VRS+ FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 250 GAIN 100 VSENSE = 20mV, 100mV +125°C +100°C 200 150 +100°C +25°C 100 VOS (µV) VOS (µV) 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 +25°C -40°C 50 0 -50 -40°C -100 +125°C -150 GAIN 100 VSENSE = 2mV, 20mV -200 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -250 2 2.0 4 6 8 VRS+ (V) FIGURE 9. VOS vs VRS+ 3000 +100°C FIGURE 10. VOS vs VCC, VRS+= 12V 0.6 GAIN 100 VSENSE = 2mV, 20mV +25°C 2000 +100°C 0.4 -40°C ACCURACY (%) -40°C +125°C 0 -1000 0 -0.2 -0.4 -0.6 -0.8 -1.0 -2000 GAIN 100 VSENSE = 20mV, 100mV -1.2 -3000 2 4 6 8 -1.4 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 11. VOS vs VCC, VRS+ = 0.1V 0.6 +100°C 0 ACCURACY (%) ACCURACY (%) 0.2 -0.2 -0.4 -40°C -0.6 +125°C -0.8 -1.0 GAIN 100 VSENSE = 20mV, 100mV -1.2 0 0.2 0.4 0.6 0.8 1.0 1.2 VRS+ (V) 1.4 1.6 1.8 FIGURE 13. GAIN ACCURACY vs VRS+ = 0V TO 2V 8 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 12. GAIN ACCURACY vs VRS+ = 0V TO 28V +25°C 0.4 -1.4 +25°C +125°C 0.2 1000 VOS (µV) 10 12 14 16 18 20 22 24 26 28 VCC (V) 2.0 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5 +100°C +25°C -40°C +125°C GAIN 100 VSENSE = 2mV, 20mV 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 14. GAIN ACCURACY vs VCC, VRS+ = 12V FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 0.2 0 0.1 -2 ACCURACY (%) -40°C +25°C -4 +100°C -6 -8 +125°C -10 -12 -14 -16 GAIN 100 VSENSE = 2mV, 20mV -18 -20 2 4 6 8 VOA PERCENT ACCURACY (%) 2 GAIN 100 0.0 -0.1 -0.2 -0.3 -40°C -0.4 +125°C -0.5 -0.6 +100°C -0.7 -0.8 -0.9 +25°C -1.0 1µ 10 12 14 16 18 20 22 24 26 28 10µ 100µ IOUT(A) VCC (V) FIGURE 15. GAIN ACCURACY vs VCC, VRS+ = 0.1V 45 40 35 GAIN 100 20 GAIN 100 VSENSE = 20mV, 100mV VRS+ = 12V 0 15 VOS (µV) GAIN (dB) 10m FIGURE 16. NORMALIZED VOA vs IOUT 25 VRS+= 100mV 5 -5 VCC = 12V -15 V SENSE = 100mV A = 100 -25 V RL = 1MΩ -35 10 100 VRS+ = 12V -20 -40 -60 -80 1k 10k FREQUENCY (Hz) 100k 1M -100 -50 FIGURE 17. GAIN vs FREQUENCY VRS+ = 100mV/12V, VSENSE = 100mV, VOUT = 50mVP-P 0.30 0 25 50 75 TEMPERATURE (°C) -0.5 100 125 GAIN 100 VRS+ = 12V -0.6 VOUT ERROR (%) 0.20 -25 FIGURE 18. VOS (µV) vs TEMPERATURE GAIN 100 VSENSE = 20mV, 100mV VRS+ = 12V 0.25 GAIN ACCURACY (%) 1m 0.15 0.10 0.05 0 -0.7 -0.8 -0.9 -0.05 -0.10 -50 -25 0 25 50 75 100 TEMPERATURE (°C) FIGURE 19. GAIN ACCURACY (%) vs TEMPERATURE 9 125 -1 -50 -25 0 25 50 75 TEMPERATURE (°C) 100 125 FIGURE 20. V OUT ERROR (%) vs TEMPERATURE FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 20 GAIN 50 18 VSENSE = 20mV, 100mV 16 12 VOS (µV) UNITS 14 10 8 6 4 2 0 -250 -200 -150 -100 -50 VOS (µV) 0 50 100 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 GAIN 50 VSENSE = 20mV, 100mV +125°C -40°C 0 2 4 150 +100°C +100°C 100 VOS (µV) VOS (µV) GAIN 50 VSENSE = 2mV, 0mV 200 +25°C -40°C 50 +125°C 0 -50 +25°C -100 -150 -40°C -200 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -250 2 2.0 FIGURE 23. VOS vs VRS+ 3000 4 6 8 +100°C 0.6 +25°C 0.4 +125°C 0 -1000 ACCURACY (%) 1000 -40°C +25°C 0.2 -40°C 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 24. VOS vs VCC, VRS+ = 12V 2000 VOS (µV) +25°C 10 12 14 16 18 20 22 24 26 28 250 VRS+ (V) 0 -0.2 +100°C -0.4 +125°C -0.6 -0.8 -1.0 -2000 -3000 8 FIGURE 22. VOS vs VRS+ GAIN 50 VSENSE = 20mV, 100mV +125°C 6 VRS+ (V) FIGURE 21. VOS (µV) DISTRIBUTION AT +25°C, VRS+ = 12V, QUANTITY: 100 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 +100°C GAIN 50 VSENSE = 2mV, 0mV 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 25. VOS vs VCC, VRS+ = VRS+ = 0.1V 10 GAIN 50 VSENSE = 20mV, 100mV -1.2 -1.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 26. GAIN ACCURACY vs VRS+ = 0V TO 28V FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 0.6 0.4 +25°C ACCURACY (%) ACCURACY (%) 0.2 0 -0.2 -0.4 +100°C -0.6 -0.8 -1.0 -1.4 -40°C +125°C -1.2 0 0.2 0.4 0.6 GAIN 50 VSENSE = 20mV, 100mV 0.8 1.0 1.2 VRS+ (V) 1.4 1.6 1.8 2.0 FIGURE 27. GAIN ACCURACY vs VRS+ = 0V TO 2V 0.1 +25°C -40°C +100°C -6 -8 -10 -12 +125°C -14 -16 GAIN 50 VSENSE = 2mV, 20mV -18 -20 2 4 6 8 VOA PERCENT ACCURACY (%) 0.2 0 -4 +100°C GAIN 50 VSENSE = 2mV, 20mV 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) GAIN 50 0.0 -0.1 -0.2 -0.3 -40°C -0.4 -0.5 +125°C -0.6 -0.7 +100°C -0.8 -0.9 +25°C 10µ 100µ IOUT(A) VCC (V) FIGURE 29. GAIN ACCURACY vs VCC, LOW-SIDE -90 25 -110 15 VOS (µV) GAIN (dB) -70 35 VRS+= 100mV -5 VRS+ = 12V VCC = 12V -15 V SENSE = 100mV A = 100 -25 V RL = 1MΩ -35 10 100 1m 10m FIGURE 30. NORMALIZED VOA vs IOUT GAIN 50 5 -40°C +125°C -1.0 1µ 10 12 14 16 18 20 22 24 26 28 45 +25°C FIGURE 28. GAIN ACCURACY vs VCC, HIGH-SIDE 2 -2 ACCURACY (%) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 GAIN 50 VSENSE = 20mV, 100mV VRS+ = 12V -130 -150 -170 -190 -210 1k 10k FREQUENCY (Hz) 100k FIGURE 31. GAIN vs FREQUENCY VRS+ = 100mV/12V, VSENSE = 100mV, VOUT = 50mVP-P 11 1M -230 -50 -25 0 25 50 75 TEMPERATURE (°C) 100 125 FIGURE 32. VOS (µV) vs TEMPERATURE FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 0.18 0.17 0.16 GAIN 50 0.08 VRS+ = 12V 0.06 VOUT ERROR (%) GAIN ACCURACY (%) 0.10 GAIN 50 VSENSE = 20mV, 100mV VRS+ = 12V 0.15 0.14 0.13 0.12 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 0.11 -0.10 0.1 -50 -25 0 25 50 75 100 -0.12 -50 125 -25 0 TEMPERATURE (°C) FIGURE 33. GAIN ACCURACY (%) vs TEMPERATURE 30 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 VOS (µV) UNITS 20 15 10 5 0 -250 -200 -150 -100 -50 0 VOS (µV) 50 100 150 0 2 4 8 +100°C -40°C +25°C 10 12 14 16 18 20 22 24 26 28 FIGURE 36. VOS vs VRS+ 250 GAIN 20 VSENSE = 20mV, 100mV +125°C 6 +125°C VRS+ (V) GAIN 20 VSENSE = 2mV, 20mV 200 150 100 VOS (µV) VOS (µV) +100°C 125 GAIN 20 VSENSE = 20mV, 100mV FIGURE 35. VOS (µV) DISTRIBUTION AT +25°C, VRS+ = 12V, QUANTITY: 100 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 100 FIGURE 34. V OUT ERROR (%) vs TEMPERATURE GAIN 20 VSENSE = 20mV, 100mV 25 25 50 75 TEMPERATURE (°C) +25°C -40°C +100°C 50 0 +25°C -50 -40°C -100 +125°C -150 -200 0 0.2 0.4 0.6 0.8 1 1.2 VRS+ (V) FIGURE 37. VOS vs VRS+ 12 1.4 1.6 1.8 2 -250 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 38. VOS vs VCC, VRS+ = 12V FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 3000 0.6 GAIN 20 VSENSE = 2mV, 20mV +25°C +100°C 0.4 2000 -40°C ACCURACY (%) VOS (µV) 1000 +125°C 0 -1000 -40°C +25°C 0.2 0 -0.2 -0.6 -0.8 -1.0 -2000 GAIN 20 VSENSE = 20mV, 100mV -1.2 -3000 2 4 6 8 -1.4 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 39. VOS vs VCC, VRS+ = 0.1V 0.6 +25°C 0 ACCURACY (%) ACCURACY (%) 0.2 -0.2 -0.4 -0.6 +100°C -40°C -0.8 -1.0 -1.2 +125°C 0 0.2 0.4 0.6 0.8 1.0 1.2 VRS+ (V) 1.4 1.6 1.8 2.0 FIGURE 41. GAIN ACCURACY vs VRS+ = 0V TO 2V 0.1 -6 +25°C -40°C -8 -10 -12 +125°C -14 -16 GAIN 20 VSENSE = 2mV, 20mV -18 -20 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 43. GAIN ACCURACY vs VCC, LOW-SIDE 13 VOA PERCENT ACCURACY (%) 0.2 +100°C 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VRS+ (V) GAIN 20 VSENSE = 2mV, 20mV +100°C +25°C -40°C +125°C 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 42. GAIN ACCURACY vs VCC, HIGH-SIDE 0 -2 ACCURACY (%) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 2 -4 0 FIGURE 40. GAIN ACCURACY vs VRS+ = 0V TO 28V GAIN 20 VSENSE = 20mV, 100mV 0.4 -1.4 +100°C +125°C -0.4 GAIN 20 0.0 -0.1 -0.2 +25°C -0.3 -0.4 +125°C -0.5 -0.6 +100°C -0.7 -0.8 -40°C -0.9 -1.0 1µ 10µ 100µ IOUT(A) 1m 10m FIGURE 44. NORMALIZED VOA vs IOUT FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 45 -20 GAIN 20 35 GAIN 20 VSENSE = 20mV, 100mV VRS+ = 12V -40 25 GAIN (dB) VOS (µV) -60 15 VRS+ = 100mV 5 VRS+ = 12V -5 VCC = 12V -15 V SENSE = 100mV A = 100 -25 V RL = 1MΩ -35 10 100 -80 -100 -120 1k 10k FREQUENCY (Hz) 100k -140 -50 1M FIGURE 45. GAIN vs FREQUENCY VRS+ = 100mV/12V, VSENSE = 100mV, VOUT = 50mVP-P 0.330 0.310 0.305 0.25 0.23 0.21 0.19 0.295 0.17 0 25 50 75 100 0.15 -50 125 -25 0 TEMPERATURE (°C) 80 120 160 200 FIGURE 49. VOS (µV) DISTRIBUTION AT +25°C, VRS+ = 12V, QUANTITY: 100 14 25 50 75 TEMPERATURE (°C) 100 125 FIGURE 48. V OUT ERROR (%) vs TEMPERATURE VOS (µV) UNITS FIGURE 47. GAIN ACCURACY (%) vs TEMPERATURE 26 GAIN 101 ADJ 24 Rf = 100k, Rg = 1k 22 V = 20mV, 100mV 20 SENSE 18 16 14 12 10 8 6 4 2 0 -200 -160 -120 -80 -40 0 40 VOS (µV) 125 0.27 0.300 -25 100 GAIN 20 VRS+ = 12V 0.29 0.3150 0.290 -50 25 50 75 TEMPERATURE (°C) 0.31 VOUT ERROR (%) GAIN ACCURACY (%) 0.320 0 FIGURE 46. VOS (µV) vs TEMPERATURE GAIN 20 VSENSE = 20mV, 100mV VRS+ = 12V 0.325 -25 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 20mV, 100mV +125°C +100°C -40°C 0 2 4 6 8 +25°C 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 50. VOS vs VRS+ FN6548.5 May 23, 2011 ISL28006 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 -200 -400 250 GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 20mV, 100mV 150 +125°C 100 +25°C -40°C GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 2mV, 20mV 200 VOS (µV) VOS (µV) Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) +100°C 50 +25°C 0 -50 -100 +100°C -40°C -150 -200 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 +125°C -250 2 2.0 4 6 8 VRS+ (V) FIGURE 51. VOS vs VRS+ +100°C 2000 +25°C FIGURE 52. VOS vs VCC, HIGH-SIDE 1000 VOS (µV) 0.6 GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 2mV, 20mV -40°C +125°C 0 0.4 -1000 +125°C +100°C 0.2 ACCURACY (%) 3000 10 12 14 16 18 20 22 24 26 28 VCC (V) GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 20mV, 100mV 0 -0.2 +25°C -0.4 -40°C -0.6 -0.8 -1.0 -2000 -1.2 -3000 2 4 6 8 -1.4 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 53. VOS vs VCC, LOW-SIDE 0.6 0 +100°C +125°C ACCURACY (%) ACCURACY (%) 0.2 -0.2 -0.4 -0.6 +25°C -40°C -0.8 -1.0 -1.2 -1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 VRS+ (V) 1.4 1.6 1.8 FIGURE 55. GAIN ACCURACY vs VRS+ = 0V TO 2V 15 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VRS+ (V) FIGURE 54. GAIN ACCURACY vs VRS+ = 0V TO 28V GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 20mV, 100mV 0.4 0 2.0 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 -40°C +100°C +25°C GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 2mV, 20mV +125°C 2 4 6 8 10 12 14 16 18 20 22 24 26 28 VCC (V) FIGURE 56. GAIN ACCURACY vs VCC, VRS+ = 12V FN6548.5 May 23, 2011 ISL28006 Typical Performance Curves VCC = 12V, RL = 1MΩ, unless otherwise specified. (Continued) 0.2 0.0 2 ACCURACY (%) -2 +100°C +25°C -40°C -4 -6 -8 +125°C -10 -12 -14 GAIN 101 ADJ Rf = 100k, Rg = 1k VSENSE = 2mV, 20mV -16 -18 -20 2 4 6 8 VOA PERCENT ACCURACY (%) 0 10 12 14 16 18 20 22 24 26 28 +25°C -0.2 -40°C -0.4 -0.6 GAIN 101 ADJ R = 100k -0.8 Rf = 1k g -1.0 0.2 0.0 -0.2 -0.4 -0.6 GAIN 21 ADJ -0.8 Rf = 100k R = 5k -1.0 g 1µ 10µ +100°C +125°C +25°C -40°C +100°C +125°C 100µ IOUT(A) VCC (V) FIGURE 57. GAIN ACCURACY vs VCC, VRS+ = 0.1V 45 GAIN (dB) 30 VRS+ = 0.1V GAIN = 21 VRS+ = 12V GAIN = 21 0 -50 GAIN = 21 -100 -150 GAIN = 101 -200 -250 -300 -350 -50 1M FIGURE 59. GAIN vs FREQUENCY VRS+ = 100mV/12V, VSENSE = 100mV, VOUT = 50mVP-P -25 0 25 50 75 TEMPERATURE (°C) 100 125 FIGURE 60. VOS (µV) vs TEMPERATURE 0.6 0.40 0.5 0.35 GAIN = 101 0.30 VOUT ERROR (%) GAIN ACCURACY (%) GAIN = 21, 101 Rf = 100k Rg = 1k, 5k RL = 1MΩ 50 10 GAIN = 21, 51, 101 Rf = 100k 5 Rg = 1k, 2k, 5k VRS+ = 12V GAIN = 51 RL = 1MΩ 0 100 1k 10k 100k FREQUENCY (Hz) 0.25 0.20 0.15 VRS+ = 12V 100 VRS+ = 12V GAIN = 51 VCC = 12V 15 VSENSE = 100mV VSENSE = 20mV, 100mV 150 VRS+ = 0.1V GAIN = 101 25 20 200 VOS (µV) 35 10m FIGURE 58. NORMALIZED VOA vs IOUT VRS+ = 12V GAIN = 101 40 1m VSENSE = 20mV, 100mV VRS+ = 12V 0.10 GAIN = 21, 101 Rf = 100k 0.05 Rg = 1k, 5k RL = 1MΩ 0 -50 -25 0 GAIN = 21 25 50 75 100 TEMPERATURE (°C) FIGURE 61. GAIN ACCURACY (%) vs TEMPERATURE 16 125 0.4 GAIN = 101 0.3 0.2 0.1 VSENSE = 20mV, 100mV VRS+ = 12V 0 GAIN = 21, 101 Rf = 100k -0.1 Rg = 1k, 5k RL = 1MΩ -0.2 -50 -25 0 GAIN = 21 25 50 75 100 125 TEMPERATURE (°C) FIGURE 62. V OUT ERROR (%) vs TEMPERATURE FN6548.5 May 23, 2011 ISL28006 Test Circuits and Waveforms VCC VR1 VCC R1 + + VRS+ VSENSE RS+ + VSENSE VRS+ GND - 1MΩ RS+ + OUT RS- - - RL VOUT R2 OUT RSGND 1MΩ RL VOUT VR2 FIGURE 63. IS, VOS, VOA, CMRR, PSRR, GAIN ACCURACY FIGURE 64. INPUT BIAS CURRENT, LEAKAGE CURRENT SIGNAL GENERATOR VCC RS+ RS+ OUT RS- VRS+ GND 1MΩ VRS- VCC VSENSE VRS+ OUT RSGND RL VOUT 1MΩ RL VOUT PULSE GENERATOR FIGURE 65. ts, SATURATION RECOVERY TIME FIGURE 66. GAIN vs FREQUENCY VCC RS+ OUT RS- VRS+ GND 1MΩ RL VOUT PULSE GENERATOR FIGURE 67. SLEW RATE Applications Information Functional Description The ISL28006-20, ISL28006-50 and ISL28006-100 are single supply, uni-directional current sense amplifiers with fixed gains of 20V/V, 50V/V and 100V/V respectively. The ISL28006-ADJ is single supply, uni-directional current sense amplifier with an adjustable gain via external resistors (see Figure 72). The ISL28006-ADJ is stable for gains of 20 and higher. The ISL28006 is a 2-stage amplifier. Figure 68 shows the active circuitry for high-side current sense applications where the sense voltage is between 1.35V to 28V. Figure 69 shows the active circuitry for ground sense applications where the sense voltage is between 0V to 1.35V. The first stage is a bi-level trans-conductance amp and level translator. The gm stage converts the low voltage drop (VSENSE) sensed across an external milli-ohm sense resistor, to a current (@ gm = 21.3µA/V). The trans-conductance amplifier forces a current through R1 resulting to a voltage drop across R1 that is equal to the sense voltage (VSENSE). The current through R1 is mirrored across R5 creating a ground-referenced voltage at the input of the second amplifier equal to VSENSE. 17 The second stage is responsible for the overall gain and frequency response performance of the device. The fixed gains (20, 50, 100) are set with internal resistors Rf and Rg. The variable gain (ADJ) has an additional FB pin and uses external gain resistors to set the gain of the output. For the fixed gain amps the only external component needed is a current sense resistor (typically 0.001Ω to 0.01Ω, 1W to 2W). The transfer function for the fixed gain parts is given in Equation 1. V OUT = GAIN × ( I S R S + V OS ) (EQ. 1) The transfer function for the adjustable gain part is given in Equation 2. RF⎞ ⎛ V OUT = ⎜ 1 + -------⎟ ( I S R S + V OS ) R ⎝ G⎠ (EQ. 2) The input gm stage derives its ~2.86µA supply current from the input source through the RS+ terminal as long as the sensed voltage at the RS+ pin is >1.35V and the gmHI amplifier is selected. When the sense voltage at RS+ drops below the 1.35V threshold, the gmLO amplifier kicks in and the gmLO output current reverses, flowing out of the RS- pin. FN6548.5 May 23, 2011 ISL28006 VCC OPTIONAL FILTER CAPACITOR I = 2.86µA VSENSE IS RS+ + R1 VSENSE RS HIGH-SIDE SENSING VRS+ = 2V TO 28V gmHI - VCC = 2V to 28V RSR2 + OPTIONAL TRANSIENT PROTECTION OUT - 1.35V Rf ADJ OPTION ONLY FB R3 gmLO ‘VSENSE Rg R5 IMIRROR LOAD R4 GND FIGURE 68. HIGH-SIDE CURRENT DETECTION VCC OPTIONAL FILTER CAPACITOR I = 2.86µA VSENSE IS RS+ + R1 RS VSENSE LOW-SIDE SENSING VRS+= 0V TO 2V gmHI - VCC = 2V TO 28V RSR2 LOAD + OPTIONAL TRANSIENT PROTECTION 1.35V R3 - VCC OUT Rf FB gmLO IMIRROR R5 Rg ADJ OPTION ONLY ‘VSENSE R4 GND FIGURE 69. LOW-SIDE CURRENT DETECTION 18 FN6548.5 May 23, 2011 ISL28006 Hysteretic Comparator The input trans-conductance amps are under control of a hysteretic comparator operating from the incoming source voltage on the RS+ pin (Figure 68). The comparator monitors the voltage on RS+ and switches the sense amplifier from the low-side gm amp to the high-side gm amplifier whenever the input voltage at RS+ increases above the 1.35V threshold. Conversely, a decreasing voltage on the RS+ pin, causes the hysteric comparator to switch from the high-side gm amp to the low-side gm amp as the voltage decreases below 1.35V. It is that low-side sense gm amplifier that gives the ISL28006 the proprietary ability to sense current all the way to 0V. Negative voltages on the RS+ or RS- are beyond the sensing voltage range of this amplifier. 0.5 0.4 ACCURACY (%) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 ( ( R P × I RS- ) = ( 100Ω × 130nA ) = 13μV ) (EQ. 3) Switching applications can generate voltage spikes that can overdrive the amplifier input and drive the output of the amplifier into the rails, resulting in a long overload recover time. Capacitors CM and CD filter the common mode and differential voltage spikes. Error Sources There are 3 dominant error sources: gain error, input offset voltage error and Kelvin voltage error (see Figure 71). The gain error is dominated by the internal resistance matching tolerances. The remaining errors appear as sense voltage errors at the input to the amplifier. They are VOS of the amplifier and Kelvin voltage errors. If the transient protection resistor is added, an additional VOS error can result from the IxR voltage due to input bias current. The limiting resistor should only be added to the RS- input, due to the high-side gm amplifier (gmHI) sinking several micro amps of current through the RS+ pin. Layout Guidelines -0.4 -0.5 value of 100Ω will provide protection for a 2V transient with the maximum of 20mA flowing through the input while adding only an additional 13µV (worse case over-temperature) of VOS. Refer to Equation 3: 0 0.2 0.4 0.6 0.8 1.0 1.2 VRS+ (V) 1.4 1.6 1.8 2.0 The Kelvin Connected Sense Resistor FIGURE 70. GAIN ACCURACY vs VRS+ = 0V TO 2V Typical Application Circuit Figure 72 shows the basic application circuit and optional protection components for switched-load applications. For applications where the load and the power source is permanently connected, only an external sense resistor is needed. For applications where fast transients are caused by hot plugging the source or load, external protection components may be needed. The external current limiting resistor (RP) in Figure 72 may be required to limit the peak current through the internal ESD diodes to <20mA. This condition can occur in applications that experience high levels of in-rush current causing high peak voltages that can damage the internal ESD diodes. An RP resistor The source of Kelvin voltage errors is illustrated in Figure 71. The resistance of 1/2 Oz copper is ~1mΩ per square with a TC of ~3900ppm/°C (0.39%/°C). When you compare this unwanted parasitic resistance with the total 1mΩ to 10mΩ resistance of the sense resistor, it is easy to see why the sense connection must be chosen very carefully. For example, consider a maximum current of 20A through a 0.005Ω sense resistor, generating a VSENSE = 0.1 and a full scale output voltage of 10V (G = 100). Two side contacts of only 0.25 square per contact puts the VSENSE input about 0.5 x 1mΩ away from the resistor end capacitor. If only 10A the 20A total current flows through the kelvin path to the resistor, you get an error voltage of 10mV (10A x 0.5sq x 0.001Ω/sq. = 10mV) added to the 100mV sense voltage for a sense voltage error of 10% (0.110V-0.1)/0.1V) x 100. CURRENT RESISTOR Current SENSE Sense Resistor CURRENT Current InIN 1mΩ 10mΩ 1 toTO 10mO Non-uniform NON-UNIFORM CURRENT FLOW Current Flow Copper Trace TRACE 1/2 Oz COPPER 1mΩ /SQ 30mO/Sq. CURRENT OUT Current Out PC PC BOARD Board KELVIN CONTACTS Kelvin VVSContacts S FIGURE 71. PC BOARD CURRENT SENSE KELVIN CONNECTION 19 FN6548.5 May 23, 2011 ISL28006 2.7VDC TO 28VDC VCC I = 2.86µA RS+ (1mΩ RS TO 0.1Ω) FIXED GAIN OPTION ONLY gmHI CD RS- CM + RP + - OUT - 1.35V 0.1VDC TO 28VDC FB ADJ OPTION ONLY gmLO LOAD GND FIGURE 72. TYPICAL APPLICATION CIRCUIT Overall Accuracy (VOA %) where: VOA is defined as the total output accuracy Referred-to-Output (RTO). The output accuracy contains all offset and gain errors, at a single output voltage. Equation 4 is used to calculate the % total output accuracy. • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) ⎛ V OUT actual – V OUT exp ected⎞ V OA = 100 × ⎜ ------------------------------------------------------------------------------⎟ V OUT exp ected ⎝ ⎠ (EQ. 4) • PDMAX for each amplifier can be calculated using Equation 7: V OUTMAX PD MAX = V S × I qMAX + ( V S - V OUTMAX ) × -----------------------RL (EQ. 7) where: where VOUT Actual = VSENSE x GAIN Example: Gain = 100, For 100mV VSENSE input we measure 10.1V. The overall accuracy (VOA) is 1% as shown in Equation 5. 10.1 – 10 V OA = 100 × ⎛ -------------------------⎞ = 1% ⎝ 10 ⎠ (EQ. 5) • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VCC = Total supply voltage • IqMAX = Maximum quiescent supply current of 1 amplifier Power Dissipation • VOUTMAX = Maximum output voltage swing of the application It is possible to exceed the +150°C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 6: • RL = Load resistance T JMAX = T MAX + θ JA xPD MAXTOTAL 20 (EQ. 6) FN6548.5 May 23, 2011 ISL28006 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE 4/12/11 9/2/10 5/12/10 REVISION CHANGE FN6548.5 Converted to new template Page 1 - Changed headings for “Typical Application” and “Gain Accuracy vs VRS+ = 0V to 28V” to Figure titles (Figures 1 and 2). Page 1 - Updated Intersil Trademark statement at bottom of page 1 per directive from Legal. Page 7 - Updated over temp note in Min Max column of spec tables from "Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested." to new standard "Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design." Page 19 - Figure 69, Low side current detection schematic: Moved the LOAD from the ground side of the power side circuit to the high side. FN6548.4 Added -T7A tape and reel options to Ordering Information Table for all packages. FN6548.3 Added Note 4 to Part Marking Column in “Ordering Information” on page 3. Corrected hyperlinks in Notes 1 and 3 in “Ordering Information” on page 3. 4/8/10 Removed “Coming Soon” from evaluation boards in “Ordering Information” on page 3. 4/7/10 Added “Related Literature” on page 1 Updated Package Drawing Number in the “Ordering Information” on page 3 for the 20V, 50V and 100V options from MDP0038 to P50.64A. Revised package outline drawing from MDP0038 to P5.064A on page 24. MDP0038 package contained 2 packages for both the 5 and 6 Ld SOT-23. MDP0038 was obsoleted and the packages were separated and made into 2 separate package outline drawings; P5.064A and P6.064A. Changes to the 5 Ld SOT-23 were to move dimensions from table onto drawing, add land pattern and add JEDEC reference number. 3/10/10 FN6548.2 Releasing adjustable gain option. Added adjustable block diagram (Page 2), Added adjustable gain limits to electrical spec table, added Figures 47 through 60, Added +85°C curves to Figures 6 thru 14, 20 thru 28, 34 thru 42, and Figures 48 thru 56. Modified Figure 70. 2/4/10 FN6548.1 -Page 1: Edited last sentence of paragraph 2. Moved order of GAIN listings from 20, 50, 100 to 100, 50, 20 in the 3rd paragraph. Under Features ....removed "Low Input Offset Voltage 250µV, max" Under Features .... moved order of parts listing from 20, 50, 100 (from top to bottom) to 100, 50, 20. -Page 3: Removed coming soon on ISL28006FH50Z and ISL28006FH20Z and changes the order or listing them to 100, 50, 20. -Page 5: VOA test. Under conditions column ...deleted 20mV to. It now reads ... Vsense = 100mV SR test. Under conditions column ..deleted what was there. It now reads ... Pulse on RS+pin, See Figure 51 -Page 6: ts test. Removed Gain = 100 and Gain = 100V/V in both description and conditions columns respectively. -Page 9: Added VRS+= 12V to Figures 16, 17, 18. -Page 11: Added VRS+= 12V to Figures 30, 31, 32. -Page 13 & 14: Added VRS+= 12V to Figures 44, 45, 46. -Page 14 Added Figure 51 and adjusted figure numbers to account for the added figure. -Figs 8, 26, and 40 change "HIGH SIDE" to "VRS = 12V", where RS is subscript. -Figs 9, 27, and 41 change "LOW SIDE" to "VRS = 0.1V", where RS is subscript. 12/14/09 FN6548.0 Initial Release 21 FN6548.5 May 23, 2011 ISL28006 Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL28006 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 FN6548.5 May 23, 2011 ISL28006 Package Outline Drawing P5.064A 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10 1.90 0-3° D A 0.08-0.20 5 4 PIN 1 INDEX AREA 2.80 3 1.60 3 0.15 C D 2x 2 5 (0.60) 0.20 C 2x 0.95 SEE DETAIL X B 0.40 ±0.05 3 END VIEW 0.20 M C A-B D TOP VIEW 10° TYP (2 PLCS) 2.90 5 H 0.15 C A-B 2x C 1.45 MAX 1.14 ±0.15 0.10 C SIDE VIEW SEATING PLANE (0.25) GAUGE PLANE 0.45±0.1 0.05-0.15 4 DETAIL "X" (0.60) (1.20) NOTES: (2.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. This dimension is measured at Datum “H”. 6. Package conforms to JEDEC MO-178AA. (0.95) (1.90) TYPICAL RECOMMENDED LAND PATTERN 23 FN6548.5 May 23, 2011 ISL28006 Package Outline Drawing P6.064 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 4, 2/10 0-8° 1.90 0.95 0.08-0.22 D A 6 5 4 2.80 PIN 1 INDEX AREA 1.60 +0.15/-0.10 3 3 (0.60) 1 2 3 0.20 C 2x 0.40 ±0.10 B SEE DETAIL X 3 0.20 M C A-B D END VIEW TOP VIEW 10° TYP (2 PLCS) 2.90 ±0.10 3 1.15 +0.15/-0.25 C 0.10 C SEATING PLANE 0.00-0.15 SIDE VIEW (0.25) GAUGE PLANE 1.45 MAX DETAIL "X" 0.45±0.1 4 (0.95) (0.60) (1.20) (2.40) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. Package conforms to JEDEC MO-178AB. TYPICAL RECOMMENDED LAND PATTERN 24 FN6548.5 May 23, 2011