ON FAN7085M-GF085 High side gate driver with recharge fet Datasheet

High Side Gate Driver with Recharge FET
Features
Description
• Qualified to AEC Q100
The FAN7085-GF085 is a high-side gate drive IC with reset
input and built-in recharge FET. It is designed for high voltage
and high speed driving of MOSFET or IGBT, which operates up
to 300V. ON Semiconductor's high-voltage process and
common-mode noise cancellation technique provide stable
operation in the high side driver under high-dV/dt noise
circumstances. Logic input is compatible with standard CMOS
outputs. The UVLO cir-cuits prevent from malfunction when
VCC and VBS are lower than the specified threshold voltage. It
is available with space saving SOIC-8 Package. Minimum
source and sink current capability of output driver is 250mA
and 250mA. Built-in recharge FET to refresh bootstrap circuit is
very useful for circuit topology requiring switches on low and
high side of load.
• Floating channel designed for bootstrap operation fully operational up to 300V.
• Tolerance to negative transient voltage on VS pin
• dv/dt immune.
• Gate drive supply range from 4.5V to 20V
• Under-voltage lockout
• CMOS Schmitt-triggered inputs with pull-down and pull-up
• High side output out of phase with input (Inverted input)
• Reset input
• Internal recharge FET for bootstrap refresh
SOIC-8
Typical Applications
• Diesel and gasoline injectors/valves
• MOSFET-and IGBT high side driver applications

Ordering Information
Device
Package
Operating
Temp.
SOIC-8
-40 C ~ 125 C
FAN7085MX-GF085 SOIC-8
-40 C ~ 125 C
FAN7085M-GF085
X : Tape & Reel type
©2012 Semiconductor Components Industries, LLC.
September-2017,Rev.2
Publication Order Number:
FAN7085M-GF085/D
FAN7085-GF085 High Side Gate Driver with Recharge FET
FAN7085-GF085
VB
Under
Voltage Reset
VB to VS
Pulse Filter
Flip Flop
Brake before
make
HO
Under Voltage
Reset VCC to GND
RESET-
VS
Level Shifter
ON
Logic
Pulse
Filter
IN-
Delay
Level Shifter
OFF
GND
Pin Assignments
1
2
3
4
VCC
VB
IN
HO
GND
NC
RESET VS
8
7
6
5
Pin Definitions
Pin Number
Pin Name
I/O
Pin Function Description
1
VCC
P
Driver supply voltage, typically 5V
2
IN-
I
Driver control signal input (Negative Logic)
3
GND
P
Ground
4
RESET-
I
Driver enable input signal (Negative Logic)
5
VS
P
High side floating offset for MOSFET Source connection
6
NC
-
No connection (No Bond wire)
7
HO
A
High side drive output for MOSFET Gate connection
8
VB
P
Driver output stage supply
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2
Recharge Path
VCC
FAN7085-GF085 High Side Gate Driver with Recharge FET
Block Diagrams
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND.
Parameter
Symbol
Min.
Max.
Unit
High side floating supply voltage
VBS
-0.3
25
V
High side driver output stage voltage
VB
-5
325
V
Vs
-25
300
V
High side floating output voltage
VHO
VS-0.3
VB+0.3
V
Supply voltage
VCC
-0.3
25
V
VIN
-0.3
Vcc+0.3
V
VRES
-0.3
Vcc+0.3
V
Neg. transient: 0.5 ms, external MOSFET off
High side floating supply offset voltage
Neg. transient 0.2 us
Input voltage for INInput voltage for RESET1)
Pd
0.625
W
Thermal resistance, junction to ambient 1)
Rthja
200
C/W
Electrostatic discharge voltage
(Human Body Model)
VESD
1.5K
Charge device model
VCDM
500
Junction Temperature
Tj
Storage Temperature
TS
Power Dissipation
V
V
-55
150
C
150
C
Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions;
JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural condition(StillAir)
JESD51-3: Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.-40°C <= Ta <= 125°C
Parameter
Symbol
Min.
Max.
Unit
VB
VS+4.5
VS+20
V
VS
-3
300
V
VS
-25
300
V
High side floating output voltage
VHO
Vs
VB
V
Allowable offset voltage Slew Rate 1)
dv/dt
-
50
V/ns
Supply voltage for logic part
VCC
4.5
20
V
Input voltage for IN-
VIN
0
Vcc
V
VRESET
0
High side floating supply voltage(DC)
Transient:-10V@ 0.2 us
High side floating supply offset voltage(DC)
@VBS=7V
High side floating supply offset voltage(Transient)
0.2us @VBS<25V
Input voltage for RESETSwitching frequency 2)
Fs
Vcc
V
200K
Hz
Minimum low input width 3)
tIN(low,min)
560
-
ns
Minimum high input width 3)
tIN(high,min)
60
-
ns
Minimum operating voltage of VB related to GND
Ambient temperature
V
B(MIN)4)
Ta
4
-
V
-40
125
C
Note: 1) Guaranteed by design.
2) Duty = 0.5, VBS >=7V
3) Guaranteed by design. Pulse widths below the specified values, may be ignored. Output will either follow the input signal or will ignore it.
No false output state is guaranteed when minimum input width is smaller than tin
4) Guaranteed by design
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3
FAN7085-GF085 High Side Gate Driver with Recharge FET
Absolute Maximum Ratings
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 5V, VBS = 7V, VS = 0V, VRESET = 5V, RL = 50, CL = 2.5nF.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
VCC and VBS supply under voltage
positive going threshold
VCCUV+
VBSUV+
Vcc and VBS rising from 0V
-
3.7
4.3
V
VCC and VBS supply under voltage
negative going threshold
VCCUVVBSUV-
Vcc and VBS dropping from 5V
2.8
3.4
-
V
VCC and VBS under voltage hysteresis
VCCUVH
VBSUVH
-
0.02
0.3
-
V
tduvcc
tduvbs
VCC: 6.5V->2.4V or 2.4V->6.5V
VBS: 6.5V->2.4V or 2.4V->6.5V
0.5
0.5
20
20
us
us
ILK
VB=VS=300V
-
-
200
uA
-
-
VCC and VBS Supply Characteristics
Under voltage lockout response time
Offset supply leakage current
Quiescent Vcc supply current
IQCC
Vcc=20V
500
uA
Quiescent VBS supply current
IQBS1
Static mode,
VBS=7V, VIN=0 or 5V
100
uA
Quiescent VBS supply current
IQBS2
Static mode,
VBS=16V, VIN=0 or 5V
200
uA
VBS drop due to output turn-on
(Design guaranty)
VBS
VBS=7V, Cbs=1uF, tdIG-IN =3uS,
tTEST=100uS
210
mV
Input Characteristics
High logic level input voltage for IN-
VIH
0.6VCC
-
-
V
Low logic level input voltage for IN-
VIL
-
-
0.28VCC
V
Low logic level input bias current for IN-
IIN-
VIN=0
5
25
60
uA
High logic level input bias current for IN-
IIN+
VIN=5V
-
-
5
uA
Full up resistance at IN
RIN
83
200
1000

High logic level input voltage for RESET-
VRH
0.6Vcc
-
-
V
0.28Vcc
V
5
25
60
uA
5
uA
83
200
1000

-
-
0.1
V
Low logic level input voltage for RESET-
VRL
High logic level input current for RESET-
IRES+
VRESET=5V
Low logic level input bias current for RESET-
IRES-
VRESET=0
Full down resistance at RESET-
RRES
Output characteristics
High level output voltage, VB - VHO
VOH
Low level output voltage, VHO-GND
VOL
IO=0
-
-
0.1
V
Peak output source current
IO+
VIN=5V
250
450
-
mA
IO-
VIN=0
250
Peak output sink current
Equivalent output resistance
IO=0
450
-
mA
ROP
15.5
28

RON
15.5
28

7.9
9.8
us
0.2
0.4
us
1.2
V
Recharge Characteristics
Recharge TR turn-on propagation delay
Ton_rech
Recharge TR turn-off propagation delay
Toff_rech
Recharge TR on-state voltage drop
VRECH
Is=1mA, VIN=5V @125C
High side turn-off to recharge gate turn-on
DTHOFF
Vcc=5V, VS=7V
4
7.8
9.8
us
Recharge gate turn-off to high side turn-on
DTHON
Vcc=5V, VS=7V
0.1
0.4
0.7
us
4
Dead Time Characteristics
Note: The input parameter are referenced to GND. The VO and IO parameters are referenced to GND.
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4
FAN7085-GF085 High Side Gate Driver with Recharge FET
Statics Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 5V, VBS = 7V, VS = 0V, VRESET = 5V, RL = 50, CL = 2.5nF.
Parameter
Symbol
Conditions
Input-to-output turn-on propagation delay
tplh
50% input level to 10% output level,
VS = 0V
Input-to-output turn-off propagation delay
tphl
50% input level to 90% output level
VS = 0V
RESET-to-output turn-off propagation delay
tphl_res
RESET-to-output turn-on propagation delay
tplh_res
tr1
Output rising time
Min. Typ. Max. Unit
0.56
1
us
-
0.15
0.5
us
50% input level to 90% output level
-
0.17
0.5
us
50% input level to 10% output level
-
0.56
1
us
Tj=25C
-
65
200
ns
-
400
ns
tr2
Output falling time
tr3
Tj=25C,VBS=16V
65
200
ns
tr4
VBS=16V
-
400
ns
tf1
Tj=25C
25
200
ns
-
300
ns
tf2
-
tf3
Tj=25C,VBS=16V
25
200
ns
tf4
VBS=16V
-
300
ns
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5
FAN7085-GF085 High Side Gate Driver with Recharge FET
Dynamic Electrical Characteristics
1. Logic Tables
VCC
VBS
RESET-
IN-
Ho
RechFET
< VCCUVLOX
X
X
X
OFF
ON
X
LOW
X
OFF
ON
X
X
X
HIGH
OFF
ON
> VCCUVLO+
> VBSUVLO+
HIGH
LOW
ON
OFF
> VCCUVLO+
< VBSUVLO-
HIGH
LOW
OFF
OFF
Notes:
X means independent from signal
IN-=LOW indicates that the high side NMOS is ON
IN-=HIGH indicates that the high side NMOS is OFF
RechFET =ON indicates that the recharge MOSFET is ON
RechFET =OFF indicates that the recharge MOSFET is OFF
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6
FAN7085-GF085 High Side Gate Driver with Recharge FET
Application Information
FAN7085-GF085 High Side Gate Driver with Recharge FET
Typical Application Circuit
1. Typical Application Circuit
Up to 300V
D1
VCC
VCC
VB
IN-
HO
GND
NC
RESET-
VS
R1
C3
R2
C2
Load
C1
2. Application Example
From Charge Pump
Voltage Source
D5
5V
C2
VCC
VB
IN-
HO
GND
NC
RESET-
VS
R1
S1
C3
R2
C1
Load
D3
R3
From LS Driver
C4
S2
D4
R4
GND
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1. Input/Output Timing Diagrams
IN-
RESET-
90%
90%
VS
10%
10%
tr
VHO
tf
tphl
Recharge
tplh
Toff_rech
Ton_rech
Figure.1 Input and Output Timing Diagram and Switching Time Waveform Definition
2. Reset Timing Diagrams
IN-
RESET-
VHO
tplh_res
tphl_res
Figure.2 Reset and Output Timing Diagram
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8
FAN7085-GF085 High Side Gate Driver with Recharge FET
Input-Output Waveforms
Ig
INIg
RESET-
7V
VCC
VB
IN-
HO
GND
NC
RESET-
VS
50R
VB drop
VB-VS
1u
2n5
Brake before make
Figure3.b VB Drop Voltage Test Circuit
Figure3.a VB Drop Voltage Diagram
4.Recommendation Min. Short Pulse Width
Bat2
Bat1
1
2
3
4
VCC
VB
RESET
HO
IN
N.C
COM
VS
8
7
6
Tpulse =560nS
0.1uF
IN
5
60%
FAN7085
Figure 4a.Short Pulse Width Test Circuit and Pulse Width Waveform
142KHz
Less than
430nS Pulse
Width
IN
HO
Abnormal Output
Figure 4b. Abnormal Output Waveform with short pulse width
142KHz
Recommended
pulse width 560nS
IN
HO
Figure 4c. Recommendation of pulse width Output Waveform
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9
28%
FAN7085-GF085 High Side Gate Driver with Recharge FET
3.VB Drop Voltage Diagram
This performance graphs based on ambient temperature -40C ~125C
2.6
3.2
VBS=7V, RL=50, CL=2.5nF
VBS=7V, RL=50, CL=2.5nF
2.4
2.8
Vinth- (V)
Vinth+ (V)
3.0
2.6
2.2
2.0
2.4
Typ.
Typ.
2.2
4.4
4.7
5.0
5.3
5.6
5.9
6.2
1.8
4.4
6.5
4.7
5.0
Figure 5a. Positive IN and RESET Threshold vs VCC Supply
1600
Output Source Cureent (mA)
Output Sink Cureent (mA)
5.9
6.2
6.5
500
VCC=5V
o
-40 C
1200
o
125 C
800
400
5
10
15
VCC=5V, VBS=7V
Typ.
450
400
350
300
-50
20
0
100
150
Temperature ( C)
Figure6a. Output Sink Current vs VBS Supply
Figure6b. Output Source Current vs Temperature
650
Turn-off Propagation Delay (ns)
250
VCC=5V,VBS=7V, RL=50, CL=2.5nF
620
590
560
Typ.
530
500
-50
50
o
VBS(V)
Turn-on Propagation Delay (ns)
5.6
Figure 5b. Negative IN and RESET Threshold vs VCC Supply
2000
0
5.3
Vsupply (V)
Vsupply (V)
0
50
100
150
VCC=5V,VBS=7V, RL=50, CL=2.5nF
200
150
Typ.
100
-50
o
Figure 7a. Turn-On Propagation Delay Time vs Temperature
0
50
100
150
o
Temperature( C)
Temperature ( C)
Figure 7b. Turn-Off Propagation Delay Time vs Temperature
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10
FAN7085-GF085 High Side Gate Driver with Recharge FET
Performance Graphs
RES-to-Output Turn-off Propagation Delay (ns)
RES-to-Output Turn-on Propagation Delay (ns)
VCC=5V, VBS=7V, RL=50, CL=2.5nF
650
600
550
Typ.
500
-50
0
50
100
150
250
VCC=5V, VBS=7V, RL=50, CL=2.5nF
200
150
Typ.
100
-50
0
Figure 8a. RES to Output Turn-On Propagation Delay vs Temperature
50
Logic "1" RES Input Current (uA)
Logic "0" Input Current (uA)
VCC=5V, RL=50, CL=2.5nF
40
Typ.
30
20
10
0
-50
0
50
100
VCC=5V, RL=50, CL=2.5nF
40
30
Typ.
20
10
0
-50
150
0
o
50
100
150
o
Temperature ( C)
Temperature ( C)
Figure 9. Logic “0” IN Input Current vs Temperature
Figure 10. Logic “1” RESET Input Current vs Temperature
5.0
5.0
4.5
VBS Supply Voltage(V)
4.5
VBS Supply Voltage(V)
150
Figure 8b. RES to Output Turn-Off Propagation Delay vs Temperatur
50
Max.
4.0
Typ.
3.5
Min.
4.0
3.5
Max.
Typ.
3.0
Min.
2.5
2.5
2.0
-50
100
Temperature ( C)
Temperature ( C)
3.0
50
o
o
0
50
100
150
2.0
-50
50
100
150
o
Temperature( C)
Figure 11a. VBS Under Voltage Threshold(+) vs Temperature
0
Temperature( C)
o
Figure 11b. VBS Under Voltage Threshold(-) vs Temperature
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FAN7085-GF085 High Side Gate Driver with Recharge FET
700
5.0
4.5
Max.
VCC Supply Voltage(V)
VCC Supply Voltage(V)
4.5
4.0
Typ.
3.5
Min.
3.0
2.5
2.0
-50
0
50
100
4.0
3.5
Max.
Typ.
3.0
Min.
2.5
2.0
-50
150
0
50
o
VCC=5v, VBS=7, VRL=50, CL=2.5nF
Typ.
6
0
50
100
Figure 12b. VCC Under Voltage Threshold(-) vs Temperature
Recharge Gate Turn-off Propagation
Delay (ns)
Recharge Transistor Turn-on Propagation
Delay (us)
10
4
-50
300
VBS=7V
VCC=5v, VBS=7V, RL=50, CL=2.5nF
260
220
180
Typ.
140
-50
150
0
o
Temperature( C)
High Side Turn-off to Recharge Gate
Turn-on (us)
I (mA)
1.4
1.0
Typ.
0.8
150
Figure 14. Recharge FET Turn-off Delay time
VCC=5v, VBS=7V, RL=50, CL=2.5nF
0.6
100
o
1.8
0.2
0.4
50
Temperature ( C)
Figure 13. Recharge FET Turn-on Delay time
0.6
150
Temperature( C)
Figure 12a. VCC Under Voltage Threshold(+) vs Temperature
8
100
o
Temperature( C)
1.0
1.2
10
VCC=5v, VBS=7V, RL=50, CL=2.5nF
8
6
4
-50
0
50
100
150
o
Temperature ( C)
V (V)
Figure 15. Recharge FET I-V curve
Typ.
Figure 16. High Side Turn-off to Recharge FET turn-on VS Temperature
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FAN7085-GF085 High Side Gate Driver with Recharge FET
5.0
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