MC10EPT20, MC100EPT20 3.3V LVTTL/LVCMOS to Differential LVPECL Translator The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC−8 NB package and the single gate of the EPT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation. ♦ TSSOP−8 DT SUFFIX CASE 948R−02 DFN−8 MN SUFFIX CASE 506AA MARKING DIAGRAMS* 8 8 1 HPT20 ALYW G 1 1 HA20 ALYWG G 1 KA20 ALYWG G 1 8 8 KPT20 ALYW G H K 5W 3Q M 1 = MC10 = MC100 = MC10 = MC100 = Date Code 5W MG G VCC = 3.0 V to 3.6 V with GND = 0 V PNP TTL Input for Minimal Loading Q Output will Default HIGH with Input Open These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 1 SOIC−8 NB D SUFFIX CASE 751−07 • 390 ps Typical Propagation Delay • Maximum Input Clock Frequency > 1 GHz Typical • Operating Range: • • • 8 8 A L Y W G 4 3Q MG G Features www.onsemi.com 4 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information on page 7 of this data sheet. © Semiconductor Components Industries, LLC, 2016 August, 2016 − Rev. 12 1 Publication Order Number: MC10EPT20/D MC10EPT20, MC100EPT20 Table 1. PIN DESCRIPTION NC Q Q 1 8 LVTTL 2 3 7 VCC D 6 NC 5 GND LVPECL NC 4 PIN FUNCTION Q, Q Differential PECL Outputs D LVTTL Input VCC Positive Supply GND Ground NC No Connect EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 1.5 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 NB TSSOP−8 DFN−8 Pb-Free Pkg Level 1 Level 3 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 150 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2 MC10EPT20, MC100EPT20 Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Rating Unit 6 V 6 V 50 100 mA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8 NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−8 185 140 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm DFN−8 129 84 °C/W Tsol Wave Solder (Pb-Free) <2 to 3 sec @ 260°C 265 °C qJC Thermal Resistance (Junction-to-Case) (Note 1) 35 to 40 °C/W VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V Iout Output Current Continuous Surge TA Condition 2 VI ≤ VCC DFN−8 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) www.onsemi.com 3 MC10EPT20, MC100EPT20 Table 4. LVTTL INPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V, TA = −40°C to +85°C) Symbol Characteristic Min Typ Max Unit IIH Input HIGH Current (Vin = 2.7 V) 20 mA IIHH Input HIGH Current MAX (Vin = 6.0 V) 100 mA IIL Input LOW Current (Vin = 0.5 V) −0.6 mA VIK Input Clamp Voltage (Iin = −18 mA) −1.2 V VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. 10EPT PECL OUTPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit ICC Positive Power Supply Current 18 23 28 18 23 28 19 24 29 mA VOH Output HIGH Voltage (Note 2) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 2) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. www.onsemi.com 4 MC10EPT20, MC100EPT20 Table 6. 100EPT PECL OUTPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V (Note 1)) −40°C 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit ICC Positive Power Supply Current 20 25 30 22 27 32 23 28 33 mA VOH Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV Symbol Characteristic NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. Table 7. AC CHARACTERISTICS (VCC = 3.0 V to 3.6 V, GND = 0 V (Note 1)) −40°C Symbol Characteristic fmax Maximum Input Clock Frequency tPLH, tPHL Propagation Delay to Output Differential tSKEW Device-to-Device Skew (Note 2) tJITTER RMS Random Clock Jitter tr tf Output Rise/Fall Times Q, Q Min Max Min >1 280 (20% − 80%) Typ 25°C Typ Max Min >1 350 430 300 370 150 70 85°C 1 2 100 170 Typ >1 450 320 400 1 2 120 180 90 Unit GHz 490 ps 170 ps 1 2 ps 140 190 ps 150 80 Max NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Measured using a LVTTL source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. 2. Skew is measured between outputs under identical transitions. www.onsemi.com 5 900 9 800 8 700 7 600 6 500 5 400 4 300 3 RMS RANDOM CLOCK JITTER (ps) OUTPUT VOLTAGE AMPLITUDE (mV) MC10EPT20, MC100EPT20 ÉÉ ÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 2 200 (JITTER) 100 0 1 0 200 400 600 800 1000 1200 INPUT CLOCK FREQUENCY (MHz) Figure 2. Output Voltage Amplitude (VOUTpp)/RMS Jitter vs. Input Clock Frequency at Ambient Temperature Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) www.onsemi.com 6 MC10EPT20, MC100EPT20 ORDERING INFORMATION Package Shipping† MC10EPT20DG SOIC−8 NB (Pb-Free) 98 Units/Rail MC10EPT20DR2G SOIC−8 NB (Pb-Free) 2500 / Tape & Reel MC10EPT20DTG TSSOP−8 (Pb-Free) 100 Units/Rail MC10EPT20DTR2G TSSOP−8 (Pb-Free) 2500 / Tape & Reel MC10EPT20MNR4G DFN−8 (Pb-Free) 1000 / Tape & Reel MC100EPT20DG SOIC−8 NB (Pb-Free) 98 Units/Rail MC100EPT20DR2G SOIC−8 NB (Pb-Free) 2500 / Tape & Reel MC100EPT20DTG TSSOP−8 (Pb-Free) 100 Units/Rail MC100EPT20DTR2G TSSOP−8 (Pb-Free) 2500 / Tape & Reel MC100EPT20MNR4G DFN−8 (Pb-Free) 1000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices www.onsemi.com 7 MC10EPT20, MC100EPT20 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC10EPT20, MC100EPT20 PACKAGE DIMENSIONS TSSOP−8 CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U 0.10 (0.004) S 2X L/2 L 8 5 1 PIN 1 IDENT 0.15 (0.006) T U K REF M T U V S 0.25 (0.010) B −U− 4 M A −V− S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E www.onsemi.com 9 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ MC10EPT20, MC100EPT20 PACKAGE DIMENSIONS DFN−8 2x2, 0.5P CASE 506AA ISSUE F D PIN ONE REFERENCE 2X 0.10 C 2X A B L1 ÇÇ ÇÇ ÇÇ 0.10 C DETAIL A E OPTIONAL CONSTRUCTIONS ÉÉ ÉÉ ÇÇ EXPOSED Cu TOP VIEW A DETAIL B 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L DIM A A1 A3 b D D2 E E2 e K L L1 ÉÉ ÉÉ ÇÇ A3 MOLD CMPD A1 DETAIL B 0.08 C (A3) NOTE 4 SIDE VIEW DETAIL A ALTERNATE CONSTRUCTIONS A1 D2 1 4 C 8X SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.30 REF 0.25 0.35 −−− 0.10 RECOMMENDED SOLDERING FOOTPRINT* L 1.30 PACKAGE OUTLINE 8X 0.50 E2 0.90 K 8 5 e/2 e 8X b 1 0.10 C A B 0.05 C 2.30 8X NOTE 3 0.30 BOTTOM VIEW 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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