www.fairchildsemi.com FMS6366 Selectable YPbPr HD/SD 4:2:2 Video Filter Driver with Y, C and Composite Outputs Features Description • • • • • • • • • • • • The FMS6366 Filter Driver offers comprehensive filtering for set top box or DVD applications. This part consists of triple 6th order filters with selectable cutoffs for SD or HD. The filters are in a 4:2:2 configuration such that Y1 switches between 8MHz (SD) and 30MHz (HD). The Pb and Pr channels switch between 4MHz (SD) and 15MHz (HD). The required delay compensation must be performed in the digital domain prior to filtering by the FMS6366. Pin-compatible version of the FMS6419 for 4:2:2 video Requires external delay compensation 6th order Standard / High Definition video filters YPbPr 4:2:2 filters (8/30MHz : 4/15MHz : 4/15MHz) YC Standard Definition filters (8MHz) Composite summer output DC-coupled inputs, AC-coupled outputs Outputs provide 6dB gain to 150Ω AC-coupled loads Dual multiplexed inputs 0.3% differential gain with 0.1° differential phase 5V only Lead free (Pb-free) packaging Applications • • • • • • An additional S-video path is provided for SD signals. The Y2 and C signals are both filtered at 8MHz. A composite summer is included to provide a composite output based on Y2 and C. A 2:1 multiplexer is provided on each filter channel with separate select lines for the YPbPr and YC signals. Cable Set top boxes Satellite Set top boxes DVD players HDTV Personal Video Recorders (PVR) Video On Demand (VOD) All inputs accept DC-coupled ground referenced 1Vpp input signals. The filter outputs include +6dB of gain resulting in a 2Vpp signal into an AC-coupled dual video load (75Ω). Functional Block Diagram Y1INA Y1INB PbINA PbINB Y1OUT 6dB PbOUT 6dB PrOUT 4MHz, 15MHz PrINA PrINB 6dB 8MHz, 30MHz 4MHz, 15MHz INA/N_INB HD/N_SD Y2IN AUXIN 6dB 8MHz Y2OUT CVOUT CIN 0.5V (Internal) 6dB 8MHz COUT YC/N_AUX REV. 1B September 17, 2004 DATA SHEET FMS6366 DC Specifications (TC = 25°C, Vi = 1VPP; VCC = 5.0V,all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150Ω, referenced to 400kHz; unless otherwise noted) Symbol Parameter Conditions Current1 Min Typ Max Units VCC no load 125 150 Reference to ground 1.3 ICC Supply Vi Input Voltage Max Vil Digital Input Low1 INA, HD, YC 0 0.8 V Vih Digital Input High1 INA, HD, YC 2.4 VCC V PSRR PSRR (all channels) DC mA V -40 dB Standard Definition Electrical Specifications (TC = 25°C, Vi = 1VPP; VCC = 5.0V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150Ω, referenced to 400kHz; unless otherwise noted) Symbol AVSD f1dBSD4 f1dBSD2 fCSD4 fCSD2 Parameter SD Gain1 -1dB Bandwidth for SD1 -3dB Bandwidth for SD reject)1 Conditions Min Typ Max Units All channels 5.4 6.0 6.6 Y1, Y2, C 4.0 7.4 MHz Pb, Pr 2.0 3.9 MHz Y1, Y2, C 8.5 MHz Pb, Pr 4.5 MHz 55 dB fSBSD Attenuation: SD (stopband dG Differential Gain All channels 0.3 % dφ Differential Phase All channels 0.1 ° THD Output Distortion (all channels) VOUT = 1.8Vpp at 1MHz 0.15 % XTALKYPbPr Crosstalk (channel-to-channel) VOUT = 1.8Vpp at 1MHz, YPbPr -70 dB XTALKYCCV Crosstalk (channel-to-channel) VOUT = 1.8Vpp at 1MHz, YCCV -62 dB INMUXISO INMUX Isolation VIN = 1Vpp at 1MHz -70 dB SNR Signal-to-Noise Ratio All channels, NTC-7 weighting 4.2MHz lowpass, 100kHz highpass 70 dB Y1, Y2, C, CV In to Out at 400kHz 75 ns Pb, Pr In to Out at 400kHz 135 ns 60 ns tpdSD4 tpdSD2 Input to Output Prop Delay for SD All channels at f = 27MHz 37 dB t42SDYPbPr 4:2:2 Filter delay (compensate in the digital domain) Y1 to Pb/Pr delay tCLDCV Chroma-Luma delay CVOUT1 f = 3.58MHz -35 -4 35 ns f = 3.58MHz 95 100 105 % tCLGCV Chroma-Luma gain CVOUT 1 High Definition Electrical Specifications (TC = 25°C, Vi = 1Vpp; VCC = 5.0V, HD/N_SD = 1, RSOURCE = 37.5Ω, all inputs AC coupled with 0.1µF, all outputs AC coupled with 220µF into 150Ω, referenced to 400kHz; unless otherwise noted) Symbol AVHD f1dBHD4 f1dBHD2 2 Parameter 1 HD Gain -1dB Bandwidth for HD1 Conditions Min Typ Max Units Y1, Pb, Pr in HD Mode 5.4 6.0 6.6 Y1 20 27 MHz Pb, Pr 10 14.2 MHz dB REV. 1B September 17, 2004 FMS6366 Symbol fCHD4 fCHD2 fSBHD tpdHD4 tpdHD2 t42HDYPbPr DATA SHEET Parameter Conditions Typ Max Units 31.5 MHz 16 MHz 40 dB Y1 delay In to Out at 400kHz 25 ns Pb, Pr delay In to Out at 400kHz 40 ns Y1 to Pb/Pr delay 15 ns Y1 -3dB Bandwidth for HD Attenuation: HD (stopband Min Pb, Pr reject)1 Prop Delay for HD 4:2:2 Filter delay (compensate in the digital domain) All Channels at f = 74.25MHz 35 Note: 1. 100% tested at 25°C Absolute Maximum Ratings (beyond which the device may be damaged) Parameter Min Max Units DC Supply Voltage -0.3 6 V Analog and Digital I/O -0.3 VCC + 0.3 V 50 mA Output Current Any One Channel, Do Not Exceed Reliability Information Parameter Min Typ Junction Temperature Storage Temperature Range -65 Lead Temperature (Soldering, 10s) Thermal Resistance (ΘJA), JEDEC Standard Multi-layer Test Boards, Still Air Max Units 150 °C 150 °C 300 °C 47 °C/W Recommended Operating Conditions Parameter Operating Temperature Range VCC Range Min Typ 0 4.75 5.0 Max Units 70 °C 5.25 V Description The FMS6366 offers comprehensive filtering for set top box or DVD applications. This part consists of triple 4:2:2 6th order filters with selectable 30/15MHz or 8/4MHz frequencies for YPbPr and a dual 8MHz filter for YC with a composite summer. Two-to-one multiplexers are provided on the triple filters as well as provisions for auxiliary input to the composite channel. The triple filters are intended for YPbPr signals. All channels accept DC coupled ground-referenced 1Vpp signals. The filters output 2Vpp signals into AC coupled terminated loads. The FMS6366 is a next generation filter solution from Fairchild Semiconductor addressing the expanding filtering needs for set top boxes, and DVD players. The product provides selectable 4:2:2 HD/SD filtering on the YPbPr channels. Thus, the FMS6366 addresses the requirement for a single REV. 1B September 17, 2004 set top box to be compatible with a variety of resolution standards. Additionally, the product provides additional filters for Y, C, and Composite Video (CV) outputs. Multiplexers on the YPbPr and CV channels provide further flexibility. For DVD applications, the product provides filtering and output drive amplification for 6 channels of outputs. These include Y1, Pb, Pr, Y2, C, and CV outputs. For Set top boxes, this product provides two channels of filtered video with the flexibility of selectable high order filtering for multiple resolution standards. Additional flexibility is provided by the Y (Luma) and C (Chroma) filters with a composite summer. All channels provide 6dB gain, accept 1V ground referenced inputs, and drive AC coupled loads. 3 DATA SHEET FMS6366 Functional Description DC Levels At any given time, the input signal’s DC levels must be between 0.0V and 1.3V to utilize the optimal headroom and to avoid clipping at the outputs. The Y channels accept 1Vpp signals with the sync tip at ground. The Pb, Pr and C channels should be centered around 0.5V. This will ensure that the filter will utilize the optimal headroom and avoid clipping. DC-Coupled Output Applications The 220uF capacitor coupled with the 150Ω termination forms a high pass filter that blocks the DC while passing the video frequencies and avoiding tilt. Lower values such as 10uF cause unacceptable tilt in the output signal. By AC coupling, the average DC level is zero. Thus, the output voltages of all channels will be centered around zero. Applications DC coupling the output of the FMS6366 is allowable, but not recommended. There are several trade-offs: The average DC level on the outputs will be 2V. Each output will dissipate an additional 40mW nominally. The application will need to accommodate a 1V DC offset sync tip. Also, it is recommended to limit one 150Ω load per output. The FMS6366 is specified to operate with output currents typically less than 50mA, more than sufficient for a dual (75Ω) video load. Internal amplifiers are current limited to a maximum of 100mA and should withstand brief duration short circuit conditions, however this capability is not guaranteed. Driving Digital Pins The FMS6366 digital inputs are compatible with most 3.3V and 5V logic. Verify that the Vih and Vil are within the specified limits. Digital Delay Compensation A typical application for the FMS6366 is shown in Figure 1. FMS6366 Y A_NB HD / N_SD 16 23 A/D 8-10 Luminance 2 PbINA VCC RT1 = 75Ω VCC +5V 0.1µF 20 1µF RSOURCE = RT1 || RT2 RT2 = 75Ω 3 8-10 Video Processing Propagation Delay 26 Shift Register Chroma Pr A/D Pb A/D 8-10 PbINB 220µF PrOUT 4 75Ω 24 75Ω Video Cable Y1INA 75Ω FMS6366 RT1 = 75Ω RT2 = 75Ω 220µF 5 Y1OUT 75Ω 23 75Ω Video Cable Y1INB 75Ω 6 PrINA 220µF RT1 = 75Ω DAC 8-10 PbOUT 75Ω 22 75Ω Video Cable RT2 = 75Ω 75Ω 7 PrINB 8 YC / N_AUX NC 220µF Y2OUT 9, 10, 15, 17 75Ω 21 75Ω Video Cable 75Ω 12 AUXIN 0.1µF RT1 = 75Ω COUT RT2 = 75Ω 75Ω 19 75Ω Video Cable 75Ω 14 Y2IN 220µF RT1 = 75Ω CVOUT 18 75Ω 75Ω Video Cable RT2 = 75Ω 75Ω 13 CIN VSS VSS VSS VSS RT1 = 75Ω 11 16 25 Figure 2: Digital Delay Compensation for anti-alias 4:2:2 filters 27 RT2 = 75Ω The Chroma filters are one half the bandwidth of the Luminance filter therefore the propagation delay time through the Chroma filter is longer than the Luminance filter. In the Standard Definition (SD) case, the Chroma filter propagation delay is typically 60 nanoseconds longer than the Luminance filter. This is three clock cycles at 54MHz so it is easily corrected by adding digital delay as shown in Figure 3 and illustrated as a shift register in Figure 2. In the High Definition (HD) setting the Chroma filter propagation delay is typically 15 nanoseconds longer than the Luminance filter. This is one clock cycle at 74.25MHz so it is also easily corrected by adding digital delay to the luminance path. Figure 1: Typical Application Diagram 4 REV. 1B September 17, 2004 FMS6366 DATA SHEET Video SoC Video Source Digital Delay DAC Y1 DAC Pb, Pr Figure 3: Digital Delay Compensation for 4:2:2 reconstruction filters Pin Configuration Pin Descriptions Pin# Pin A_NB 1 PrINA 2 PrINB 3 Y1INA Type Description A_NB INPUT Logic input selects between channel <A> or <B>. (1): A input, (0): B input 28 HD/N_SD 27 VSS 2 PrINA INPUT Pr input, channel A 26 VCC 3 PrINB INPUT Pr input, channel B 4 25 VSS 4 Y1INA INPUT Y1 (Luminance) input, channel A. Must include sync. Y1INB 5 24 PrOUT 5 Y1INB INPUT PbINA 6 23 Y1OUT Y1 (Luminance) input, channel B. Must include sync. 6 PbINA INPUT Pb input, channel A PbINB 7 22 PbOUT 7 PbINB INPUT Pb input, channel B YC/N_AUX 8 21 Y2OUT 8 YC/N_AUX INPUT Logic input selects between YC and AUX. (1): YC input, (0): AUX input NC 9 20 VCC 9 NC No Connect, leave floating NC 10 19 COUT 10 NC No Connect, leave floating VSS 11 18 CVOUT FMS6366 28-pin SSOP 1 11 VSS INPUT Must be tied to ground, do not float 12 AUXIN INPUT Composite video input AUXIN 12 17 NC 13 CIN INPUT Chrominance input CIN 13 16 VSS 14 Y2IN INPUT Y2 (Luminance) input. Must include sync. Y2IN 14 15 NC 15 NC 16 VSS 17 NC 18 CVOUT OUTPUT 19 COUT OUTPUT Filtered chrominance output 20 VCC INPUT +5V supply, do not float 21 Y2OUT OUTPUT Y2 output 22 PbOUT OUTPUT Pb output 23 Y1OUT OUTPUT Y1 output 24 PrOUT OUTPUT Pr output 25 VSS INPUT Must be tied to ground, do not float 26 VCC INPUT +5V supply, do not float 27 VSS INPUT Must be tied to ground, do not float INPUT Logic input selects between HD and SD mode. (1): HD, (0): SD 28 REV. 1B September 17, 2004 HD/N_SD No Connect, leave floating INPUT Must be tied to ground, do not float No Connect, leave floating Filtered composite video output 5 DATA SHEET FMS6366 Package Dimensions SSOP-28 6 REV. 1B September 17, 2004 FMS6366 DATA SHEET Ordering Information Model Part Number Lead Free Package Container Pack Qty FMS6366 FMS6366MSA28_NL Yes SSOP-28 Rail 47 FMS6366 FMS6366MSA28X_NL Yes SSOP-28 Reel 2000 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. © 2004 Fairchild Semiconductor Corporation