LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 LMH6609 900MHz Voltage Feedback Op Amp Check for Samples: LMH6609 FEATURES 1 • • 23 • • • • • • • • • • 900MHz −3dB bandwidth (AV = 1) Large signal bandwidth and slew rate 100% tested 280MHz −3dB bandwidth (AV = +2, VOUT = 2VPP) 90mA linear output current 1400V/μs slew rate Unity gain stable <1mV input Offset voltage 7mA Supply current (no load) 6.6V to 12V supply voltage range 0.01%/0.026° differential gain/phase PAL 3.1nV√Hz voltage noise Improved replacement for CLC440, CL420, CL426 APPLICATIONS • • • • • • • Test equipment IF/RF amplifier A/D Input driver Active filter Integrator DAC output buffer TI's Transimpedance amplifier DESCRIPTION The LMH6609 is an ultra wideband, unity gain stable, low power, voltage feedback op amp that offers 900MHz bandwidth at a gain of 1, 1400V/μs slew rate and 90mA of linear output current. The LMH6609 is designed with voltage feedback architecture for maximum flexibility especially for active filters and integrators. The LMH6609 has balanced, symmetrical inputs with well-matched bias currents and minimal offset voltage. With Differential Gain of 0.01% and Differential Phase of 0.026° the LMH6609 is suited for video applications. The 90mA of linear output current makes the LMH6609 suitable for multiple video loads and cable driving applications as well. The supply voltage is specified at 6.6V and 10V. A low supply current of 7mA (at 10V supply) makes the LMH6609 useful in a wide variety of platforms, including portable or remote equipment that must run from battery power. The LMH6609 is available in the industry standard 8pin SOIC package and in the space-saving 5-pin SOT-23 package. The LMH6609 is specified for operation over the -40°C to +85°C temperature range. The LMH6609 is manufactured in state-of-theart VIP10™ technology for high performance. Typical Application C 2 RF K = 1+ RG m R Q= m 2 1 + m (2 - K) 1 Zo = mRC Q, K ARE UNITLESS. ZO IS RELATED TO BANDWIDTH AND IS IN UNITS OF RADIANS/SEC. DIVIDE ZO BY 2S TO GET IT IN Hz. REFER TO OA-26 FOR MORE INFORMATION. R VIN + VO C RF RG Figure 1. Sallen Key Low Pass Filter with Equal C Value 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VIP10 is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2013, Texas Instruments Incorporated LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) VS (V+ - V−) ±6.6V (2) IOUT Common Mode Input Voltage V+ to V− Maximum Junction Temperature +150°C −65°C to +150°C Storage Temperature Range Lead Temperature Range ESD Tolerance +300°C (3) Human Body Model 2000V Machine Model (1) (2) (3) 200V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional. For specifications, see the Electrical Characteristics tables. The maximum output current (IOUT) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Section for more details. Human body model, 1.5kΩ in series with 100pF. Machine model, 0Ω In series with 200pF. Operating Ratings (1) Thermal Resistance Package (θJC) (θJA) 8-Pin SOIC 65°C/W 145°C/W 5-Pin SOT23 120°C/W 187°C/W −40°C +85°C ±3.3V ±6V Operating Temperature Nominal Supply Voltage (1) (2) (2) The maximum output current (IOUT) is determined by device power dissipation limitations. See the Power Dissipation section of the Application Section for more details. Nominal Supply voltage range is for supplies with regulation of 10% or better. ±5V Electrical Characteristics Unless specified, AV = +2, RF = 250Ω: VS = ±5V, RL = 100Ω; unless otherwise specified. Boldface limits apply over temperature Range. (1) Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response SSBW −3dB Bandwidth VOUT = 0.5VPP LSBW −3dB Bandwidth VOUT = 4.0VPP SSBWG1 −3dB Bandwidth AV = 1 VOUT = 0.25VPP GFP .1dB Bandwidth Gain is Flat to .1dB DG Differential Gain RL = 150Ω, 4.43MHz 0.01 % DP Differential Phase RL = 150Ω, 4.43MHz 0.026 deg 1V Step 1.6 ns ns 150 260 MHz 170 MHz 900 MHz 130 MHz Time Domain Response TRS Rise and Fall Time TRL 4V Step 2.6 ts Settling Time to 0.05% 2V Step 15 ns SR Slew Rate 4V Step 1400 V/µs (1) (2) 2 (2) 1200 Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Applications Section for information on temperature derating of this device. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Slew rate is Average of Rising and Falling 40-60% slew rates. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 ±5V Electrical Characteristics (continued) Unless specified, AV = +2, RF = 250Ω: VS = ±5V, RL = 100Ω; unless otherwise specified. Boldface limits apply over temperature Range. (1) Symbol Parameter Conditions Min Typ Max Units Distortion and Noise Response HD2 2nd Harmonic Distortion 2VPP, 20MHz −63 dBc HD3 3rd Harmonic Distortion 2VPP, 20MHz −57 dBc Equivalent Input Noise VN Voltage Noise >1MHz 3.1 nV/√Hz CN Current Noise >1MHz 1.6 pA/√Hz Static, DC Performance VIO Input Offset Voltage ±0.8 Input Voltage Temperature Drift IBN ±2.5 ±3.5 μV/°C 4 Input Bias Current −2 Bias Current Temperature Drift 11 0.1 mV ±5 ±8 µA nA/°C ±1.5 ±3 IBI Input Offset Current PSRR Power Supply Rejection Ratio DC, 1V Step 67 65 73 dB CMRR Common Mode Rejection Ratio DC, 2V Step 67 65 73 dB ICC Supply Current RL = ∞ 7.0 7.8 8.5 µA mA Miscellaneous Performance RIN Input Resistance CIN Input Capacitance ROUT Output Resistance VO 1 MΩ 1.2 pF 0.3 Ω RL = ∞ ±3.6 ±3.3 ±3.9 V RL = 100Ω ±3.2 ±3.0 ±3.5 V Common Mode, CMRR > 60dB ±2.8 ±2.5 ±3.0 V ±60 ±50 ±90 mA Closed Loop Output Voltage Range VOL CMIR Input Voltage Range IO Linear Output Current VOUT Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 3 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com ±3.3V Electrical Characteristics Unless specified, AV = +2, RF = 250Ω: VS = ±3.3V, RL = 100Ω; unless otherwise specified. Boldface limits apply over temperature Range. (1) Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response SSBW −3dB Bandwidth VOUT = 0.5VPP 180 MHz LSBW −3dB Bandwidth VOUT = 3.0VPP 110 MHz SSBWG1 −3dB Bandwidth AV = 1 VOUT = 0.25VPP 450 MHz GFP .1dB Bandwidth VOUT = 1VPP 40 MHz DG Differential Gain RL = 150Ω, 4.43MHz .01 % DP Differential Phase RL = 150Ω, 4.43MHz .06 deg Time Domain Response TRL SR 1V Step Slew Rate 2V Step (2) 2.2 ns 800 V/µs Distortion and Noise Response HD2 2nd Harmonic Distortion 2VPP, 20MHz −63 dBc HD3 3rd Harmonic Distortion 2VPP, 20MHz −43 dBc Equivalent Input Noise VN Voltage Noise >1MHz 3.7 nV/ pA/√Hz CN Current Noise >1MHz 1.1 pA/√Hz Static, DC Performance VIO Input Offset Voltage IBN Input Bias Current IBI Input Offset Current PSRR Power Supply Rejection Ratio DC, .5V Step 67 CMRR Common Mode Rejection Ratio DC, 1V Step 67 Supply Current RL = ∞ ICC ±2.5 ±3.5 mV −1 ±3 ±6 µA 0 ±1.5 ±3 µA 0.8 73 dB 75 3.6 dB 5 6 mA Miscellaneous Performance ROUT VO Input Resistance Output Voltage Range VOL .05 Ω RL = ∞ ±2.1 ±2.3 V RL = 100Ω ±1.9 ±2.0 V Close Loop CMIR Input Voltage Range Common Mode IO Linear Output Current VOUT (1) (2) 4 ±30 ±1.3 V ±45 mA Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Applications Section for information on temperature derating of this device. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Slew rate is Average of Rising and Falling 40-60% slew rates. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 CONNECTION DIAGRAM 8-Pin SOIC (Top View) 5-Pin SOT-23 (Top View) N/C 1 5 OUT V - 2 +IN + +IN 3 8 N/C + -IN V 1 2 3 - + 7 6 + V OUTPUT 4 V - 4 5 N/C -IN See Package Number D0008A See Package Number DBV0005A Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 5 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics Small Signal Non-Inverting Frequency Response Large Signal Non-Inverting Frequency Response 3 3 AV = 1, RF = 0: AV = 1, RF = 0: 1 -1 AV = 6 -3 AV = 2 -1 AV = 10 GAIN (dB) GAIN (dB) 1 AV = 2 AV = 4 -5 AV = 4 -3 AV = 6 AV = 10 -5 VS = ±5V -7 VS = ±5V -7 RF = 250: RF = 250: VOUT = 0.5VPP VOUT = 4VPP -9 -9 1 10 100 1 1000 10 100 FREQUENCY (MHz) Figure 2. Figure 3. Small Signal Inverting Frequency Response Large Signal Inverting Frequency Response 3 3 AV = -1, RF = 250: 1 1 -1 -1 GAIN (dB) GAIN (dB) AV = -1, RF = 250: -3 AV = -5, RF = 250: AV = -5, RF = 250: -3 AV = -10, RF = 500: -5 AV = -10, RF = 500: -5 -7 VS = ±5V -7 VS = ±5V VOUT = 4VPP VOUT = 0.5VPP -9 -9 1 10 100 1 1000 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 4. Figure 5. Frequency Response vs. VOUT AV = 2 Frequency Response vs. VOUT AV = 2 3 VOUT = 1VPP 1 1 VOUT = 1VPP -1 GAIN (dB) -1 GAIN (dB) 1000 3 VOUT = 2VPP VOUT = 0.5VPP -3 VOUT = 4VPP VOUT = 0.5VPP -3 VOUT = 2VPP -5 -5 VS = ±3.3V VS = ±5V -7 -7 RF = 250: RF = 250: AV = 2V/V AV = 2V/V -9 -9 1 6 1000 FREQUENCY (MHz) 10 100 1000 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Figure 7. Submit Documentation Feedback 1000 Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Frequency Response vs. VOUT AV = 1 Frequency Response vs. VOUT AV = −1 3 3 VOUT = 0.25VPP VOUT = 1VPP 1 1 -1 VOUT = 2VPP GAIN (dB) GAIN (dB) -1 VOUT = 1VPP -3 VOUT = 0.5VPP -5 VOUT = 0.25VPP VOUT = 0.5VPP -3 VOUT = 2VPP -5 VS = ±3.3V -7 VS = ±3.3V -7 RF = 0: RF = AV = 1V/V -9 -9 1 10 100 1 1000 100 FREQUENCY (MHz) Figure 8. Figure 9. Frequency Response vs. VOUT AV = −1 Frequency Response vs. Cap Load 1000 2 VOUT = 2VPP CL = 10pF, ROUT = 55: VOUT = 1VPP 1 0 -2 GAIN (dB) -1 GAIN (dB) 10 FREQUENCY (MHz) 3 VOUT = 0.25VPP -3 VOUT = 4VPP -5 CL = 100pF, ROUT = 17: -4 CL = 33pF, ROUT = 32: -6 VS = ±3.3V VS = ±5V -7 -8 RF = 250: LOAD = 1k:||CL AV = -1V/V VOUT = 1VPP -9 -10 100 10 1 1000 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 10. Figure 11. Frequency Response vs. Cap Load Suggested ROUT vs. Cap Load 2 1000 70 CL = 10pF, ROUT = 55: LOAD = 1k: || CL 60 SUGGESTED ROUT 0 -2 GAIN (dB) : AV = -1V/V CL = 100pF, ROUT = 17: -4 CL = 33pF, ROUT = 32: -6 VS = ±5V -8 LOAD = 1k:||CL 50 40 30 20 10 VOUT = 1VPP -10 0 1 10 100 1000 FREQUENCY (MHz) 1 10 100 1000 CAPACITIVE LOAD (pF) Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 7 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) CMRR vs. Frequency PSRR vs. Frequency 90 90 80 80 PSRR70 70 PSRR+ 60 PSRR (dB) CMRR (dB) VS = ±5V 50 VS = ±3.3V 40 60 50 40 30 30 20 20 10 10 0.001 0.01 1 0.1 10 VS = ±3.3V 0 0.1 0.001 0.01 100 10 FREQUENCY (MHz) Figure 14. Figure 15. PSRR vs. Frequency 100 Pulse Response 90 0.75 PSRR- AV = +2 80 0.5 70 PSRR+ OUTPUT (V) 60 PSRR (dB) 1 FREQUENCY (MHz) 50 40 30 0.25 VOUT = 1VPP 0 VS = ±3.3V -0.25 20 -0.5 10 VS = ±5V 0 0.001 AV = -1 -0.75 1 0.1 0.01 10 0 100 5 10 15 FREQUENCY (MHz) 20 25 30 35 40 45 TIME (ns) Figure 16. Figure 17. Pulse Response Large Signal Pulse Response 2.5 0.75 2 0.5 1.5 AV = +2 AV = +2 OUTPUT (V) OUTPUT (V) 1 0.25 0 VOUT + 1VPP AV = -1 -0.25 0.5 VOUT = 4VPP 0 VS = ±5V -0.5 -1 VS = ±5V AV = -1 -1.5 -0.5 -2 -2.5 -0.75 0 8 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 TIME (ns) TIME (ns) Figure 18. Figure 19. Submit Documentation Feedback 35 40 45 Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Noise vs. Frequency HD2 vs. VOUT 100 10 VOLTAGE NOISE DISTORTION PRODUCTS (dBc) Hz) 10 CURRENT NOISE (pA/ Hz) VOLTAGE NOISE (nV/ -40 100 CURRENT NOISE 1 1 1 1k 100 10 10k 100k -50 -55 20MHz -60 -65 10MHz -70 -75 -80 -85 2MHz -90 1M 0 1 2 VOUT (VPP) Figure 20. Figure 21. HD3 vs. VOUT HD2 vs. VOUT 4 -40 DISTORTION PRODUCTS (dBc) 20MHz -45 10MHz -50 -55 -60 -65 -70 2MHz -75 -80 -85 VS = ±3.3V VS = ±5V -45 -50 -55 20MHz -60 -65 -70 2MHz -75 -80 -85 10MHz -90 -90 0 1 2 3 0 4 1 2 3 4 5 6 7 VOUT (VPP) VOUT (VPP) Figure 22. Figure 23. HD3 vs. VOUT HD2 & HD3 vs. Frequency -40 -40 20MHz -50 10MHz -60 VS = ±3.3V -45 DISTORTION PRODUCTS (dBc) DISTORTION PRODUCTS (dBc) 3 FREQUENCY (Hz) -40 DISTORTION PRODUCTS (dBc) VS = ±3.3V -45 -70 2MHz -80 -90 VS = ±5V VOUT = 2VPP -50 -55 -60 HD3 -65 HD2 -70 -75 -80 -85 -90 -100 0 1 2 3 4 5 6 7 1 10 100 FREQUENCY (MHz) VOUT (VPP) Figure 24. Figure 25. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 9 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) HD2 & HD3 vs. Frequency Differential Gain & Phase 0.015 -40 0.01 -55 -60 HD3 -65 HD2 -70 -75 -80 0.04 PHASE 0.005 0.02 0 0 -0.02 -0.005 GAIN -0.04 -0.01 -85 -90 10 -0.06 -0.015 -0.75 100 -0.5 FREQUENCY (MHz) -0.25 Differential Gain & Phase PHASE 0.0075 0.003 0 0 -0.0075 -0.003 -0.015 GAIN -0.0225 -0.009 0 0.25 0.5 GAIN (dB) 0.015 0.006 DIFFERENTIAL PHASE (°) DIFFERENTIAL GAIN (%) VS = ±3.3V GAIN 0.0225 -0.25 180 80 VS = ±5V -0.5 70 135 60 90 50 40 0 30 -45 20 -90 10 -135 -180 0 100 -0.03 0.75 45 PHASE 1k 10k 100k 1M Figure 28. Figure 29. Open Loop Gain & Phase 100 VS = ±5V 135 60 90 50 45 PHASE 40 0 30 -45 20 -90 10 -135 10 |Z|OUT (:) 70 PHASE (°) GAIN GAIN (dB) Closed Loop Output Resistance 180 80 10M 100M 1G FREQUENCY (Hz) VOUT (V) 100IRE = 714mV 0 100 0.75 Open Loop Gain & Phase 0.03 -0.012 -0.75 0.5 Figure 27. 0.012 -0.006 0.25 VOUT (V) 100IRE = 714mV Figure 26. 0.009 0 PHASE (°) 1 VS= ±3.3V 1 0.1 VS= ±5V 0.01 -180 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) 0.001 0.001 0.01 0.1 1 10 100 FREQUENCY (MHz) Figure 30. 10 DIFFERENTIAL PHASE (°) VOUT = 2VPP -50 DIFFERENTIAL GAIN (%) DISTORTION PRODUCTS (dBc) 0.06 VS = ±3.3V VS = ±5V -45 Figure 31. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 APPLICATION INFORMATION GENERAL DESIGN EQUATION The LMH6609 is a unity gain stable voltage feedback amplifier. The matched input bias currents track well over temperature. This allows the DC offset to be minimized by matching the impedance seen by both inputs. GAIN The non-inverting and inverting gain equations for the LMH6609 are as follows: RF NON-INVERTING GAIN : 1+ RG RF INVERTING GAIN : RG (1) Figure 32. Typical Non-Inverting Application Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 11 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com Figure 33. Typical Inverting Application Figure 34. Single Supply Inverting 12 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 Figure 35. AC Coupled Non-Inverting GAIN BANDWIDTH PRODUCT The LMH6609 is a voltage feedback amplifier, whose closed-loop bandwidth is approximately equal to the gainbandwidth product (GBP) divided by the gain (AV). For gains greater than 5, AV sets the closed-loop bandwidth of the LMH6609. CLOSED LOOP BANDWIDTH = AV = GBP AV (RF +RG) RG GBP = 240MHz (2) For Gains less than 5, refer to the frequency response plots to determine maximum bandwidth. For large signal bandwidth the slew rate is a more accurate predictor of bandwidth. fMAX = SR 2S VP (3) Where fMAX = bandwidth, SR = Slew rate and VP = peak amplitude. OUTPUT DRIVE AND SETTLING TIME PERFORMANCE The LMH6609 has large output current capability. The 100mA of output current makes the LMH6609 an excellent choice for applications such as: • Video Line Drivers • Distribution Amplifiers Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 13 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com When driving a capacitive load or coaxial cable, include a series resistance ROUT to back match or improve settling time. Refer to the Driving Capacitive Loads section for guidance on selecting an output resistor for driving capacitive loads. EVALUATION BOARDS TI offers the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Many of the data sheet plots were measured with these boards. Device Package Board Part # LMH6609MA SOIC LMH730227 LMH6609MF SOT-23 LMH730216 CIRCUIT LAYOUT CONSIDERATION A proper printed circuit layout is essential for achieving high frequency performance. TI provides evaluation boards for the LMH6609 as shown above. These boards were laid out for optimum, high-speed performance. The ground plane was removed near the input and output pins to reduce parasitic capacitance. Also, all trace lengths were minimized to reduce series inductances. Supply bypassing is required for the amplifiers performance. The bypass capacitors provide a low impedance return current path at the supply pins. They also provide high frequency filtering on the power supply traces. 10μF tantalum and .01μF capacitors are recommended on both supplies (from supply to ground). In addition, a 0.1μF ceramic capacitor can be added from V+ to V− to aid in second harmonic suppression. + + RIN 51: - - RG ROUT 51: CL 10pF RL 1k: RF Figure 36. Driving Capacitive Loads with ROUT for Improved Stability DRIVING CAPACITIVE LOADS Capacitive output loading applications will benefit from the use of a series output resistor ROUT. Figure 36 shows the use of a series output resistor, ROUT as it might be applied when driving an analog to digital converter. The charts "Suggested RO vs. Cap Load" in the Typical Performance Section give a recommended value for mitigating capacitive loads. The values suggested in the charts are selected for .5dB or less of peaking in the frequency response. This gives a good compromise between settling time and bandwidth. For applications where maximum frequency response is needed and some peaking is tolerable, the value of RO can be reduced slightly from the recommended values. There will be amplitude lost in the series resistor unless the gain is adjusted to compensate; this effect is most noticeable with heavy resistive loads. 14 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 COMPONENT SELECTION AND FEEDBACK RESISTOR Surface mount components are highly recommended for the LMH6609. Leaded components will introduce unpredictable parasitic loading that will interfere with proper device operation. Do not use wire wound resistors. The LMH6609 operates best with a feedback resistor of approximately 250Ω for all gains of +2 and greater and for −1 and less. With lower gains in particular, large value feedback resistors will exaggerate the effects of parasitic capacitances and may lead to ringing on the pulse response and frequency response peaking. Large value resistors also add undesirable thermal noise. Feedback resistors that are much below 100Ω will load the output stage, which will reduce voltage output swing, increase device power dissipation, increase distortion and reduce current available for driving the load. In the buffer configuration the output should be shorted directly to the inverting input. This feedback does not load the output stage because the inverting input is a high impedance point and there is no gain set resistor to ground. OPTIMIZING DC ACCURACY The LMH6609 offers excellent DC accuracy. The well-matched inputs of this amplifier allows even better performance if care is taken to balance the impedances seen by the two inputs. The parallel combination of the gain setting RG and feedback RF resistors should be equal to RSEQ, the resistance of the source driving the op amp in parallel with any terminating Resistor (See Figure 32). Combining this with the non inverting gain equation gives the following parameters: RF = AVRSEQ RG = RF/(AV−1) For Inverting gains the bias current cancellation is accomplished by placing a resistor RB on the non-inverting input equal in value to the resistance seen by the inverting input (See Figure 33). RB = RF || (RG + RS) The additional noise contribution of RB can be minimized by the use of a shunt capacitor (not shown). POWER DISSIPATION The LMH6609 has the ability to drive large currents into low impedance loads. Some combinations of ambient temperature and device loading could result in device overheating. For most conditions peak power values are not as important as RMS powers. To determine the maximum allowable power dissipation for the LMH6609 use the following formula: PMAX = (150º - TAMB)/θJA (4) Where TAMB = Ambient temperature (°C) and θJA = Thermal resistance, from junction to ambient, for a given package (°C/W). For the SOIC package θJA is 148°C/W, for the SOT-23 it is 250°C/W. 150ºC is the absolute maximum limit for the internal temperature of the device. Either forced air cooling or a heat sink can greatly increase the power handling capability for the LMH6609. VIDEO PERFORMANCE The LMH6609 has been designed to provide good performance with both PAL and NTSC composite video signals. The LMH6609 is specified for PAL signals. NTSC performance is typically marginally better due to the lower frequency content of the signal. Performance degrades as the loading is increased, therefore best performance will be obtained with back-terminated loads. The back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage. This means that the device should be configured for a gain of 2 in order to have a net gain of 1 after the terminating resistor. (See Figure 37) Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 15 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com 6.8PF C2 10nF RS 75: C1 ROUT 75: + VS + RIN 75: VOUT RG 250: RF 250: 10nF C3 6.8PF C4 Figure 37. Typical Video Application ESD PROTECTION The LMH6609 is protected against electrostatic discharge (ESD) on all pins. The LMH6609 will survive 2000V Human Body model or 200V Machine model events. Under closed loop operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes may be evident. For instance, if the amplifier is powered down and a large input signal is applied the ESD diodes will conduct. TRANSIMPEDANCE AMPLIFIER The low input current noise and unity gain stability of the LMH6609 make it an excellent choice for transimpedance applications. Figure 38 illustrates a low noise transimpedance amplifier that is commonly implemented with photo diodes. RF sets the transimpedance gain. The photo diode current multiplied by RF determines the output voltage. CF PHOTO DIODE PRESENTATION RF VOUT IIN CD + VOUT = -IIN * RF Figure 38. Transimpedance Amplifier The capacitances are defined as: • CD = Equivalent Diode Capacitance • CF = Feedback Capacitance The feedback capacitor is used to give optimum flatness and stability. As a starting point the feedback capacitance should be chosen as ½ of the Diode capacitance. Lower feedback capacitors will peak frequency response. 16 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 LMH6609 www.ti.com SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 Rectifier The large bandwidth of the LMH6609 allows for high-speed rectification. A common rectifier topology is shown in Figure 39. R1 and R2 set the gain of the rectifier. D1 R2 R1 VIN - D2 VOUT + Figure 39. Rectifier Topology Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 17 LMH6609 SNOSA84F – AUGUST 2003 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision E (March 2013) to Revision F • 18 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 17 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6609 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMH6609 MDC ACTIVE DIESALE Y 0 400 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LMH6609MA NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMH66 09MA LMH6609MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 09MA LMH6609MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH66 09MA LMH6609MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A89A LMH6609MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A89A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6609MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6609MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6609MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6609MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6609MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6609MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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