BOARDCOM BCM5325FKQMG Five-port 10/100 switch with on-chip packet buffer Datasheet

BCM5325
®
FIVE-PORT 10/100 SWITCH WITH ON-CHIP PACKET BUFFER
FEATURES
SUMMARY OF BENEFITS
• The highest level of silicon integration achieved for a five-port
• Enables a new generation of lower cost 10/100 switches in
10/100 Ethernet switch device
much smaller form factors
• Fourth generation switch on a chip
• The BCM5325 integrates:
•
•
•
•
• Utilizes field-proven industry-standard 10BASE-T/100BASE-
Five transceivers (802.3u compliant)
Six media access controllers (802.x compliant)
128-KB packet buffer
Non-blocking switch fabric
• Packet classification 802.1p QoS priority queues
• Port-based VLAN
• MII or 7-wire interface supports an additional 100FX or 100TX
connection enabling a sixth user connection or uplink
• Supports up to 2K MAC addresses
• Flow control: full-duplex (802.3x) and half-duplex options
supported
•
•
•
•
Typical power consumption: < 1.4W
• Flexible interfaces support a wider variety of application
needs—fiber for long distances or an additional 100TX port
• Sufficient address range handles all remote office, branch
office and home office needs
• Port VLAN and 802.1p priority enables the switch to be
designed into a wide variety of applications
• CPUs are not required to initialize and run in cost-sensitive
unmanaged applications—providing true Plug and Play
connectivity
• Internal oscillator circuit simplifies design and reduces
overall system cost
Supports automatic address learning and aging
Internal oscillator circuit
TX Fast Ethernet transceivers—lowering overall system
interoperability and reliability risks
• On-chip HP auto-MDI/MDIX feature automatically detects and
corrects for crossover cables and allows direct switch-toswitch connection
128-pin PQFP package
Low Cost Five-Port 10/100 Stand-alone Switch
OVERVIEW
A uto MDI/MDIX
10/100 P HY
MA C
A uto MDI/MDIX
10/100 P HY
MA C
A uto MDI/MDIX
10/100 P HY
MA C
A uto MDI/MDIX
10/100 P HY
MA C
A uto MDI/MDIX
10/100 P HY
MA C
S witc h F abric
and A R L L ogic
P riority Mapping
R egis ter 802.1p
DMA Interfac e
MII or 7 wire
Interfac e
MA C
128 K B P ac ket B uffer
E 2P R OM
Interfac e
E 2P R OM
Interfac e
The Broadcom BCM5325 device is a highly integrated solution. It
combines all of the functions of a high-speed switch system—
including packet buffer, PHY transceivers, media access
controllers, address management, and a nonblocking switch
fabric—into a single 0.18µ CMOS device. It complies with the
IEEE 802.3, 802.3u, and 802.3x specifications, including the MAC
control PAUSE frame and auto-negotiation subsections, providing
compatibility with all industry-standard Ethernet and Fast Ethernet
devices.
L E D Interfac e
L E Ds
This device contains five full-duplex 10BASE-T/100BASE-TX Fast
Ethernet transceivers, each of which performs all of the physical
layer interface functions for 10BASE-T Ethernet on Category 3, 4,
or 5 Unshielded Twisted-Pair (UTP) cable and 100BASE-TX Fast
Ethernet on Category 5 UTP cable.
E2PROM interfaces provide easy programming of the 802.1p
QoS queues. This allows switch traffic to be given different
classes of priority or service, for example, voice traffic for IP phone
applications, video traffic for multimedia applications, or data
traffic for e-mail applications.
Broadcom®, the pulse logo, and Connecting everything® are trademarks of Broadcom
Corporation and/or its subsidiaries in the United States and certain other countries. All other
trademarks mentioned are the property of their respective owners.
®
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2004 by BROADCOM CORPORATION. All rights reserved.
5325-PB05-R
07/13/04
Phone: 949-450-8700
Fax: 949-450-8710
E-mail: [email protected]
Web: www.broadcom.com
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