AUIRLS8409-7P
Features
Advanced Process Technology
Logic Level Gate Drive
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
VDSS
40V
RDS(on) typ.
max.
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating. These
features combine to make this design an extremely efficient and
reliable device for use in Automotive applications and wide variety
of other applications.
0.50m
ID (Silicon Limited)
0.75m
500A
ID (Package Limited)
240A
D2Pak 7 Pin
G
D
S
Gate
Drain
Source
Applications
Electric Power Steering (EPS)
Battery Switch
Start/Stop Micro Hybrid
Heavy Loads
DC-DC Converter
Base Part Number
Package Type
AUIRLS8409-7P
D2Pak-7PIN
Standard Pack
Form
Quantity
Tube
50
Tape and Reel Left
800
Complete Part Number
AUIRLS8409-7P
AUIRLS8409-7TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally Limited)
Single Pulse Avalanche Energy
EAS (Tested)
Avalanche Current
IAR
EAR
Repetitive Avalanche Energy
Max.
500
353
240
1200
375
2.5
± 16
-55 to + 175
Units
A
W
W/°C
V
°C
300
730
mJ
1580
See Fig. 14, 15, 22a, 22b
A
mJ
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRLS8409-7P
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Junction-to-Ambient (PCB Mount)
RJA
Typ.
–––
–––
Max.
0.4
40
Units
°C/W
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V VGS = 0V, ID = 250µA
––– 0.033 ––– V/°C Reference to 25°C, ID = 5.0mA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
0.50
0.75
m VGS = 10V, ID = 100A
–––
0.60
0.85
Static Drain-to-Source On-Resistance
RDS(on)
m VGS = 5.5V, ID = 50A
–––
0.75
1.10
m VGS = 4.5V, ID = 50A
VGS(th)
Gate Threshold Voltage
1.0
–––
2.4
V VDS = VGS, ID = 250µA
–––
–––
1.0
VDS = 40V, VGS = 0V
Drain-to-Source Leakage Current
µA
IDSS
–––
–––
150
VDS = 40V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage
–––
–––
100
VGS = 16V
IGSS
nA
Gate-to-Source Reverse Leakage
–––
–––
-100
VGS = -16V
RG
Internal Gate Resistance
–––
2.0
–––
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
220
–––
–––
S VDS = 10V, ID = 100A
Total Gate Charge
–––
177
266
ID = 100A
Qg
VDS = 20V
Gate-to-Source Charge
–––
65
–––
Qgs
nC
VGS = 4.5V
Qgd
Gate-to-Drain ("Miller") Charge
–––
80
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
97
–––
Turn-On Delay Time
–––
14
–––
VDD = 20V
td(on)
ID = 100A
Rise Time
–––
71
–––
tr
ns
td(off)
Turn-Off Delay Time
–––
260
–––
RG = 2.7
VGS = 10V
Fall Time
–––
115
–––
tf
Ciss
Input Capacitance
––– 16488 –––
VGS = 0V
VDS = 25V
Output Capacitance
–––
1990
–––
Coss
Crss
Reverse Transfer Capacitance
–––
1373
–––
pF ƒ = 1.0 MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related) –––
2323
–––
VGS = 0V, VDS = 0V to 32V
–––
2875
–––
VGS = 0V, VDS = 0V to 32V
Coss eff. (TR) Effective Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
Continuous Source Current
500
MOSFET symbol
–––
–––
A
IS
(Body Diode)
showing the
integral reverse
Pulsed Source Current
1200
A
–––
–––
ISM
(Body Diode)
p-n junction diode.
VSD
Diode Forward Voltage
–––
0.8
1.2
V TJ = 25°C, IS = 100A, VGS = 0V
dv/dt
Peak Diode Recovery
–––
2.4
––– V/ns TJ = 175°C, IS = 100A, VGS = 40V
–––
52
–––
TJ = 25°C V = 34V,
R
trr
Reverse Recovery Time
ns
–––
57
–––
TJ = 125°C I = 100A
F
–––
97
–––
TJ = 25°C
di/dt = 100A/µs
Qrr
Reverse Recovery Charge
nC
–––
97
–––
TJ = 125°C
Reverse Recovery Current
–––
2.8
–––
A TJ = 25°C
IRRM
Notes and are on page 7
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2016-02-15
AUIRLS8409-7P
10000
10000
1000
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
6.0V
5.0V
4.5V
4.0V
3.5V
3.0V
1000
100
BOTTOM
100
3.0V
60µs PULSE WIDTH
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
3.0V
10
10
0.1
1
10
0.1
100
Fig. 1 Typical Output Characteristics
10
100
Fig. 2 Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
10000
ID, Drain-to-Source Current (A)
1
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
1000
TJ = 175°C
100
TJ = 25°C
10
1
VDS = 15V
60µs PULSE WIDTH
0.1
1.0
2.0
3.0
4.0
5.0
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
6.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
100000
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = Cgs + C gd , Cds SHORTED
C rss = Cgd
C oss = C ds + C gd
C, Capacitance (pF)
VGS
15V
10V
6.0V
5.0V
4.5V
4.0V
3.5V
3.0V
Ciss
10000
Coss
ID= 100A
12
VDS= 32V
VDS= 20V
10
8
6
4
2
Crss
0
1000
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
3
0
100
200
300
400
500
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
2016-02-15
AUIRLS8409-7P
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
1000
TJ = 175°C
100
10
TJ = 25°C
1
1msec
100
Limited by
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.1
0.0
0.4
0.8
1.2
0.1
1.6
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
500
Limited By Package
400
300
200
100
0
50
75
100
125
150
10
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
25
1
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
ID, Drain Current (A)
10msec
Package
10
VGS = 0V
52
Id = 5.0mA
50
48
46
44
42
-60
175
-20
20
60
Fig 9. Maximum Drain Current vs. Case Temperature
140
180
Fig 10. Drain-to-Source Breakdown Voltage
3000
EAS, Single Pulse Avalanche Energy (mJ)
1.80
1.60
ID
26A
51A
BOTTOM 100A
TOP
2500
1.40
2000
1.20
Energy (µJ)
100
TJ , Temperature ( °C )
TC , Case Temperature (°C)
1.00
1500
0.80
1000
0.60
0.40
0.20
500
0
0.00
0
10
20
30
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
100µsec
40
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. Drain Current
2016-02-15
AUIRLS8409-7P
Thermal Response ( ZthJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
0.01
100
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs. Pulse width
800
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
EAR , Avalanche Energy (mJ)
700
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
5
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 13, 14).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
2016-02-15
3
3.0
ID = 100A
VGS(th) Gate threshold Voltage (V)
(
RDS(on), Drain-to -Source On Resistance m)
AUIRLS8409-7P
2
TJ = 125°C
1
TJ = 25°C
2.5
2.0
1.5
ID = 250µA
ID = 1.0mA
1.0
ID = 1.0A
0.5
0
0
4
8
12
16
0.0
20
-75 -50 -25
VGS, Gate-to-Source Voltage (V)
25
50
75
100 125 150 175
TJ , Temperature ( °C )
Fig 17. Threshold Voltage vs. Temperature
Fig 16. Typical On-Resistance vs. Gate Voltage
16
1000
14
IF = 40A
VR = 34V
12
TJ = 25°C
TJ = 125°C
IF = 40A
VR = 34V
TJ = 25°C
800
TJ = 125°C
QRR (nC)
IRRM (A)
0
10
8
600
400
6
200
4
2
0
0
100 200 300 400 500 600 700 800 900
0
100 200 300 400 500 600 700 800 900
diF /dt (A/µs)
diF /dt (A/µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
1000
14
IF = 60A
VR = 34V
12
TJ = 25°C
TJ = 125°C
IF = 60A
VR = 34V
TJ = 25°C
800
TJ = 125°C
10
QRR (nC)
IRRM (A)
16
8
600
400
6
200
4
2
0
0
100 200 300 400 500 600 700 800 900
diF /dt (A/µs)
Fig. 20 - Typical Recovery Current vs. dif/dt
6
0
100 200 300 400 500 600 700 800 900
diF /dt (A/µs)
Fig. 21 - Typical Stored Charge vs. dif/dt
2016-02-15
( )
RDS (on) , Drain-to-Source On Resistance m
AUIRLS8409-7P
6.0
VGS = 3.5V
5.0
VGS = 4.5V
VGS = 5.5V
4.0
VGS = 8.0V
VGS = 10V
3.0
2.0
1.0
0.0
0
40
80
120
160
200
ID , Drain Current (A)
Fig 22. Typical On-Resistance vs. Drain Current
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 240A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.146mH
RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 678A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
7
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recom mended footprint and soldering techniques refer to application
note #AN-994.
R is measured at TJ approximately 90°C.
Pulse drain current is limited to 1200A by source bonding technology
2016-02-15
AUIRLS8409-7P
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 22a. Unclamped Inductive Test Circuit
Fig 23a. Switching Time Test Circuit
Fig 24a. Gate Charge Test Circuit
8
Fig 22b. Unclamped Inductive Waveforms
Fig 23b. Switching Time Waveforms
Fig 24b. Gate Charge Waveform
2016-02-15
AUIRLS8409-7P
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2016-02-15
AUIRLS8409-7P
D2Pak - 7 Pin Part Marking Information
Part Number
AULS8409-7P
Date Code
YWWA
IR Logo
XX
Y= Year
WW= Work Week
XX
Lot Code
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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2016-02-15
AUIRLS8409-7P
Qualification Information†
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. IR’s Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D2 PAK 7 Pin
Human Body Model
ESD
Charged Device Model
RoHS Compliant
†
MSL1
Class H3A ( ± 8000V)†
AEC-Q101-001
Class C5 (± 2000V)†
AEC-Q101-005
Yes
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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