ON MC100LVEP210FARG 2.5v / 3.3v 1:5 dual differential ecl/pecl/hstl clock driver Datasheet

MC100LVEP210
2.5V / 3.3V 1:5 Dual
Differential ECL/PECL/HSTL
Clock Driver
Description
The MC100LVEP210 is a low skew 1−to−5 dual differential driver,
designed with clock distribution in mind. The ECL/PECL input
signals can be either differential or single−ended if the VBB output is
used. The signal is fanned out to 5 identical differential outputs. HSTL
inputs can be used when the EP210 is operating in PECL mode.
The LVEP210 specifically guarantees low output−to−output skew.
Optimal design, layout, and processing minimize skew within a device
and from device to device.
To ensure the tight skew specification is realized, both sides of the
differential output need to be terminated identically into 50 W even if
only one output is being used. If an output pair is unused, both outputs
may be left open (unterminated) without affecting skew.
The MC100LVEP210, as with most other ECL devices, can be
operated from a positive VCC supply in PECL mode. This allows the
LVEP210 to be used for high performance clock distribution in +3.3 V
or +2.5 V systems. Single−ended CLK input operation is limited to a
VCC ≥ 3.0 V in PECL mode, or VEE ≤ −3.0 V in ECL mode.
Designers can take advantage of the LVEP210’s performance to
distribute low skew clocks across the backplane or the board. In a
PECL environment, series or Thevenin line terminations are typically
used as they require no additional power supplies. For more
information on using PECL, designers should refer to Application
Note AN1406/D.
Features
•
•
•
•
•
•
•
•
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MARKING
DIAGRAMS*
MC100
LVEP21
AWLYYWWG
32−LEAD LQFP
FA SUFFIX
CASE 873A
1
1
32
QFN32
MN SUFFIX
CASE 488AM
A
WL
YY
WW
G or G
MC100
LVEP210
AWLYYWWG
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
85 ps Typical Device−to−Device Skew
20 ps Typical Output−to−Output Skew
*For additional marking information, refer to
Application Note AND8002/D.
VBB Output
Jitter Less than 1 ps RMS
ORDERING INFORMATION
350 ps Typical Propagation Delay
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Maximum Frequency u 3 GHz Typical
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −2.375 V to −3.8 V
Open Input Default State
•
• LVDS Input Compatible
• Fully Compatible with MC100EP210
• These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2014
May, 2014 − Rev. 15
1
Publication Order Number:
MC100LVEP210/D
MC100LVEP210
Exposed Pad
(EP)
VCC Qa0 Qa0 Qa1 Qa1 Qa2 Qa2 VCC
VCC Qa0 Qa0 Qa1 Qa1 Qa2 Qa2 VCC
25
26
27
28
29
30
31
32
4
24 Qa3
Qa3
NC
2
23 Qa3
Qa4
CLKa 3
22 Qa4
Qa4
CLKa 4
21 Qa4
MC100LVEP210
20
19
Qb0
18
Qb1
17
Qb1
8
Qb0
7
VEE
25
1
6
CLKb
26
VCC
5
CLKb
27
Qa3
MC100LVEP210
VBB
28
21
3
CLKa
29
22
CLKa
30
23
2
NC
31
24
1
VCC
32
VBB
5
20 Qb0
CLKb 6
19 Qb0
CLKb 7
18 Qb1
VEE
16
15
14
13
12
11
9
10
17 Qb1
8
9
10
11
12
13
14
15
16
VCC Qb4 Qb4 Qb3 Qb3 Qb2 Qb2 VCC
VCC Qb4 Qb4 Qb3 Qb3 Qb2 Qb2 VCC
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 2. LQFP−32 Pinout (Top View)
Figure 1. 32−Lead QFN Pinout (Top View)
Table 1. PIN DESCRIPTION
PIN
FUNCTION
CLKn*, CLKn**
ECL/PECL/HSTL CLK Inputs
Qn0:4, Qn0:4
ECL/PECL Outputs
VBB
Reference Voltage Output
VCC
Positive Supply
VEE
Negative Supply
EP
The exposed pad (EP) on the QFN−32 package bottom is thermally connected to the die for improved heat transfer out of the package. THe exposed pad must be attached to a heat−sinking
conduit. The pad is electrically connected to VEE.
* Pins will default LOW when left open.
** Pins will default to VCC/2 when left open.
Qa0
Qb0
Qa0
Qb0
Qb1
Qa1
CLKa
CLKb
Qa1
CLKa
Qb1
CLKb
Qa2
Qb2
Qb2
Qa2
Qa3
VBB
Qa3
Qb3
Qb3
VCC
Qa4
VEE
Qa4
Figure 3. Logic Diagram
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2
Qb4
Qb4
MC100LVEP210
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pull−up Resistor
ESD Protection
37.5 kW
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity (Note 1)
LQFP−32
QFN−32
Flammability Rating
Oxygen Index: 28 to 34
> 2 kV
> 100 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 2
N/A
Level 2
Level 1
UL 94 V−0 @ 0.125 in
Transistor Count
461 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
LQFP−32
LQFP−32
80
55
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
LQFP−32
12 to 17
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
QFN−32
QFN−32
31
27
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
2S2P
QFN−32
12
°C/W
Tsol
Wave Solder
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
265
265
°C
Pb
Pb−Free
Condition 2
VI ≤ VCC
VI ≥ VEE
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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MC100LVEP210
Table 4. PECL DC CHARACTERISTICS VCC = 2.5 V; VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
55
70
90
55
70
90
55
70
90
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VOL
Output LOW Voltage (Note 3)
505
680
900
505
680
900
505
680
900
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
1.2
2.5
1.2
2.5
1.2
2.5
V
VIL
Input LOW Voltage (Single−Ended)
505
900
505
900
505
900
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
CLK
CLK
0.5
−150
150
0.5
−150
mA
0.5
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.125 V to −1.3 V.
3. All loading with 50 W to VEE.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 5. PECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0 V (Note 5)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
55
70
90
55
70
90
55
70
90
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 6)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 6)
1305
1480
1700
1305
1480
1700
1305
1480
1700
mV
VIH
Input HIGH Voltage (Single−Ended)
2135
2420
2135
2420
2135
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1305
1700
1305
1700
1305
1700
mV
VBB
Output Reference Voltage (Note 7)
1775
1975
1775
1975
1775
1975
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 8)
1.2
3.3
1.2
3.3
1.2
3.3
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
1875
150
CLK
CLK
0.5
−150
1875
150
0.5
−150
0.5
−150
1875
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.925 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. Single−ended input operation is limited VCC ≥ 3.0 V in PECL mode.
8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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MC100LVEP210
Table 6. NECL DC CHARACTERISTICS VCC = 0 V, VEE = −2.375 V to −3.8 V (Note 9)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
55
70
90
55
70
90
55
70
90
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 10)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 10)
−1995
−1820
−1600
−1995
−1820
−1600
−1995
−1820
−1600
mV
VIH
Input HIGH Voltage (Single−Ended)
−1165
−880
−1165
−880
−1165
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1995
−1600
−1995
−1600
−1995
−1600
mV
VBB
Output Reference Voltage (Note 11)
−1525
−1325
−1525
−1325
−1525
−1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 12)
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
mA
−1425
VEE + 1.2
0.0
−1425
VEE + 1.2
0.0
150
CLK
CLK
−1425
VEE + 1.2
150
0.5
−150
0.5
−150
0.5
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. Input and output parameters vary 1:1 with VCC.
10. All loading with 50 W to VCC − 2.0 V.
11. Single−ended input operation is limited VEE ≤ −3.0V in NECL mode.
12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. HSTL DC CHARACTERISTICS VCC = 2.375 to 3.8 V, VEE = 0 V
−40°C
Symbol
Characteristic
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCM
Input Crossover Voltage
680
ICC
Power Supply Current (Outputs Open)
55
Typ
25°C
Max
1200
Min
Typ
85°C
Max
1200
Typ
680
90
55
70
900
680
90
55
Unit
mV
400
900
Max
1200
400
70
Min
70
400
mV
900
mV
90
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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MC100LVEP210
Table 8. AC CHARACTERISTICS VCC = 0 V; VEE = −2.375 to −3.8 V or VCC = 2.375 to 3.8 V; VEE = 0 V (Note 13)
−40°C
Symbol
fmaxPECL/
Min
Characteristic
Typ
Maximum Frequency (Figure 4)
25°C
Max
Min
3
Typ
85°C
Max
Min
3
Typ
Max
3
Unit
GHz
HSTL
tPLH/tPHL
Propagation Delay @ 2.5 V
Propagation Delay @ 3.3 V
220
220
tskew
Within−Device Skew (Note 14)
Device−to−Device Skew (Note 15)
tJITTER
CLOCK Random Jitter (RMS)
@ v0.5 GHz
@ v1.0 GHz
@ v1.5 GHz
@ v2.0 GHz
@ v2.5 GHz
@ v3.0 GHz
300
300
380
380
20
85
270
270
350
350
430
430
25
160
20
85
0.184
0.190
0.178
0.196
0.239
0.336
0.3
0.3
0.3
0.3
0.4
0.5
300
330
400
410
500
490
ps
25
160
20
85
35
160
ps
0.207
0.200
0.197
0.233
0.301
0.422
0.3
0.3
0.3
0.4
0.4
0.5
0.271
0.252
0.259
0.308
0.399
0.572
0.4
0.4
0.4
0.5
0.5
0.9
ps
VPP
Minimum Input Swing
150
800
1200
150
800
1200
150
800
1200
mV
tr/tf
Output Rise/Fall Time (20%−80%)
100
170
250
120
190
270
150
280
350
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
13. Measured with 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
14. Skew is measured between outputs under identical transitions of similar paths through a device.
15. Device−to−Device skew for identical transitions at identical VCC levels.
800
VOUTpp (mV)
700
600
500
400
300
200
100
0
0
1000
2000
3000
4000
FREQUENCY (MHz)
Figure 4. Fmax Typical
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6
5000
6000
MC100LVEP210
Zo = 50 W
Q
D
Receiver
Device
Driver
Device
Zo = 50 W
Q
D
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
ORDERING INFORMATION
Package
Shipping†
MC100LVEP210FAG
LQFP
(Pb−Free)
250 Units / Tray
MC100LVEP210FARG
LQFP
(Pb−Free)
2000 / Tape & Reel
MC100LVEP210MNG
QFN32
(Pb−Free)
74 Units / Rail
MC100LVEP210MNR2G
QFN32
(Pb−Free)
1000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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MC100LVEP210
PACKAGE DIMENSIONS
A
4X
A1
32
−T−, −U−, −Z−
32 LEAD LQFP
CASE 873A−02
ISSUE C
25
0.20 (0.008) AB T-U Z
1
AE
−U−
−T−
B
P
V
17
8
BASE
METAL
DETAIL Y
V1
ÉÉ
ÉÉ
ÉÉ
ÉÉ
−Z−
9
S1
4X
0.20 (0.008) AC T-U Z
F
S
8X
M_
J
R
D
DETAIL AD
G
SECTION AE−AE
−AB−
C E
−AC−
H
W
K
X
DETAIL AD
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DATUM PLANE −AB− IS LOCATED AT
BOTTOM OF LEAD AND IS COINCIDENT
WITH THE LEAD WHERE THE LEAD
EXITS THE PLASTIC BODY AT THE
BOTTOM OF THE PARTING LINE.
4. DATUMS −T−, −U−, AND −Z− TO BE
DETERMINED AT DATUM PLANE −AB−.
5. DIMENSIONS S AND V TO BE
DETERMINED AT SEATING PLANE −AC−.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.250 (0.010) PER SIDE.
DIMENSIONS A AND B DO INCLUDE
MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE −AB−.
7. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. DAMBAR
PROTRUSION SHALL NOT CAUSE THE
D DIMENSION TO EXCEED 0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS
SHALL BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY
VARY FROM DEPICTION.
DIM
A
A1
B
B1
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
S1
V
V1
W
X
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8
MILLIMETERS
MIN
MAX
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
1.400
1.600
0.300
0.450
1.350
1.450
0.300
0.400
0.800 BSC
0.050
0.150
0.090
0.200
0.450
0.750
12_ REF
0.090
0.160
0.400 BSC
1_
5_
0.150
0.250
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
INCHES
MIN
MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
0.055
0.063
0.012
0.018
0.053
0.057
0.012
0.016
0.031 BSC
0.002
0.006
0.004
0.008
0.018
0.030
12_ REF
0.004
0.006
0.016 BSC
1_
5_
0.006
0.010
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
Q_
0.250 (0.010)
0.10 (0.004) AC
GAUGE PLANE
SEATING
PLANE
M
N
9
0.20 (0.008)
DETAIL Y
AC T-U Z
AE
B1
MC100LVEP210
PACKAGE DIMENSIONS
QFN32 5x5, 0.5P
CASE 488AM
ISSUE A
A
B
D
ÉÉ
ÉÉ
PIN ONE
LOCATION
L
L
L1
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
E
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
0.15 C
0.15 C
A
DETAIL B
0.10 C
ÉÉÉ
ÇÇÇ
ÇÇÇ
EXPOSED Cu
TOP VIEW
(A3)
A1
MOLD CMPD
DETAIL B
ALTERNATE
CONSTRUCTION
0.08 C
SEATING
PLANE
C
SIDE VIEW
NOTE 4
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
9
K
D2
32X
5.30
17
8
MILLIMETERS
MIN
MAX
1.00
0.80
−−−
0.05
0.20 REF
0.18
0.30
5.00 BSC
3.25
2.95
5.00 BSC
2.95
3.25
0.50 BSC
0.20
−−−
0.30
0.50
−−−
0.15
3.35
32X
0.63
L
E2
1
32
3.35 5.30
25
e
e/2
32X
BOTTOM VIEW
b
0.10
M
C A B
0.05
M
C
NOTE 3
0.50
PITCH
32X
0.30
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
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