A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Features and Benefits Description ▪ Continuous-time operation ▫ Fast power-on time ▫ Low noise ▪ Stable operation over full operating temperature range ▪ Reverse battery protection ▪ Solid-state reliability ▪ Factory-programmed at end-of-line for optimum performance ▪ Robust EMC performance ▪ High ESD rating ▪ Regulator stability without a bypass capacitor The Allegro™ A1101-A1104 and A1106 Hall-effect switches are next generation replacements for the popular Allegro 312x and 314x lines of unipolar switches. The A110x family, produced with BiCMOS technology, consists of devices that feature fast power-on time and low-noise operation. Device programming is performed after packaging, to ensure increased switchpoint accuracy by eliminating offsets that can be induced by package stress. Unique Hall element geometries and lowoffset amplifiers help to minimize noise and to reduce the residual offset voltage normally caused by device overmolding, temperature excursions, and thermal stress. The A1101-A1104 and A1106 Hall-effect switches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor. The integrated voltage regulator permits operation from 3.8 to 24 V. The extensive on-board protection circuitry makes possible a ±30 V absolute maximum voltage rating for superior protection in automotive and industrial motor commutation applications, without adding Packages: 3-pin SOT23W (suffix LH), and 3-pin SIP (suffix UA) LH: A1101, A1102, A1103, A1104, and A1106 Not to scale UA: A1101, A1102, A1103, and A1104 Continued on the next page… UA: A1106 Functional Block Diagram VCC To all subcircuits Regulator VOUT Amp Gain Offset Trim Control GND A1101-DS, Rev. 15 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Description (continued) external components. All devices in the family are identical except for magnetic switchpoint levels. The small geometries of the BiCMOS process allow these devices to be provided in ultrasmall packages. The package styles available provide magnetically optimized solutions for most applications. Package LH is an SOT23W, a miniature low-profile surface-mount package, while package UA is a three-lead ultramini SIP for throughhole mounting. Each package is lead (Pb) free, with 100% matte tin plated leadframes. Selection Guide Part Number Packing* Mounting Ambient, TA A1101ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1101EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1101LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1101LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1102ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1102EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1102LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1102LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1103ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1103LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1103LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1104EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1104LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1104LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1106EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1106LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount A1106LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole BRP (Min) BOP (Max) 10 175 60 245 150 355 25 450 160 430 –40ºC to 85ºC –40ºC to 150ºC –40ºC to 85ºC –40ºC to 150ºC –40ºC to 85ºC –40ºC to 150ºC –40ºC to 85ºC –40ºC to 150ºC –40ºC to 85ºC –40ºC to 150ºC *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage VCC 30 V Reverse Supply Voltage VRCC –30 V V Output Off Voltage VOUT 30 Reverse Output Voltage VROUT –0.5 V IOUTSINK 25 mA Output Current Magnetic Flux Density B Unlimited G Range E –40 to 85 ºC Range L Operating Ambient Temperature TA –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Tstg –65 to 170 ºC Storage Temperature Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family ELECTRICAL OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Supply Symbol Test Conditions Min. Typ. Max. Operating, TJ < 165°C 3.8 – 24 V VOUT = 24 V, B < BRP – – 10 µA IOUT = 20 mA, B > BOP – 215 400 mV Slew rate (dVCC/dt) < 2.5 V/μs, B > BOP + 5 G or B < BRP – 5 G – – 4 µs tr VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF – – 400 ns tf Voltage1 VCC Output Leakage Current IOUTOFF VOUT(SAT) Output On Voltage Power-On Time2 tPO Output Rise Time3 Output Fall Time3 Supply Current Reverse Battery Current Units VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF – – 400 ns ICCON B > BOP – 4.1 7.5 mA ICCOFF B < BRP – 3.8 7.5 mA VRCC = –30 V – – –10 mA IRCC Supply Zener Clamp Voltage VZ ICC = 10.5 mA; TA = 25°C 32 – – V Supply Zener Current4 IZ VZ = 32 V; TA = 25°C – – 10.5 mA Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section. 2 For V CC slew rates greater than 250 V/μs, and TA = 150°C, the Power-On Time can reach its maximum value. 3 C =oscilloscope probe capacitance. S 4 Maximum current limit is equal to the maximum I CC(max) + 3 mA. 1 DEVICE QUALIFICATION PROGRAM Contact Allegro for information. EMC (Electromagnetic Compatibility) REQUIREMENTS Contact Allegro for information. Package LH GND Package UA, 3-pin SIP Terminal List Name VCC VOUT GND Description Connects power supply to chip Output from circuit Ground 2 3 VOUT VOUT 1 GND 2 VCC 1 VCC 3 Number Package LH Package UA 1 1 2 3 3 2 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family MAGNETIC OPERATING CHARACTERISTICS1 over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units A1101 A1102 Operate Point BOP A1103 A1104 A1106 A1101 A1102 Release Point BRP A1103 A1104 A1106 A1101 A1102 Hysteresis BHYS A1103 A1104 A1106 TA = 25°C 50 100 160 G Operating Temperature Range 30 100 175 G TA = 25°C 130 180 230 G Operating Temperature Range 115 180 245 G TA = 25°C 220 280 340 G Operating Temperature Range 205 280 355 G TA = 25°C 70 – 350 G Operating Temperature Range 35 – 450 G TA = 25°C 280 340 400 G Operating Temperature Range 260 340 430 G TA = 25°C 10 45 130 G Operating Temperature Range 10 45 145 G TA = 25°C 75 125 175 G Operating Temperature Range 60 125 190 G TA = 25°C 165 225 285 G Operating Temperature Range 150 225 300 G TA = 25°C 50 – 330 G Operating Temperature Range 25 – 430 G TA = 25°C 180 240 300 G Operating Temperature Range 160 240 330 G TA = 25°C 20 55 80 G Operating Temperature Range 20 55 80 G TA = 25°C 30 55 80 G Operating Temperature Range 30 55 80 G TA = 25°C 30 55 80 G Operating Temperature Range 30 55 80 G TA = 25°C 20 55 – G Operating Temperature Range 20 55 – G TA = 25°C 70 105 140 G Operating Temperature Range 70 105 140 G Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but opposite polarity). 1 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Characteristic Symbol Test Conditions RθJA Maximum Allowable VCC (V) Package Thermal Resistance Value Units Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 ºC/W Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W Power Derating Curve TJ(max) = 165ºC; ICC = ICC(max) 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 VCC(max) Package LH, 2-layer PCB (RθJA = 110 ºC/W) Package UA, 1-layer PCB (RθJA = 165 ºC/W) Package LH, 1-layer PCB (RθJA = 228 ºC/W) 20 40 60 80 100 VCC(min) 120 140 160 180 Power Dissipation, PD (mW) Temperature (ºC) Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 Pa (R cka ge θJ A = L 11 H, 2 0 º -la Pac C/ ye W (R kage ) r PC UA θJA = B , 165 1-la ºC/ yer W) PC B Pac k (R age LH , θJA = 228 1-laye ºC/W r PC B ) 20 40 60 80 100 120 Temperature (°C) 140 160 180 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Characteristic Data Supply Current (On) versus Ambient Temperature Supply Current (On) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 8.0 8.0 7.0 7.0 VCC (V) 5.0 24 3.8 4.0 3.0 ICCON (mA) ICCON (mA) 6.0 6.0 TA (°C) 5.0 –40 25 150 4.0 3.0 2.0 2.0 1.0 1.0 0 0 –50 0 50 TA (°C) 100 150 0 5 20 25 Supply Current (Off) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 8.0 7.0 7.0 VCC (V) 5.0 24 3.8 4.0 3.0 ICCOFF (mA) 8.0 6.0 ICCOFF (mA) 15 VCC (V) Supply Current (Off) versus Ambient Temperature 6.0 TA (°C) 5.0 –40 25 150 4.0 3.0 2.0 2.0 1.0 1.0 0 0 –50 0 50 TA (°C) 100 0 150 5 10 15 20 25 VCC (V) Output Voltage (On) versus Ambient Temperature Output Voltage (On) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 400 400 350 350 300 300 250 VCC (V) 200 24 3.8 150 VOUT(SAT) (mV) VOUT(SAT) (mV) 10 –40 25 150 200 150 100 100 50 50 0 TA (°C) 250 0 –50 0 50 TA (°C) 100 150 0 5 10 15 20 25 VCC (V) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Functional Description OPERATION The output of these devices switches low (turns on) when a magnetic field (south polarity) perpendicular to the Hall element exceeds the operate point threshold, BOP. After turn-on, the output is capable of sinking 25 mA and the output voltage is VOUT(SAT). When the magnetic field is reduced below the release point, BRP , the device output goes high (turns off). The difference in the magnetic operate and release points is the hysteresis, Bhys, of the device. This built-in hysteresis allows clean switching of the output, even in the presence of external mechanical vibration and electrical noise. Powering-on the device in the hysteresis region, less than BOP and higher than BRP, allows an indeterminate output state. The correct state is attained after the first excursion beyond BOP or BRP. CONTINUOUS-TIME BENEFITS packaging to tighten magnetic parameter distributions. In contrast, chopper-stabilized switches employ an offset cancellation technique on the chip that eliminates these offsets without the need for after-packaging programming. The tradeoff is a longer settling time and reduced frequency response as a result of the chopper-stabilization offset cancellation algorithm. The choice between continuous-time and chopper-stabilized designs is solely determined by the application. Battery management is an example where continuous-time is often required. In these applications, VCC is chopped with a very small duty cycle in order to conserve power (refer to figure 2). The duty cycle is controlled by the power-on time, tPO, of the device. Because continuous-time devices have the shorter power-on time, they are the clear choice for such applications. Continuous-time devices, such as the A110x family, offer the fastest available power-on settling time and frequency response. Due to offsets generated during the IC packaging process, continuous-time devices typically require programming after For more information on the chopper stabilization technique, refer to Technical Paper STP 97-10, Monolithic Magnetic Hall Sensing Using Dynamic Quadrature Offset Cancellation and Technical Paper STP 99-1, Chopper-Stabilized Amplifiers with a Track-and-Hold Signal Demodulator. (A) (B) VS V+ A110x VOUT(SAT) BOP B– 0 BRP VOUT 0 VCC Switch to Low Switch to High VCC RL VOUT Output GND B+ BHYS Figure 1. Switching Behavior of Unipolar Switches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when using a circuit such as that shown in Panel B. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family ADDITIONAL APPLICATIONS INFORMATION Extensive applications information for Hall-effect devices is available in: • Hall-Effect IC Applications Guide, Application Note 27701 • Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead Welding and Lead Forming, Application Note 27703.1 • Soldering Methods for Allegro’s Products – SMT and ThroughHole, Application Note 26009 All are provided in Allegro Electronic Data Book, AMS-702, and the Allegro Web site, www.allegromicro.com. 1 2 3 4 5 VCC t VOUT t Output Sampled tPO(max) Figure 2. Continuous-Time Application, B < BRP.. This figure illustrates the use of a quick cycle for chopping VCC in order to conserve battery power. Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, tPO(max). The case shown is where the correct output state is HIGH . Position 3, tPO(max) has elapsed. The device output is valid. Position 4, after the output is valid, a control unit reads the output. Position 5, power is removed from the device. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Power Derating Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RθJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN (1) ΔT = PD × RθJA (2) TJ = TA + ΔT Example: Reliability for VCC at TA = 150°C, package UA, using minimum-K PCB. Observe the worst-case ratings for the device, specifically: RθJA = 165°C/W, TJ(max) = 165°C, VCC(max) = 24 V, and ICC(max) = 7.5 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 165 °C/W = 91 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 7.5 mA = 12.1 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then: PD = VCC × ICC = 12 V × 4 mA = 48 mW ΔT = PD × RθJA = 48 mW × 140 °C/W = 7°C TJ = TA + ΔT = 25°C + 7°C = 32°C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Package LH, 3-Pin (SOT-23W) +0.12 2.98 –0.08 1.49 D 3 4°±4° A +0.020 0.180–0.053 0.96 D +0.10 2.90 –0.20 +0.19 1.91 –0.06 2.40 0.70 D 0.25 MIN 1.00 2 1 0.55 REF 0.25 BSC 0.95 Seating Plane Gauge Plane 8X 10° REF B PCB Layout Reference View Branded Face 1.00 ±0.13 0.95 BSC Active Area Depth, 0.28 mm REF B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Branding scale and appearance at supplier discretion Hall element, not to scale NNT 0.40 ±0.10 A D Standard Branding Reference View +0.10 0.05 –0.05 For Reference Only; not for tooling use (reference dwg. 802840) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown C C 1 N = Last two digits of device part number T = Temperature code (letter) NNN 1 N = Last three digits of device part number Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Package UA, 3-Pin SIP (A1101, A1102, A1103. and A1104) +0.08 4.09 –0.05 45° B C E 2.04 1.52 ±0.05 1.44 E Mold Ejector Pin Indent +0.08 3.02 –0.05 E Branded Face NNT 45° 1 D Standard Branding Reference View 2.16 MAX = Supplier emblem N = Last two digits of device part number T = Temperature code 0.79 REF 0.51 REF A 1 2 3 +0.03 0.41 –0.06 15.75 ±0.51 For Reference Only; not for tooling use (reference DWG-9049) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Dambar removal protrusion (6X) B Gate burr area C Active Area Depth, 0.50 mm REF +0.05 0.43 –0.07 D Branding scale and appearance at supplier discretion E Hall element, not to scale 1.27 NOM Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Package UA, 3-Pin SIP (A1106) +0.08 4.09 –0.05 45° B C E 2.04 1.52 ±0.05 1.44 E +0.08 3.02 –0.05 E A 1.02 MAX 1 2 10° Mold Ejector Pin Indent Branded Face NNT 45° 1 D Standard Branding Reference View 0.79 REF = Supplier emblem N = Last two digits of device part number T = Temperature code 3 For Reference Only; not for tooling use (reference DWG-9065) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown +0.03 0.41 –0.06 14.99 ±0.25 +0.05 0.43 –0.07 A Dambar removal protrusion (6X) B Gate and tie bar burr area C Active Area Depth, 0.50 mm REF D Branding scale and appearance at supplier discretion E Hall element (not to scale) 1.27 NOM Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Revision History Revision Revision Date Rev. 14 January 21, 2014 Description of Revision Removed P/Ns from LH package drwg. Copyright ©2006-2014, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13