Burr-Brown MPC104AU Wide-bandwidth 2 x 1 video multiplexer Datasheet

MP
®
MPC104
C10
MP
4
C10
4
Wide-Bandwidth
2 x 1 VIDEO MULTIPLEXER
FEATURES
The MPC104 consists of two identical monolithic,
integrated, open-loop buffer amplifiers, which are
connected internally at the output. The bipolar complementary buffers form a unidirectional transmission
path and offer extremely high output-to-input isolation. The MPC104 multiplexer enables the user to
connect one of two input signals to the output. The
output of the multiplexer is in a high-impedance state
when no channel is selected. When one channel is
selected with a digital “1” at the corresponding SEL
input, the component acts as a buffer with high input
impedance and low output impedance.
● BANDWIDTH: 210MHz (1.4Vp-p)
● LOW INTERCHANNEL CROSSTALK:
–79dB (30MHz, SO); –77dB (30MHz, DIP)
● LOW SWITCHING TRANSIENTS:
+13mV/–4mV
● LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.03%, 0.01°
● LOW QUIESCENT CURRENT:
One Channel Selected: ±4.6mA
No Channel Selected: ±120µA
The wide bandwidth of over 210MHz at 1.4Vp-p
signal level, high linearity and low distortion, and low
input voltage noise of 5nV/√Hz make this crosspoint
switch suitable for RF and video applications. All
performance is specified with ±5V supply voltage,
which reduces power consumption in comparison with
±15V designs. The multiplexer is available in a spacesaving 8-pin SO and DIP packages. Both are designed
and specified for operation over the industrial temperature range (–40°C to +85°C.)
APPLICATIONS
● VIDEO ROUTING AND MULTIPLEXING
(CROSSPOINTS)
● RADAR SYSTEMS
● DATA ACQUISITION
● INFORMATION TERMINALS
● SATELLITE OR RADIO LINK IF ROUTING
DESCRIPTION
IN1
VOUT
The MPC104 is a wide-bandwidth, 2-to-1 channel
video signal multiplexer, which can be used in a wide
variety of applications.
It was designed for wide-bandwidth systems, including high-definition television and broadcast equipment. Although it is primarily used to route video
signals, the harmonic and dynamic attributes of the
MPC104 also make it appropriate for other analog
signal routing applications such as radar, communications, computer graphics, and data acquisition systems.
+1
+1
IN2
SEL1
SEL2
TRUTH TABLE
SEL1
SEL2
VOUT
0
0
HI-Z
1
0
IN1
0
1
IN2
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
1994 Burr-Brown Corporation
PDS-1230C
Printed in U.S.A. July, 1994
SPECIFICATIONS–DC CHARACTERISTICS
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC104AP, AU
PARAMETER
CONDITIONS
INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
Initial Matching
INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
INPUT IMPEDANCE
Resistance
Capacitance
Capacitance
INPUT NOISE
Voltage Noise Density
Signal-to-Noise Ratio
INPUT VOLTAGE RANGE
TRANSFER CHARACTERISTICS
Voltage Gain
RATED OUTPUT
Voltage
Resistance
Resistance
Capacitance
MIN
TYP
MAX
UNITS
14
60
–80
–50
–50
3
±30
mV
µV/°C
dB
dB
dB
mV
±10
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
5
20
±710
0.26
1.7
µA
nA/°C
nA/V
µA/V
µA/V
Channel On
Channel On
Channel Off
0.88
1.0
1.0
MΩ
pF
pF
fOUT = 20kHz to 10MHz
S/N = 0.7/V N • √5MHz
5
96
nV/√Hz
dB
Gain Error ≤ 10%
±3.6
V
0.982
0.992
V/V
V/V
±2.97
12.5
900
1.2
V
Ω
MΩ
pF
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
All Buffers
–40
RL = 1kΩ, VIN = ±2V
RL = 10kΩ, VIN = ±2.8V
0.98
VIN = ±3V
One Channel Selected
No Channel Selected
No Channel Selected
CHANNEL SELECTION INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
SWITCHING CHARACTERISTICS
SEL to Channel ON Time
SEL to Channel OFF Time
Switching Transient, Positive
Switching Transient, Negative
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
±2.8
+2
VSEL = 5.0V
VSEL = 0.8V
75
VI = –0.3V to +0.7V, f = 5MHz
90% Point of VOUT = 1Vp-p
10% Point of VOUT = 1Vp-p
(Measured While Switching
Between Two Grounded Channels)
Rejection Ratio
±5
±4.6
±120
–80
V
V
µA
µA
µs
µs
mV
mV
0.13
0.17
+13
–4
±4.5
One Channel Selected, Over Temperature
No Channel Selected, Over Temperature
100
0.002
VCC +0.6
+0.8
125
5
±5.5
±5.3
±175
V
V
mA
µA
dB
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
MPC104
2
SPECIFICATIONS– AC CHARACTERISTICS
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC104AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LARGE SIGNAL BANDWIDTH (–3dB)
VOUT = 5.0Vp-p, COUT = 1pF
VOUT = 2.8Vp-p, COUT = 1pF
VOUT = 1.4Vp-p, COUT = 1pF
55
101
210
MHz
MHz
MHz
SMALL SIGNAL BANDWIDTH
VOUT = 0.2Vp-p, COUT = 1pF
590
MHz
GROUP DELAY TIME
550
ps
DIFFERENTIAL GAIN
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.03
%
DIFFERENTIAL PHASE
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.01
Degrees
VOUT = 0.2Vp-p, DC to 30MHz
VOUT = 0.2Vp-p, DC to 100MHz
0.05
0.07
dB
dB
–63
–65
dBc
dBc
VIN = 1.4Vp-p
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz
–90
–77
–93
–81
–95
–79
–93
–86
dB
dB
dB
dB
dB
dB
dB
dB
VOUT = 1.4Vp-p, Step 10% to 90%
COUT = 1pF, ROUT = 22Ω
2.3
ns
VOUT = 1.4Vp-p
COUT = 1pF
COUT = 22pF
COUT = 47pF
500
360
260
V/µs
V/µs
V/µs
GAIN FLATNESS PEAKING
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
CROSSTALK
MPC104AP Channel-to-Channel
Off Isolation
MPC104AU Channel-to-Channel
Off Isolation
RISE/FALL TIME
SLEW RATE
f = 30MHz, VOUT = 1.4Vp-p
®
3
MPC104
CONNECTION DIAGRAM
PIN DESCRIPTION
Top View
PIN
DIP/SO-8
DESCRIPTION
IN1 , IN2
IN1 1
+1
GND 2
+VCC 3
IN2 4
+1
8
SEL1
7
–VCC
6
VOUT
5
SEL2
MPC104AP
MPC104AU
8-Pin Plastic DIP
SO-8 Surface Mount
006
182
–VCC
Negative Supply Voltage; typical –5VDC
+VCC
Positive Supply Voltage; typical +5VDC
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
MPC104
Analog Output; tracks selected channel
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
PACKAGE/ORDERING INFORMATION
PACKAGE
Channel Selection Inputs
VOUT
ELECTROSTATIC
DISCHARGE SENSITIVITY
Power Supply Voltage (±VCC) ......................................................... ±6VDC
Analog Input Voltage (IN1 through IN2) ................................... ±VCC, ±0.7V
Operating Temperature ..................................................... –40°C to +85°C
Storage Temperature ...................................................... –40°C to +125°C
Output Current .................................................................................. ±6mA
Junction Temperature .................................................................... +175°C
Lead Temperature (soldering, 10s) ................................................ +300°C
Digital Input Voltages (SEL1 through SEL2) .............. –0.5V to +VCC +0.7V
PRODUCT
Analog Input Shielding Grounds,
Connect to System Ground
SEL1, SEL2
ABSOLUTE MAXIMUM RATINGS
PACKAGE
DRAWING
NUMBER(1)
Analog Input Channels
GND
4
TYPICAL PERFORMANCE CURVES
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
INPUT BIAS CURRENT vs TEMPERATURE
Input Offset Voltage (mV)
INPUT OFFSET VOLTAGE vs TEMPERATURE
18
7
16
6
Input Bias Current (µA)
14
12
10
8
6
4
5
4
3
2
1
2
0
–40
0
–20
0
20
40
60
80
–40
100
–20
0
INPUT IMPEDANCE vs FREQUENCY
40
60
80
100
OUTPUT IMPEDANCE vs FREQUENCY
1.0M
100
90
Output Impedance (Ω)
100k
10k
1k
80
70
60
50
40
30
20
100
10
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
TOTAL POSITIVE QUIESCENT CURRENT
vs TEMPERATURE
TOTAL POSITIVE QUIESCENT CURRENT
vs TEMPERATURE
9
1G
140
8
120
One Channel Selected
7
Supply Current (µA)
Supply Current (mA)
Input Impedance (Ω)
20
Temperature (°C)
Temperature (°C)
6
5
4
3
100
80
60
No Channel Selected
40
2
20
1
0
–40
0
–20
0
20
40
60
80
100
–40
Temperature (°C)
–20
0
20
40
60
80
100
Temperature (°C)
®
5
MPC104
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
GAIN ERROR vs INPUT VOLTAGE
TRANSFER FUNCTION
50
5
4
40
2
Gain Error (%)
Output Voltage (V)
3
1
0
–1
–2
–40°C
30
+25°C
20
+85°C
10
–3
–4
–5
0
–5
–4
–3
–2
–1
0
1
2
3
4
–5
5
–4
–3
–2
–1
0
1
2
3
4
5
Input Voltage (V)
Input Voltage (V)
SWITCHING ENVELOPE
(Channel-to-Channel Switching)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
Voltage Noise (nV/ Hz)
100
SEL
+0.7V
10
VOUT
0V
–0.3V
1
0
10
100
1k
10k
100k
1M
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
10M
Time (µs)
Frequency (Hz)
SEL1
8
100Ω
VIN
1
DB1
VOUT1
6
100Ω
4
DB2
5
SEL2
SWITCHING TRANSIENTS
SWITCHING TRANSIENTS
+5V
+5V
SEL
0V
+20mV
SEL
0V
36MHz Low-Pass Filter
Acc. Eureka Rec. EU95-PG03 in
36MHz
Low Path
Pass Filter
Signal
Acc. Eureka Rec. EU95-PG03
Wideband
Measurement
+5mV
VOUT
0V
0V
VOUT
–5mV
–5mV
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0
Time (µs)
Time (µs)
®
MPC104
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
6
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
SMALL SIGNAL PULSE RESPONSE
150
100
100
Output Voltage (mV)
Output Voltage (mV)
SMALL SIGNAL PULSE RESPONSE
150
50
0
–50
–100
50
0
–50
–100
–150
–150
0
20
40
60
80
100
0
20
Time (ns)
VIN = 0.2Vp-p, COUT = 1pF
tRISE = tFALL = 2ns (Generator)
60
80
100
Time (ns)
VIN = 0.2Vp-p, COUT = 47pF
tRISE = tFALL = 2ns (Generator)
LARGE SIGNAL PULSE RESPONSE
LARGE SIGNAL PULSE RESPONSE
3
3
2
2
Output Voltage (V)
Output Voltage (V)
40
1
0
–1
–2
1
0
–1
–2
–3
–3
0
20
40
60
80
100
0
20
Time (ns)
VIN = 4Vp-p, COUT = 1pF
tRISE = tFALL = 2ns (Generator)
40
60
80
100
Time (ns)
VIN = 4Vp-p, COUT = 47pF
tRISE = tFALL = 2ns (Generator)
BANDWIDTH vs COUT WITH RECOMMENDED ROUT
GROUP DELAY TIME vs FREQUENCY
3
5
0
1pF
Output (dB)
Delay Time (ns)
2
1
22Ω
100Ω
180Ω
BUF601
DUT
0 VIN
50Ω
–5
–10
–15
VOUT
1pF
–20
VIN = 1.4Vp-p
10pF
COUT
ROUT
1pF
0Ω
10pF 27Ω
364MHz
22pF 16Ω
279MHz
33pF 12Ω
231MHz
8Ω
188MHz
47pF
–1
f–3dB
571MHz
22pF
33pF
47pF
–25
1M
10M
Frequency (Hz)
100M
1G
1M
10M
100M
1G
Frequency (Hz)
®
7
MPC104
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
GAIN FLATNESS
BANDWIDTH vs OUTPUT VOLTAGE
2
20
5Vp-p
2.8Vp-p
10
1.4Vp-p
VOUT = 0.2Vp-p
Output (dBm)
Output (dB)
1
0
VOUT = 1.4Vp-p
–1
0
–10
0.2Vp-p
–20
–30
–2
–40
1M
10M
100M
1M
1G
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
BANDWIDTH vs RLOAD
BANDWIDTH MATCHING
10
20
RL = 10kΩ
0
RL = 500Ω
Output (dB)
Output (dB)
0
–10
–20
Ch1, Ch2
–10
–20
–30
COUT = 22pF, VOUT = 2.8Vp-p
VOUT = 1.4Vp-p, COUT = 22pF
–30
–40
1M
10M
100M
1G
1M
10M
Frequency (Hz)
30MHz HARMONIC DISTORITION
1G
ON/OFF CHARACTERISTIC
0
Harmonic Distortion (dBc)
100M
Frequency (Hz)
+5V
SEL
–20
0
HP8116A
VIN = 1.4Vp-p
–40
G
BUF601AU
100Ω
180Ω
47Ω
DUT
50Ω
+0.7V
Advantest
R3361A
10kΩ
0V
VOUT
–60
–0.7V
–80
30M
60M
0
90M
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Frequency (Hz)
VOUT = 1.4Vp-p, RL = 10kΩ, COUT = 1pF
Time (µs)
SEL1
8
100Ω
VIN
1
DB1
6
VOUT
100Ω
4
DB2
5
SEL2
®
MPC104
8
APPLICATIONS INFORMATION
low at +13mV and –4mV. The MPC104 consists of two
identical unity-gain buffer amplifiers, respectively connected
together internally at the output. The open-loop buffer amps,
which consist of complementary emitter followers, apply no
feedback so their low-frequency gain is slightly less than
unity and somewhat dependent on loading. Unlike devices
using MOS bilateral switching elements, the bipolar complementary buffers form a unidirectional transmission path,
thus providing high output-to-input isolation. Switching
stages compatible to TTL-level digital signals are provided
for each buffer to select the input channel. When no channel
is selected, the outputs of the device are high-impedance and
allow the user to wire several MPC104s together to create
multichannel switch matrices.
The MPC104 operates from ±5V power supplies (±6V
maximum). Do not attempt to operate with larger power
supply voltages or permanent damage may occur. The buffer
outputs are not current-limited or protected. If the output is
shorted to ground, currents up to 18mA could flow. Momentary shorts to ground (a few seconds) should be avoided, but
are unlikely to cause permanent damage.
INPUT PROTECTION
As shown below, all pins on the MPC104 are internally
protected from ESD by a pair of back-to-back reverse-biased
diodes to either power supply. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier’s power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally limited to 10mA whenever possible.
Chip select logic is not integrated. The selected design
increases the flexibility of address decoding in complex
distribution fields, eases BUS-controlled channel selection,
simplifies channel selection monitoring for the user, and
lowers transient peaks. All of these characteristics make the
multiplexer, in effect, a quad switchable high-speed buffer.
The buffers require DC coupling and termination resistors
when driven directly from a low-impedance cable. Highcurrent output amplifiers are recommended when driving
low-impedance transmission lines or inputs.
The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in
the characteristics of the buffer amplifier input without
necessarily destroying the device. In precision buffer amplifiers, such damage may cause a noticeable degradation of
offset voltage and drift. Therefore, static protection is strongly
recommended when handling the MPC104.
An advanced complementary bipolar process, consisting of
pn-junction isolated, high-frequency NPN and PNP transistors, provides wide bandwidth while maintaining low
crosstalk and harmonic distortion. The single chip bandwidth of over 210MHz at an output voltage of 1.4Vp-p
allows the design of multi-channel crosspoint or distribution
fields in HDTV-quality with an overall system bandwidth of
36MHz, or in quality for high resolution graphic and imaging systems with 200MHz system bandwidth. The buffer
amplifiers also offer low differential gain (0.03%) and phase
(0.01°) errors. These parameters are essential for video
applications and demonstrate how well the signal path maintains a constant small-signal gain and phase for the low-level
color subcarrier at 4.43MHz (PAL) or 3.58MHz (NSTC) as
the luminance signal is ramped through its specified range.
The bipolar construction also ensures that the input impedance remains high and constant between ON and OFF states.
The ON/OFF input capacitance ratio is near unity, and does
not vary with power supply voltage variations. The low
output capacitance of 1.2pF when no channel is selected is
a very important parameter for large distribution fields. Each
parallel output capacitance is an additional load and reduces
the overall system bandwidth.
Static damage has been well-recognized as a problem for
MOSFET devices, but any semiconductor device deserves
protection from this potentially damaging source. The
MPC104 incorporates on-chip ESD protection diodes as
shown in Figure 1. Thus the user does not need to add
external protection diodes, which can add capacitance and
degrade AC performance.
+VCC
External Pin
ESD Protection diodes
internally connected to all pins.
Internal Circuitry
–VCC
FIGURE 1. Internal ESD Protection.
Bipolar video crosspoint switches are virtually glitch-free
when compared to signal switches using CMOS or DMOS
devices. The MPC104 operates with a fast make-beforebreak switching action to keep the output switching transients small and short. Switching from one channel to
another causes the signal to mix at the output for a short
time, but it hardly interferes with the input signals. The
transient peaks remain less than +13mV and –4mV. The
generated output transients are extremely small, so DC
clamping during switching between channels is unnecessary. DC clamping during the switching dead time is re-
DISCUSSION
OF PERFORMANCE
The MPC104 is a 2 x 1, wide-band analog signal multiplexer. It allows the user to connect one of the two inputs
(IN1/IN2 ) to the output. The switching speed between two
input channels is typically less than 300ns.
However, in contrast to signal switches using CMOS or
DMOS transistors, the switching transients were kept very
®
9
MPC104
quired to avoid synchronization by large negative output
glitches in subsequent equipment.
470pF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.
The SEL-to-channel-ON time is typically 25ns and always
shorter than the typical SEL-to-channel-OFF time of 250ns.
In the worst case, an ON/OFF margin of 150ns ensures safe
switching even for timing spreads in the digital control
latches. The short interchannel switching time of 300ns
allows channel change during the vertical blanking time,
even in high-resolution graphic or broadcast systems. As
shown in the typical performance curves, the signal envelope during transition from one channel to another rises and
falls symmetrically and shows less overshooting and DC
settling effects.
• PC board traces for signal and power lines should be wide
to reduce impedance or inductance.
• Make short and low inductance traces. The entire physical
circuit should be as small as possible.
• Use a low-impedance ground plane on the component side
to ensure that low-impedance ground is available throughout the layout. Grounded traces between the input traces
are essential to achieve high interchannel crosstalk rejection.
• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances, such as the buffer’s
input terminals.
Power consumption is a serious problem when designing
large crosspoint fields with high component density. Most of
the buffer amplifiers are in the off-state. One important
design goal was to attain low off-state quiescent current
when no channel is selected. The low supply current of
±120µA when no channel is selected and ±4.6mA when one
channel is selected, as well as the reduced ±5V supply
voltage, conserves power, simplifies the power supply design, and results in cooler, more reliable operation.
• Sockets are not recommended, because they add significant inductance and parasitic capacitance. If sockets must
be used, consider using zero-profile solderless sockets.
• Use low-inductance and surface-mounted components.
Circuits using all surface mount components with the
MPC104 will offer the best AC-performance.
• A resistor (100Ω to 150Ω) in series with the input of the
buffers may help to reduce peaking. Place the resistor as
close as possible to the pin.
CIRCUIT LAYOUT
The high-frequency performance of the MPC104 can be
greatly affected by the physical layout of the circuit. The
following tips are offered as suggestions, not as absolutes.
Oscillations, ringing, poor bandwidth and settling, higher
crosstalk, and peaking are all typical problems which plague
high-speed components when they are used incorrectly.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential—there are no shortcuts.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF), a parallel
SEL1
(8)
IN1
DB1
(1)
GND
(2)
+VCC = +5V
(3)
SEL2
(5)
IN2
(4)
VOUT
(6)
DB2
–VCC = –5V
FIGURE 2. Simplified Circuit Diagram.
®
MPC104
10
(7)
SEL1
RIN1
DB1
IN1
50Ω
50Ω
VOUT
RIN2
SEL2
DB2
IN2
MPC104
CHANNEL
SEL1
SEL2
IN1
IN2
RIN1
RIN2
DB1
1
0
GND
VIN
200Ω
100Ω
DB2
0
1
VIN
GND
100Ω
200Ω
FIGURE 3. Crosstalk Test Circuit 1.
50Ω
SEL1
100Ω
VIN1
DB1
IN1
50Ω
50Ω
50Ω
SEL2
100Ω
DB2
IN2
MPC104
SEL1
0
SEL2
0
–20
–20
–40
–40
Off Isolation Crosstalk (dB)
Interchannel Crosstalk (dB)
FIGURE 4. Off Isolation Test Circuit 2.
–60
MPC104AP
–80
MPC104AU
–100
–120
–140
400k
1M
10M
100M
–60
MPC104AP
–80
–100
–120
–140
400k
1G
MPC104AU
1M
Frequency (Hz)
10M
100M
1G
Frequency (Hz)
FIGURE 5. Interchannel Crosstalk.
FIGURE 6. Off Isolation.
®
11
MPC104
RIN
100Ω
50Ω
ROUT
RB
47Ω
180Ω
BUF601
DUT
RS =
50Ω
50Ω
DSO
12.5GHz
50Ω
CH1 or CH2
MPC104
RIN =
50Ω
COUT
Pulse
Generator
FIGURE 7. Test Circuit Pulse Response.
RIN
100Ω
75Ω
Generator
150Ω
RS =
75Ω
75Ω
ROUT
10kΩ
CH1 or CH2
MPC104
75Ω
+
OPA623
–
DUT
Video
Analyzer
75Ω
RIN =
75Ω
290Ω
4.43MHz
290Ω
VDC
FIGURE 8. Test Circuit Differential Gain and Phase.
RIN
100Ω
50Ω
Generator
ROUT
RB
47Ω
180Ω
BUF601
DUT
RS =
50Ω
50Ω
Spectrum
Analyzer
50Ω
CH1 or CH2
MPC104
RIN =
50Ω
COUT
FIGURE 9. Test Circuit Frequency Response.
MPC
104
SER In
2
MPC
104
8
5
8
4
5
6
MPC
104
8
7
14 13 12 11
1
15
5
8
MPC
104
5
Parallel Out
HC4094
D
3
MPC
104
5
SER 3
Out
MPC
104
8
5
8
4
5
6
MPC
104
3
8
7
14 13 12 11
1
5
8
MPC
104
5
Parallel Out
HC4094
2
MPC
104
5
®
MPC104
12
5
8
4
5
6
MPC
104
1
MPC
104
5
8
7
14 13 12 11
Parallel Out
HC4094
3
•••
•••
•••
FIGURE 10. Serial Bus-Controlled Distribution Field.
8
2
SER 3
•••
Out
15
Clock
STR
OE
MPC
104
15
5
8
5
SER 3
Out
SEL1
SEL2
8
5
+5V –5V
100Ω
In1
1
2.2µF
+
2.2µF
+
10nF
10nF
CH1
50Ω
6
100Ω
In2
100Ω
3
2
4
7
8
4
5
RS
OPA642
CH2
499Ω
12-Bit
10MHz
A/D Converter
402Ω
50Ω
MPC104
3
ADS804
7
2.2µF
+
2.2µF
402Ω
+
+5V
Gain = 2V/V
–5V
FIGURE 11. High-Speed Data Acquisition System.
+VS(1)
2.2µF
+
+VS
3
C1
+VS
2
8
100Ω
SEL1
1
In1
CH1
+VS
C3
ROUT
Out
6
C2
In2
+VS
2
100Ω
RT
4
CH2
MPC104
5
SEL2
7
NOTE: (1) +VS should be within +5V to +10V.
FIGURE 12. Single Supply Operation.
®
13
MPC104
+5V –5V
2.2µF
2.2µF
+
SEL1
+80V, 60mA
16
150Ω
100Ω
In1
1
7
B
10
E
2
B
15
E
8
9
C
1
CH1
75Ω
11
4
150Ω
CH2
1kΩ
75Ω
10nF
MPC104
2.2µF
+
+5V
Contrast
C
2.2µF
+
10Ω
220Ω
220Ω
20pF
NOTE: (1) Philips Semiconductors.
FIGURE 13. Input Multiplexer for a CRT Output Stage.
®
MPC104
14
OPA2662
–5V
14
CR3425
(1)
6
100Ω
In2
+
SEL2
100pF
to
CRT
Channel CH1 - CH6
TTL-Select Lines
+5V –5V
8
100Ω
Red1
5
1
2.2µF
+
2.2µF
+
10nF
10nF
CH1
75Ω
100Ω
Red2
150Ω
6
2
4
7
3
4
OPA623
6
75Ω
Red Out
CH2
390Ω
75Ω
MPC104
7
3
2.2µF
+
390Ω
2.2µF
+
–5V
+5V
+5V –5V
8
100Ω
Green1
5
1
2.2µF
+
2.2µF
+
10nF
10nF
CH3
75Ω
100Ω
Green2
150Ω
6
2
4
7
3
4
OPA623
6
75Ω
Green Out
CH4
390Ω
75Ω
7
MPC104
3
2.2µF
+
390Ω
2.2µF
+
–5V
+5V
+5V –5V
8
100Ω
Blue1
5
1
2.2µF
+
2.2µF
+
10nF
10nF
CH5
75Ω
100Ω
Blue2
150Ω
6
2
4
7
3
4
OPA623
6
75Ω
Blue Out
CH6
390Ω
75Ω
MPC104
7
2.2µF
+
–5V
3
390Ω
2.2µF
+
+5V
FIGURE 14. Input Multiplexer for RGB Video Signals.
®
15
MPC104