Infineon AUIRFN8401 Advanced process technology Datasheet

AUTOMOTIVE GRADE
Features
 Advanced Process Technology
 Ultra Low On-Resistance
 175°C Operating Temperature
 Fast Switching
 Repetitive Avalanche Allowed up to Tjmax
 Lead-Free, RoHS Compliant
 Automotive Qualified *
AUIRFN8401
HEXFET® POWER MOSFET
VDSS
40V
RDS(on) typ.
3.6m
max
4.6m
84A
ID (Silicon Limited)
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating. These features
combine to make this product an extremely efficient and
reliable device for use in Automotive and wide variety of
other applications.
Applications
 Motor Control
 Reverse Battery Protection
 Heavy Loads
Base Part Number
Package Type
AUIRFN8401
PQFN 5mm x 6mm
PQFN 5X6 mm
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tape and Reel
4000
Orderable Part Number
AUIRFN8401TR
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
VGS
EAS
EAS (Tested)
IAR
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Pulsed Drain Current 
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited) 
Single Pulse Avalanche Energy 
Avalanche Current 
EAR
Repetitive Avalanche Energy 
TJ
TSTG
Operating Junction and
Storage Temperature Range
ID @ TC(Bottom) = 25°C
ID @ TC(Bottom) = 100°C
IDM
PD @TA = 25°C
PD @TC(Bottom) = 25°C
Max.
84
59
336
4.2
63
0.028
± 20
69
93
See Fig. 14, 15, 22a, 22b
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
°C
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
1
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AUIRFN8401
Thermal Resistance
Symbol
RJC (Bottom)
RJC (Top)
RJA
RJA (<10s)
Parameter
Typ.
–––
–––
–––
–––
Junction-to-Case 
Junction-to-Case 
Junction-to-Ambient 
Junction-to-Ambient 
Max.
2.4
34
36
23
Units
°C/W
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
40
–––
–––
V VGS = 0V, ID = 250µA
–––
35
––– mV/°C Reference to 25°C, ID = 1.0mA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
3.6
4.6
RDS(on)
Static Drain-to-Source On-Resistance
m VGS = 10V, ID = 50A
VGS(th)
Gate Threshold Voltage
2.2
3.0
3.9
V VDS = VGS, ID = 50µA
–––
–––
1.0
VDS = 40V, VGS = 0V
Drain-to-Source Leakage Current
µA
IDSS
–––
–––
150
VDS = 40V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
VGS = 20V
nA
Gate-to-Source Reverse Leakage
–––
––– -100
VGS = -20V
RG
Internal Gate Resistance
–––
2.2
–––

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
144 ––– –––
S VDS = 10V, ID = 50A
Qg
Total Gate Charge
–––
44
66
ID = 50A
VDS = 20V
Qgs
Gate-to-Source Charge
–––
13
–––
nC
VGS = 10V
Qgd
Gate-to-Drain ("Miller") Charge
–––
15
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
29
–––
td(on)
Turn-On Delay Time
––– 6.1
–––
VDD = 20V
ID = 30A
tr
Rise Time
–––
13
–––
ns
td(off)
Turn-Off Delay Time
–––
22
–––
RG = 2.7
VGS = 10V 
Fall Time
–––
12
–––
tf
Ciss
Input Capacitance
––– 2170 –––
VGS = 0V
VDS = 25V
Coss
Output Capacitance
––– 340 –––
Crss
Reverse Transfer Capacitance
––– 220 –––
pF ƒ = 1.0 MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related)
––– 422 –––
VGS = 0V, VDS = 0V to 32V 
Coss eff. (TR) Effective Output Capacitance (Time Related)
––– 502 –––
VGS = 0V, VDS = 0V to 32V 
Diode Characteristics
Symbol
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode) 
VSD
Diode Forward Voltage
dv/dt
Peak Diode Recovery
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
2
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Min.
Typ.
Max. Units
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C, IS = 50A, VGS = 0V 
V/ns TJ = 175°C, IS= 50A, VDS = 40V
TJ = 25°C
VR = 34V,
ns
TJ = 125°C
IF = 50A
TJ = 25°C
nC
di/dt = 100A/µs
TJ = 125°C
A TJ = 25°C
–––
–––
84
–––
–––
336
–––
–––
–––
–––
–––
–––
–––
0.9
7.8
20
22
12
15
1.1
1.3
–––
–––
–––
–––
–––
–––
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1000
1000
100
BOTTOM
10
1
4.75V
100
BOTTOM
4.75V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
10
100
Fig. 2 Typical Output Characteristics
1000
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current(A)
1
VDS, Drain-to-Source Voltage (V)
Fig. 1 Typical Output Characteristics
100
TJ = 175°C
TJ = 25°C
10
VDS = 10V
60µs PULSE WIDTH
1.0
ID = 50A
VGS = 10V
1.6
1.2
0.8
0.4
2
4
6
8
10
12
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig. 4 Normalized On-Resistance vs. Temperature
Fig. 3 Typical Transfer Characteristics
100000
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
VGS
15V
10V
7.0V
6.0V
5.5V
5.25V
5.0V
4.75V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
7.0V
6.0V
5.5V
5.25V
5.0V
4.75V
10000
Ciss
Coss
Crss
1000
ID= 50A
12.0
VDS = 32V
VDS = 20V
10.0
8.0
6.0
4.0
2.0
0.0
100
0.1
1
10
100
0
10
20
30
40
50
60
VDS , Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRFN8401
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
100
TJ = 25°C
10
1
VGS = 0V
0.4
0.7
1.0
1.3
1.6
100µsec
100
10
1msec
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.1
0.1
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
0.1
1.9
VSD , Source-to-Drain Voltage (V)
75
50
25
0
75
100
125
150
175
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
ID, Drain Current (A)
100
50
Id = 1.0mA
49
47
45
43
41
39
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature
0.30
Energy (µJ)
0.25
0.20
0.15
0.10
0.05
0.00
5
10 15 20 25 30 35 40 45
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
Fig 10. Drain-to-Source Breakdown Voltage
RDS (on), Drain-to -Source On Resistance (m)
0.35
0
100
51
TC , Case Temperature (°C)
-5
10
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
25
1
VDS , Drain-to-Source Voltage (V)
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40
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
30
20
10
0
0
40
80
120
160
ID, Drain Current (A)
Fig 12. Typical On-Resistance vs. Drain Current
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Thermal Response ( Z thJC ) °C/W
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs. Pulse Width
80
70
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 50A
60
50
40
30
20
10
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
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PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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16
5.0
ID = 50A
VGS(th), Gate threshold Voltage (V)
RDS(on), Drain-to -Source On Resistance (m)
AUIRFN8401
12
8
TJ = 125°C
4
TJ = 25°C
0
4.0
3.0
ID = 50µA
ID = 250µA
ID = 1.0mA
2.0
ID = 1.0A
1.0
4
6
8
10
12
14
16
18
20
-75 -50 -25
25 50 75 100 125 150 175
TJ , Temperature ( °C )
VGS, Gate -to -Source Voltage (V)
Fig 17. Threshold Voltage vs. Temperature
Fig 16. Typical On-Resistance vs. Gate Voltage
7
100
6
IF = 30A
VR = 34V
5
TJ = 25°C
TJ = 125°C
80
QRR (nC)
IRRM (A)
0
4
3
IF = 30A
VR = 34V
TJ = 25°C
TJ = 125°C
60
40
2
20
1
0
0
100
200
300
400
500
600
700
100
200
diF /dt (A/µs)
400
500
600
700
diF /dt (A/µs)
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
80
6
5
IF = 50A
VR = 34V
4
TJ = 25°C
TJ = 125°C
70
60
QRR (nC)
IRRM (A)
300
3
50
IF = 50A
VR = 34V
TJ = 25°C
TJ = 125°C
40
30
2
20
1
10
0
0
100
200
300
400
500
600
700
diF /dt (A/µs)
Fig. 20 - Typical Recovery Current vs. dif/dt
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100
200
300
400
500
600
700
diF /dt (A/µs)
Fig. 21 - Typical Stored Charge vs. dif/dt
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Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 22a. Unclamped Inductive Test Circuit
Fig 23a. Switching Time Test Circuit
Fig 24a. Gate Charge Test Circuit
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Fig 22b. Unclamped Inductive Waveforms
Fig 23b. Switching Time Waveforms
Fig 24b. Gate Charge Waveform
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AUIRFN8401
PQFN 5x6 Outline "E" Package Details
For footprint and stencil design recommendations, please refer to application note AN-1136 at
http://www.irf.com/technical-info/appnotes/an-1136.pdf
For visual inspection recommendations, please refer to application note AN-1154 at
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 5x6 Outline "E" Part Marking
INTERNATIONAL
RECTIFIER LOGO
DATE CODE
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
PIN 1
IDENTIFIER
XXXX
XYWWX
XXXXX
PART NUMBER
(“4 or 5 digits”)
MARKING CODE
(Per Marking Spec)
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFN8401
PQFN 5x6 Outline "E" Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRFN8401
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of the
higher Automotive level.
PQFN 5mm x 6mm
Human Body Model
ESD
Charged Device Model
RoHS Compliant
MSL1
Class H1B (+/- 1000V)††
AEC-Q101-001
Class C5 (+/- 2000V)††
AEC-Q101-005
Yes
† Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
†† Highest passing voltage.
Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
 Starting TJ = 25°C, L =0.055mH, RG = 50, IAS = 50A.
 Pulse width  400µs; duty cycle 2%.
 R is measured at TJ of approximately 90°C.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
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AUIRFN8401
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve
the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products
and applications using IR components. To minimize the risks with customer products and applications, customers should
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For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
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Tel: (310) 252-7105
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