ON NVMFS5C456NLT3G Power mosfet Datasheet

NVMFS5C456NL
Power MOSFET
40 V, 3.7 mW, 87 A, Single N−Channel
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS5C456NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
3.7 mW @ 10 V
40 V
87 A
6.0 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
40
V
Gate−to−Source Voltage
VGS
±20
V
ID
87
A
Parameter
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
TC = 100°C
TC = 25°C
Pulsed Drain Current
PD
TC = 100°C
TA = 25°C
Power Dissipation
RqJA (Notes 1 & 2)
61
Steady
State
G (4)
W
55
S (1,2,3)
27
ID
TA = 100°C
TA = 25°C
A
22
PD
1.8
520
A
TJ, Tstg
−55 to
+ 175
°C
IS
61
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 5 A)
EAS
202
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Source Current (Body Diode)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
2.7
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
42
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2016
February, 2017 − Rev. 5
MARKING
DIAGRAM
W
3.6
IDM
Operating Junction and Storage Temperature
N−CHANNEL MOSFET
16
TA = 100°C
TA = 25°C, tp = 10 ms
D (5,6)
1
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 5C456L
XXXXXX = (NVMFS5C456NL) or
XXXXXX = 456LWF
XXXXXX = (NVMFS5C456NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Publication Order Number:
NVMFS5C456NL/D
NVMFS5C456NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
22
VGS = 0 V,
VDS = 40 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
2.0
−5.1
VGS = 4.5 V
ID = 20 A
4.8
6.0
VGS = 10 V
ID = 20 A
3.1
3.7
gFS
VDS =15 V, ID = 40 A
V
mV/°C
80
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
1600
VGS = 0 V, f = 1 MHz, VDS = 25 V
590
pF
21
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 20 V; ID = 40 A
Total Gate Charge
QG(TOT)
8.2
Threshold Gate Charge
QG(TH)
2
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
2.1
Plateau Voltage
VGP
3.2
td(ON)
9.3
VGS = 4.5 V, VDS = 20 V; ID = 40 A
18
nC
nC
3.8
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 20 V,
ID = 40 A, RG = 1 W
tf
100
ns
17
4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 40 A
TJ = 25°C
0.86
TJ = 125°C
0.75
tRR
ta
tb
1.2
V
29
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 40 A
QRR
14
ns
15
20
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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NVMFS5C456NL
TYPICAL CHARACTERISTICS
80
80
10 V to 3.6 V
ID, DRAIN CURRENT (A)
3.2 V
60
50
40
2.8 V
30
20
60
50
40
30
10
0
0
0.5
1.0
1.5
2.0
2.5
3.0
TJ = 125°C
0
1
TJ = −55°C
2
3
5
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
20
TJ = 25°C
ID = 20 A
18
16
14
12
10
8
6
4
2
2
TJ = 25°C
20
10
0
VDS = 10 V
70
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
70
3
4
5
6
7
9
8
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
8
TJ = 25°C
7
6
VGS = 4.5 V
5
4
VGS = 10 V
3
2
0
10
20
30
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
1.E+05
25
50
75
100
125
150
50
60
70
80
90 100
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.0
1.9
VGS = 10 V
ID = 20 A
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50 −25
0
40
ID, DRAIN CURRENT (A)
175
TJ = 175°C
1.E+04
TJ = 125°C
1.E+03
TJ = 85°C
1.E+02
1.E+01
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NVMFS5C456NL
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
10000
CISS
1000
COSS
100
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
0
5
CRSS
10
15
20
25
30
35
40
8
7
6
5
QGD
QGS
4
3
VDS = 20 V
ID = 40 A
TJ = 25°C
2
1
0
0
2
4
6
8
10
12
14
18
16
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
100
IS, SOURCE CURRENT (A)
VGS = 0 V
tr
100
t, TIME (ns)
QT
9
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
td(off)
tf
10
1
10
td(on)
VGS = 4.5 V
VDD = 20 V
ID = 40 A
1
10
10
1
0.1
0.01
0.001
100
TJ = 25°C
TJ = −55°C
TJ = 125°C
0.2
0
0.4
0.6
0.8
1.0
1.2
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
1000
500 ms
100
10 ms
10
TC = 25°C
VGS ≤ 10 V
Single Pulse
1
0.1
IPEAK, (A)
ID, DRAIN CURRENT (A)
1 ms
TJ (initial) = 100°C
RDS(on) Limit
Thermal Limit
Package Limit
0.1
TJ (initial) = 25°C
10
1
1
10
100
1E−4
1E−3
VDS (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
1E−2
NVMFS5C456NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
RqJA (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
Marking
Package
Shipping†
NVMFS5C456NLT1G
5C456L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS5C456NLWFT1G
456LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
NVMFS5C456NLT3G
5C456L
DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS5C456NLWFT3G
456LWF
DFN5
(Pb−Free, Wettable Flanks)
5000 / Tape & Reel
NVMFS5C456NLAFT1G
5C456L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS5C456NLWFAFT1G
456LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVMFS5C456NL
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
0.20 C
D
2
A
B
D1
2X
0.20 C
3
q
E
2
2
c
A1
4
TOP VIEW
C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.10 C
SIDE VIEW
8X b
C A B
0.05
c
SEATING
PLANE
DETAIL A
0.10 C
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
4X
E1
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
2X
DETAIL A
0.495
4.560
2X
1.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
e/2
e
L
1
3.200
4
4.530
K
PIN 5
(EXPOSED PAD)
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.30
5.15
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
E2
L1
M
1.330
2X
0.905
1
0.965
G
4X
D2
1.000
4X 0.750
BOTTOM VIEW
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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