HD74AC259 8-bit Addressable Latch REJ03D0264–0200Z (Previous ADE-205-385 (Z)) Rev.2.00 Jul.16.2004 Description The HD74AC259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable or storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device also incorporates an active LOW Common Clear for resetting all latches, as well as an active LOW Enable. Features • Serial-to-Parallel Conversion • Eight Bits of Storage with Output of Each Bit Available • Random (Addressable) Data Entry • Active High Demultiplexing or Decoding Capability • Easily Expandable • Common Clear • Outputs Source/Sink 24 mA • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC259FPEL SOP-16 pin (JEITA) FP-16DAV FP EL (2,000 pcs/reel) HD74AC259RPEL SOP-16 pin (JEDEC) FP-16DNV RP EL (2,500 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement A0 1 16 VCC A1 2 15 MR A2 3 14 E Q0 4 13 D Q1 5 12 Q7 Q2 6 11 Q6 Q3 7 10 Q5 GND 8 9 Q4 (Top view) Rev.2.00, Jul.16.2004, page 1 of 7 HD74AC259 Logic Symbol E D A0 A1 A2 MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Pin Names A0 – A2 D E MR Q0 – Q 7 Address Inputs Data Inputs Enable Input (Active LOW) Master Reset (Active LOW) Latch Outputs Rev.2.00, Jul.16.2004, page 2 of 7 HD74AC259 Logic Diagram Q7 Q6 Q5 MR Q4 A2 Q3 A1 A0 Q2 Q1 D E Q0 Rev.2.00, Jul.16.2004, page 3 of 7 HD74AC259 Function Table Inputs Outputs Operating Mode Master reset MR E L H D X A0 A1 A2 Q0 X X X L L L L L L L L Demultiplex (Active HIGH L L L L d d L H L L L L Q=d L L Q=d L L L L L L L L L L L L Decoder when D = H) L L L L d d L H H H L L L L L L Q=d L L Q=d L L L L L L L L L L L L d d L H L L H H L L L L L L L L Q=d L L Q=d L L L L L L L L d d L H H H H H L L L L L L L L L L L L Q=d L L Q=d H H H L X d X L X L X L q0 Q=d q1 q1 q2 q2 q3 q3 q4 q4 q5 q5 q6 q6 q7 q7 H H L L d d H L L H L L q0 q0 Q=d q1 q2 Q=d q3 q3 q4 q4 q5 q5 q6 q6 q7 q7 H H L L d d H L H L L H q0 q0 q1 q1 q2 q2 Q=d q3 q4 Q=d q5 q5 q6 q6 q7 q7 H H L L d d H L L H H H q0 q0 q1 q1 q2 q2 q3 q3 q4 q4 Q=d q5 q6 Q=d q7 q7 H L d H H H q0 q1 q2 q3 q4 q5 q6 Q=d Store (Do nothing) Addressable latch H L X d q : : : : : Q1 Q2 Q3 Q4 Q5 Q6 Q7 High Voltage Level Low Voltage Level Immaterial High or Low data one setup time prior to the Low-to-High Enable transition. Lower case letters indicate the state of the referenced output established during the last cycle in which it was addressed or cleared. Absolute Maximum Ratings Item Supply voltage DC input diode current Symbol Ratings Unit Condition VCC IIK –0.5 to 7 –20 V mA VI mA V VI = Vcc+0.5V DC input voltage 20 –0.5 to Vcc+0.5 DC output diode current IOK –50 50 mA mA VO = –0.5V VO = Vcc+0.5V DC output voltage DC output source or sink current VO IO –0.5 to Vcc+0.5 ±50 V mA DC VCC or ground current per output pin Storage temperature ICC, IGND Tstg ±50 –65 to +150 mA °C VI = –0.5V Recommended Operating Conditions Item Symbol Ratings Unit Supply voltage Input and output voltage VCC VI, VO 2 to 6 0 to VCC V V Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Ta tr, tf –40 to +85 8 °C ns/V Rev.2.00, Jul.16.2004, page 4 of 7 Condition VCC = 3.0V VCC = 4.5 V VCC = 5.5 V HD74AC259 DC Characteristics Item Input Voltage Symbol VIH VIL Output voltage VOH VOL Ta = 25°°C Vcc (V) 3.0 min. 2.1 typ. 1.5 max. — Ta = –40 to +85°°C min. max. 2.1 — 4.5 5.5 3.15 3.85 2.25 2.75 — — 3.15 3.85 — — 3.0 4.5 — — 1.50 2.25 0.9 1.35 — — 0.9 1.35 5.5 3.0 — 2.9 2.75 2.99 1.65 — — 2.9 1.65 — 4.5 5.5 4.4 5.4 4.49 5.49 — — 4.4 5.4 — — 3.0 4.5 2.58 3.94 — — — — 2.48 3.80 — — 5.5 3.0 4.94 — — 0.002 — 0.1 4.80 — — 0.1 4.5 5.5 — — 0.001 0.001 0.1 0.1 — — 0.1 0.1 3.0 4.5 — — — — 0.32 0.32 — — 0.37 0.37 Unit V Condition VOUT = 0.1 V or VCC –0.1 V VOUT = 0.1 V or VCC –0.1 V V VIN = VIL or VIH IOUT = –50 µA VIN = VIL or VIH IOH = –12 mA IOH = –24 mA IOH = –24 mA VIN = VIL or VIH IOUT = 50 µA VIN = VIL or VIH IOL = 12 mA IOL = 24 mA Input leakage current IIN 5.5 5.5 — — — — 0.32 ±0.1 — — 0.37 ±1.0 µA VIN = VCC or GND IOL = 24 mA Dynamic output current* IOLD IOHD 5.5 5.5 — — — — — — 86 –75 — — mA mA VOLD = 1.1 V VOHD = 3.85 V Quiescent supply current ICC 5.5 — — 8.0 — 80 µA VIN = VCC or ground *Maximum test duration 2.0 ms, one output loaded at a time. AC Characteristics Item Symbol VCC (V)*1 Ta = +25°C CL = 50 pF Min Typ Max Ta = –40°C to +85°C CL = 50 pF Min Max Unit Maximum clock frequency fmax 3.3 5.0 65 110 — — — — 60 95 — — MHz Propagation delay MR to Qn tPHL 3.3 5.0 1.0 1.0 8.5 6.5 14.5 9.0 1.0 1.0 16.5 10.5 ns Propagation delay Dn to Qn tPLH 3.3 5.0 1.0 1.0 7.0 5.5 10.5 7.5 1.0 1.0 12.0 8.5 ns Propagation delay Dn to Qn tPHL 3.3 5.0 1.0 1.0 7.0 5.5 10.5 7.5 1.0 1.0 12.0 8.5 ns Propagaion delay An to Qn tPLH 3.3 5.0 1.0 1.0 11.5 8.0 18.5 11.5 1.0 1.0 21.5 14.0 ns Propagation delay An to Qn tPHL 3.3 5.0 1.0 1.0 11.5 8.0 18.5 11.5 1.0 1.0 21.0 13.5 ns Propagation delay E to Q tPLH 3.3 5.0 1.0 1.0 9.0 6.5 15.0 9.0 1.0 1.0 17.0 10.5 ns Propagation delay E to Qn tPHL 3.3 5.0 1.0 1.0 9.0 6.5 14.0 8.5 1.0 1.0 16.0 10.0 ns Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Rev.2.00, Jul.16.2004, page 5 of 7 HD74AC259 AC Operating Requirements Ta = +25°C CL = 50 pF Item Setup time, HIGH or LOW Symbol VCC (V)*1 Typ tsu 3.3 1.0 D to E Hold time, HIGH or LOW th 5.0 3.3 D to E Setup time, HIGH or LOW Ta = –40°C to +85°C CL = 50 pF Guaranteed Minimum 3.5 3.5 ns Unit 0.0 0.5 3.0 2.0 3.0 2.0 ns 0.5 1.0 2.0 6.0 2.0 7.0 ns tsu 5.0 3.3 An to E Hold time, HIGH or LOW th 5.0 3.3 0.0 –3.0 4.5 0.0 5.0 0.0 ns An to E Pulse width tw 5.0 3.3 –1.0 3.0 0.0 5.5 0.0 7.0 ns 5.0 3.0 4.5 5.0 Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Rev.2.00, Jul.16.2004, page 6 of 7 Symbol CIN CPD Typ 4.5 35 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V HD74AC259 Package Dimensions As of January, 2003 Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.40 ± 0.06 0.20 7.80 +– 0.30 1.15 0 ˚ – 8˚ 0.10 ± 0.10 0.80 Max *0.20 ± 0.05 2.20 Max 5.5 16 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Ni/Pd/Au plating FP-16DAV — Conforms 0.24 g As of January, 2003 Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.40 ± 0.06 0.15 *0.20 ± 0.05 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0˚ – 8˚ + 0.67 0.60 – 0.20 0.25 M *Ni/Pd/Au plating Rev.2.00, Jul.16.2004, page 7 of 7 Package Code JEDEC JEITA Mass (reference value) FP-16DNV Conforms Conforms 0.15 g Sales Strategic Planning Div. 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