Vicor BCM6123XD1E2663YZZ Isolated fixed ratio dc-dc converter Datasheet

BCM® Bus Converter
BCM6123xD1E2663yzz
®
C
S
US
C
NRTL
US
Isolated Fixed Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 62.5A continuous secondary current
• Up to
2352W/in3
power density
• 97.4% peak efficiency
• 4242VDC isolation
• Parallel operation for multi-kW arrays
• OV, OC, UV, short circuit and thermal protection
• 6123 through-hole ChiP package
■■2.402” x 0.990” x 0.284”
(61.00mm x 25.14mm x 7.21mm)
• PMBusTM management interface *
Typical Applications
• 380VDC Power Distribution
• High End Computing Systems
• Automated Test Equipment
• Industrial Systems
• High Density Power Supplies
ISEC = up to 62.5A
VSEC = 24V (16.3 – 25.6V)
(no load)
K = 1/16
Product Description
The BCM6123xD1E2663yzz is a high efficiency Bus Converter
operating from a 260 to 410VDC primary bus to deliver an isolated,
ratiometric secondary voltage from 16.3 to 25.6VDC.
The BCM6123xD1E2663yzz offers low noise, fast transient
response, and industry leading efficiency and power density. In
addition, it provides an AC impedance beyond the bandwidth of
most downstream regulators, allowing input capacitance normally
located at the input of a POL regulator to be located at the primary
side of the BCM. With a primary to secondary K factor of 1/16, that
capacitance value can be reduced by a factor of 256x, resulting in
savings of board area, material and total system cost.
Leveraging the thermal and density benefits of Vicor’s ChiP
packaging technology, the BCM offers flexible thermal
management options with very low top and bottom side thermal
impedances. Thermally-adept ChiP-based power components
enable customers to achieve low cost power system solutions
with previously unattainable system size, weight and efficiency
attributes quickly and predictably.
• Communications Systems
• Transportation
*When used with D44TL1A0 and I13TL1A0 chipset
BCM® Bus Converter
Page 1 of 28
VPRI = 384V (260 – 410V)
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Typical Applications
BCM
TM
EN
enable/disable
switch
SW1
VAUX
F1
VPRI
+VPRI
+VSEC
–VPRI
–VSEC
CPRI
POL
GND
PRIMARY
SECONDARY
ISOLATION BOUNDARY
BCM6123xD1E2663y00 at point of load
BCM
SER-OUT
SER-OUT
EN
SER-IN
enable/disable
switch
SER-IN
FUSE
VPRI
C
+VPRI
+VSEC
–VPRI
–VSEC
POL
I_BCM_ELEC
PRIMARY
SOURCE_RTN
SECONDARY
Digital
Supervisor
ISOLATION BOUNDARY
Digital Isolator
D44TL1A0
I13TL1A0
NC
PRI_OUT_A
Host µC
SEC_IN_A
VDDB
SEC_IN_B
TXD
VDD
PRI_IN_C
SEC_OUT_C
RXD
PRI_COM
SEC_COM
SER-IN
t
+
PRI_OUT_B
–
V
EXT
SER-OUT
SGND
SGND
PMBus
PMBus
SGND
SGND
SGND
BCM6123xD1E2663y01 at point of load
BCM® Bus Converter
Page 2 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Typical Applications (Cont.)
3 phase AIM
+
BCM ChiP
+VPRI
+VSEC
TM/SER-OUT
EN
VAUX/SER-IN
L1
L2
L3
-
L
O
A
D
-VPRI
-VSEC
ISOLATION BOUNDARY
3 phase AC to point of load (3 phase AIM + BCM6123xD1E2663yzz)
BCM® Bus Converter
Page 3 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Pin Configuration
TOP VIEW
1
2
+VSEC
A
A’ +VSEC
-VSEC1
B
B’ -VSEC2
-VSEC1
C
C’ -VSEC2
+VSEC
D
D’ +VSEC
+VSEC
E
E’
+VSEC
-VSEC1
F
F’
-VSEC2
-VSEC1
G
G’ -VSEC2
+VSEC
H
H’ +VSEC
+VPRI
I
I’
TM/SER-OUT
+VPRI
J
J’
EN
+VPRI
K
K’ VAUX/SER-IN
+VPRI
L
L’
-VPRI
6123 ChiP Package
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
I1, J1, K1, L1
+VPRI
PRIMARY POWER
Positive primary transformer power terminal
L’2
-VPRI
PRIMARY POWER
RETURN
Negative primary transformer power terminal
A1, D1, E1, H1, A’2,
D’2, E’2, H’2
+VSEC
SECONDARY
POWER
Positive secondary transformer power terminal
B1, C1, F1, G1
B’2, C’2, F’2, G’2
-VSEC*
SECONDARY
POWER RETURN
Negative secondary transformer power terminal
Analog Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
TM
OUTPUT
J’2
EN
INPUT
K’2
VAUX
OUTPUT
Temperature Monitor; primary side referenced signals
Enables and disables power supply; primary side referenced signals
Auxiliary Voltage Source; primary side referenced signals
PMBus Control Signal Pins
Pin Number
Signal Name
Type
Function
I’2
SER-OUT
OUTPUT
J’2
EN
INPUT
Enables and disables power supply; Primary side referenced signals
K’2
SER-IN
INPUT
UART receive pin; Primary side referenced signals
UART transmit pin; Primary side referenced signals
*For proper operation an external low impedance connection must be made between listed -VSEC1 and -VSEC2 terminals.
BCM® Bus Converter
Page 4 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Part Ordering Information
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Max
Secondary
Voltage
Secondary
Output
Current
Temperature
Grade
Option
BCM
6123
x
D1
E
26
63
y
zz
00 = Analog Ctrl
Bus Converter
Module
61 = L
23 = W
T = TH
410V
260 – 410V
25.6V
No Load
62.5A
T = -40°C – 125°C
01 = PMBus Ctrl
M = -55°C – ­125°C
0R = Reversible Analog Ctrl
0P = Reversible PMBus Ctrl
All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10).
Standard Models
Product
Function
Package
Size
Package
Mounting
Max Primary
Input Voltage
Range
Identifier
Max
Secondary
Voltage
Secondary
Output
Current
Temperature
Grade
Option
BCM
6123
T
D1
E
26
63
M
00
BCM
6123
T
D1
E
26
63
T
00
BCM
6123
T
D1
E
26
63
M
01
BCM
6123
T
D1
E
26
63
T
01
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
+VPRI_DC to –VPRI_DC
Min
Max
Unit
-1
480
V
1
V/µs
30
V
4.6
V
5.5
V
4.6
V
VPRI_DC or VSEC_DC Slew Rate
(Operational)
+VSEC_DC to –VSEC_DC
-1
TM / SER-OUT to –VPRI_DC
EN to –VPRI_DC
-0.3
VAUX / SER-IN to –VPRI_DC
BCM® Bus Converter
Page 5 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
410
V
130
V
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction)
Primary Input Voltage Range
(Continuous)
VPRI µController
PRI to SEC Input Quiescent Current
260
VPRI_DC
VµC_ACTIVE
IPRI_Q
VPRI_DC voltage where µC is initialized,
(ie VAUX = Low, powertrain inactive)
Disabled, EN Low, VPRI_DC = 384V
2
TINTERNAL ≤ 100ºC
4
VPRI_DC = 384V, TINTERNAL = 25ºC
PRI to SEC No Load Power
Dissipation
PRI to SEC Inrush Current Peak
PPRI_NL
IPRI_INR_PK
13
6
VPRI_DC = 384V
27
21
VPRI_DC = 260V to 410V
29
4
TINTERNAL ≤ 100ºC
DC Primary Input Current
Transformation Ratio
Secondary Output Current
(Continuous)
Secondary Output Current (Pulsed)
PRI to SEC Efficiency (Ambient)
IPRI_IN_DC
K
ηAMB
A
At ISEC_OUT_DC = 62.5A, TINTERNAL ≤ 100ºC
4.0
Primary to secondary, K = VSEC_DC / VPRI_DC, at no load
1/16
2ms pulse, 25% duty cycle, ISEC_OUT_AVG ≤ 50% rated
ISEC_OUT_DC
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
96.4
VPRI_DC = 260V to 410V, ISEC_OUT_DC = 62.5A
95.5
VPRI_DC = 384V, ISEC_OUT_DC = 31.25A
96.5
97.3
96.3
96.7
62.5
A
75
A
97.2
%
ηHOT
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
PRI to SEC Efficiency
(Over Load Range)
η20%
12.5A < ISEC_OUT_DC < 62.5A
90
RSEC_COLD
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A, TINTERNAL = -55°C
3
5
7
RSEC_AMB
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A
5
7
9
RSEC_HOT
VPRI_DC = 384V, ISEC_OUT_DC = 62.5A, TINTERNAL = 100°C
6.5
8.5
10.5
Frequency of the output voltage ripple = 2x FSW
1.00
1.05
1.10
Switching Frequency
Secondary Output Voltage Ripple
FSW
VSEC_OUT_PP
CSEC_EXT = 0μF, ISEC_OUT_DC = 62.5A, VPRI_DC = 384V,
20MHz BW
Secondary Output Leads Inductance
(Parasitic)
Primary Input Series Inductance
(Internal)
BCM® Bus Converter
Page 6 of 28
%
%
150
TINTERNAL ≤ 100ºC
Primary Input Leads Inductance
(Parasitic)
A
V/V
PRI to SEC Efficiency (Hot)
PRI to SEC Output Resistance
W
10
ISEC_OUT_DC
ISEC_OUT_PULSE
20
VPRI_DC = 260V to 410V, TINTERNAL = 25ºC
VPRI_DC = 410V, CSEC_EXT = 1000μF, RLOAD_SEC = 20% of
full load current
mA
mΩ
MHz
mV
250
LPRI_IN_LEADS
Frequency 2.5MHz (double switching frequency),
simulated lead model
7
nH
LSEC_OUT_LEADS
Frequency 2.5MHz (double switching frequency),
simulated lead model
0.64
nH
Reduces the need for input decoupling inductance
in BCM arrays
0.56
µH
LIN_INT
Rev 1.1
07/2017
BCM6123xD1E2663yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont.
Effective Primary Capacitance
(Internal)
CPRI_INT
Effective value at 384VPRI_DC
0.37
µF
Effective Secondary Capacitance
(Internal)
CSEC_INT
Effective value at 24VSEC_DC
70
µF
Rated Secondary Output
Capacitance (External)
CSEC_OUT_EXT
Excessive capacitance may drive module into
short circuit protection
Rated Secondary Output
Capacitance (External),
Parallel Array Operation
CSEC_OUT_AEXT
CSEC_OUT_AEXT Max = N * 0.5 * CSEC_OUT_EXT MAX, where
N = the number of units in parallel
1000
µF
560
ms
Powertrain Protection PRIMARY to SECONDARY (Forward Direction)
Auto Restart Time
tAUTO_RESTART
Startup into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
490
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
420
435
450
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO-
410
425
440
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
10
V
Primary Overvoltage
Lockout Response Time
tPRI_OVLO
100
µs
Primary Soft-Start Time
tPRI_SOFT-START
1
ms
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Secondary Output Short Circuit
Protection Trip Threshold
ISEC_OUT_SCP
Secondary Output Short Circuit
Protection Response Time
tSEC_OUT_SCP
Overtemperature
Shutdown Threshold
BCM® Bus Converter
Page 7 of 28
tOTP+
From powertrain active. Fast current limit protection
disabled during soft-start
75
Effective internal RC filter
84
3
94
Rev 1.1
07/2017
125
A
ms
A
1
Temperature sensor located inside controller IC
110
µs
°C
BCM6123xD1E2663yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction)
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
420
435
450
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO-
410
425
440
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
10
V
Primary Overvoltage
Lockout Response Time
tPRI_OVLO
100
µs
Primary Undervoltage
Lockout Threshold
VPRI_UVLO-
200
225
250
V
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+
220
240
259
V
Primary Undervoltage
Lockout Hysteresis
VPRI_UVLO_HYST
15
V
tPRI_UVLO
100
µs
20
ms
Primary Undervoltage
Lockout Response Time
Primary Undervoltage Startup Delay
From VPRI_DC = VPRI_UVLO+ to powertrain active, EN
tPRI_UVLO+_DELAY floating (i.e., one time startup delay from application
of VPRI_DC to VSEC_DC)
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Overtemperature
Shutdown Threshold
tOTP+
Overtemperature
Recovery Threshold
tOTP–
Undertemperature
Shutdown Threshold
tUTP
Undertemperature Restart Time
BCM® Bus Converter
Page 8 of 28
tUTP_RESTART
83
Effective internal RC filter
Temperature sensor located inside controller IC
88
3
°C
110
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
Rev 1.1
07/2017
A
ms
125
105
Startup into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
93
3
115
°C
-45
°C
s
Secondary Ouput Current (A)
BCM6123xD1E2663yzz
80
60
40
20
0
20
40
60
80
100
120
140
Case Temperature (°C)
Top and leads at
temperature
Top only at temperature
Top, leads, & belly at
temperature
2500
Secondary Output Current (A)
Secondary Output Power (W)
Figure 1 — Specified thermal operating area
2250
2000
1750
1500
1250
1000
750
500
250
0
260
275
290
305
320
335
350
365
380
395
100
90
80
70
60
50
40
30
20
10
0
410
260
275
290
Primary Input Voltage (V)
PSEC_OUT_DC
305
PSEC_OUT_PULSE
ISEC_OUT_DC
Secondary Output Capacitance
(% Rated CSEC_EXT_MAX)
Figure 2 — Specified electrical operating area using rated RSEC_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
Secondary Output Current (% ISEC_OUT_DC)
Figure 3 — Specified primary startup into load current and external capacitance
BCM® Bus Converter
Page 9 of 28
320
335
350
365
380
Primary Input Voltage (V)
Rev 1.1
07/2017
100
ISEC_OUT_PULSE
395
410
BCM6123xD1E2663yzz
Analog Control Signal Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Temperature Monitor
• The TM pin is a standard analog I/O configured as an output from an internal µC.
• The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C.
• µC 250kHz PWM output internally pulled high to 3.3V.
SIGNAL TYPE
STATE
Startup
ATTRIBUTE
Powertrain Active
to TM Time
TM Duty Cycle
TM Current
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
100
tTM
18.18
TMPWM
ITM
UNIT
µs
68.18
%
4
mA
Recommended External filtering
DIGITAL
OUTPUT
Regular
Operation
TM Capacitance (External)
CTM_EXT
Recommended external filtering
0.01
µF
TM Resistance (External)
RTM_EXT
Recommended external filtering
1
kΩ
ATM
10
mV / °C
VTM_AMB
1.27
V
Specifications using recommended filter
TM Gain
TM Voltage Reference
TM Voltage Ripple
VTM_PP
RTM_EXT = 1kΩ, CTM_EXT = 0.01µF,
VPRI_DC = 384V, ISEC_DC = 62.5A
28
TINTERNAL ≤ 100ºC
mV
40
Enable / Disable Control
•
•
•
•
The EN pin is a standard analog I/O configured as an input to an internal µC.
It is internally pulled high to 3.3V.
When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
In an array of BCMs, EN pins should be interconnected to synchronize startup.
SIGNAL TYPE
STATE
Startup
ANALOG
INPUT
Regular
Operation
ATTRIBUTE
EN to Powertrain
Active Time
tEN_START
CONDITIONS / NOTES
MIN
VPRI_DC > VPRI_UVLO+, EN held low both
conditions satisfied for T > tPRI_UVLO+_DELAY
TYP
MAX
250
VEN_TH
EN Resistance (Internal)
REN_INT
Internal pull up resistor
VEN_DISABLE_TH
Rev 1.1
07/2017
UNIT
µs
2.3
EN Voltage Threshold
EN Disable Threshold
BCM® Bus Converter
Page 10 of 28
SYMBOL
V
1.5
kΩ
1
V
BCM6123xD1E2663yzz
Analog Control Signal Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Auxiliary Voltage Source
• The VAUX pin is a standard analog I/O configured as an output from an internal µC.
• VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ.
• VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating,
signaling the end of softstart.
• VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected.
SIGNAL TYPE
STATE
Startup
ANALOG
OUTPUT
Regular
Operation
Fault
BCM® Bus Converter
Page 11 of 28
ATTRIBUTE
SYMBOL
Powertrain Active
to VAUX Time
tVAUX
VAUX Voltage
VVAUX
VAUX Available Current
IVAUX
CONDITIONS / NOTES
MIN
TYP
2
Powertrain active to VAUX High
2.8
VAUX Voltage Ripple
VVAUX_PP
VAUX Capacitance
(External)
CVAUX_EXT
VAUX Resistance (External)
RVAUX_EXT
VAUX Fault Response Time
tVAUX_FR
MAX
ms
3.3
V
4
mA
50
TINTERNAL ≤ 100ºC
100
0.01
VPRI_DC < VµC_ACTIVE
From fault to VVAUX = 2.8V, CVAUX = 0pF
Rev 1.1
07/2017
1.5
UNIT
mV
µF
kΩ
10
µs
BCM6123xD1E2663yzz
PMBus™ Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
UART SER-IN / SER-OUT Pins
• Universal Asynchronous Receiver/Transmitter (UART) pins.
• The BCM communication version is not intended to be used without a Digital Supervisor.
• Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor.
Please see specific product data sheet for more details.
• UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V.
SIGNAL TYPE
STATE
GENERAL I/O
ATTRIBUTE
SYMBOL
Baud Rate
BRUART
CONDITIONS / NOTES
MIN
TYP
MAX
750
Rate
UNIT
Kbit/s
SER-IN Pin
SER-IN Input Voltage Range
VSER-IN_IH
2.3
V
VSER-IN_IL
DIGITAL
INPUT
Regular
Operation
V
SER-IN Rise Time
tSER-IN_RISE
10% to 90%
400
ns
SER-IN Fall Time
tSER-IN_FALL
10% to 90%
25
ns
SER-IN RPULLUP
RSER-IN_PLP
Pull up to 3.3V
1.5
kΩ
SER-IN External Capacitance
CSER-IN_EXT
400
pF
SER-OUT Pin
VSER-OUT_OH
0mA ≥ IOH ≥ -4mA
VSER-OUT_OL
0mA ≤ IOL ≤ 4mA
SER-OUT Rise Time
tSER-OUT_RISE
10% to 90%
55
ns
SER-OUT Fall Time
tSER-OUT_FALL
10% to 90%
45
ns
SER-OUT
Output Voltage Range
DIGITAL
OUTPUT
1
SER-OUT Source Current
ISER-OUT
SER-OUT Output Impedance
ZSER-OUT
2.8
V
0.5
VSER-OUT = 2.8V
6
V
mA
Ω
120
Enable / Disable Control
•
•
•
•
•
The EN pin is a standard analog I/O configured as an input to an internal µC.
It is internally pulled high to 3.3V.
When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
In an array of BCMs, EN pins should be interconnected to synchronize startup.
Enable / disable command will have no effect if the EN pin is disabled.
SIGNAL TYPE
ANALOG
INPUT
STATE
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
Startup
EN to Powertrain Active Time
tEN_START
VPRI_DC > VPRI_UVLO+,
EN held low both conditions satisfied
for t > tPRI_UVLO+_DELAY­­
EN Voltage Threshold
VENABLE
EN Resistance (Internal)
REN_INT
Regular
Operation
EN Disable Threshold
BCM® Bus Converter
Page 12 of 28
VEN_DISABLE_TH
Rev 1.1
07/2017
MIN
TYP
MAX
250
µs
2.3
Internal pull up resistor
UNIT
V
1.5
kΩ
1
V
BCM6123xD1E2663yzz
PMBus™ Reported Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Monitored Telemetry
• The BCM communication version is not intended to be used without a Digital Supervisor.
DIGITAL SUPERVISOR
PMBusTM READ COMMAND
ACCURACY
(RATED RANGE)
FUNCTIONAL
REPORTING RANGE
UPDATE
RATE
REPORTED UNITS
Input Voltage
(88h) READ_VIN
± 5% (LL - HL)
130V to 450V
100µs
VACTUAL = VREPORTED x 10-1
Input Current
(89h) READ_IIN
± 5% (10 - 133% of FL)
-5.9A to 5.9A
100µs
IACTUAL = IREPORTED x 10-3
Output Voltage [1]
(8Bh) READ_VOUT
± 5% (LL - HL)
8.0V to 28.0V
100µs
VACTUAL = VREPORTED x 10-1
Output Current
(8Ch) READ_IOUT
± 5% (10 - 133% of FL)
-87.5A to 87.5A
100µs
IACTUAL = IREPORTED x 10-2
Output Resistance
(D4h) READ_ROUT
± 5% (50 - 100% of FL)
0.5mΩ to 15mΩ
100ms
RACTUAL = RREPORTED x 10-5
(8Dh) READ_TEMPERATURE_1
± 7°C (Full Range)
-55ºC to 130ºC
100ms
TACTUAL = TREPORTED
ATTRIBUTE
Temperature [2]
[1]
[2]
Default READ Output Voltage returned when unit is disabled = -300V.
Default READ Temperature returned when unit is disabled = -273°C.
Variable Parameter
• Factory setting of all below Thresholds and Warning limits are 100% of listed protection values.
• Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO-.
• Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM.
ATTRIBUTE
DIGITAL SUPERVISOR
PMBusTM COMMAND [3]
CONDITIONS / NOTES
Input / Output Overvoltage
Protection Limit
(55h) VIN_OV_FAULT_LIMIT
VIN_OVLO- is automatically 3%
lower than this set point
Input / Output Overvoltage
Warning Limit
(57h) VIN_OV_WARN_LIMIT
Input / Output Undervoltage
Protection Limit
(D7h) DISABLE_FAULTS
Can only be disabled to a preset
default value
ACCURACY
(RATED RANGE)
FUNCTIONAL
REPORTING
RANGE
DEFAULT
VALUE
± 5% (LL - HL)
130V to 435V
100%
± 5% (LL - HL)
130V to 435V
100%
± 5% (LL - HL)
130V or 260V
100%
Input Overcurrent
Protection Limit
(5Bh) IIN_OC_FAULT_LIMIT
± 5% (10 - 133% of FL)
0 to 5.5A
100%
Input Overcurrent
Warning Limit
(5Dh) IIN_OC_WARN_LIMIT
± 5% (10 - 133% of FL)
0 to 5.5A
100%
Overtemperature
Protection Limit
(4Fh) OT_FAULT_LIMIT
± 7°C (Full Range)
0 to 125°C
100%
Overtemperature
Warning Limit
(51h) OT_WARN_LIMIT
± 7°C (Full Range)
0 to 125°C
100%
± 50µs
0 to 100ms
0ms
Turn On Delay
[3]
(60h) TON_DELAY
Additional time delay to the
undervoltage startup delay
Refer to Digital Supervisor datasheet for complete list of supported commands.
BCM® Bus Converter
Page 13 of 28
Rev 1.1
07/2017
BCM® Bus Converter
Page 14 of 28
Rev 1.1
07/2017
VAUX
TM
OUTPUT
OUTPUT
OUTPUT
EN
+VPRI
+VSEC
BIDIR
INPUT
VµC_ACTIVE
STARTUP
tVAUX
tPRI_UVLO+_DELAY
VPRI_UVLO+
VPRI_OVLO+
VNOM
OVERVOLTAGE
VPRI_UVLO-
VPRI_OVLO-
l
VO
O N L Pu
ER
UT
N A
V
P
R
N
O
UT
TU R
UT
T NTE
E YO N
P
U
Z
I
I
R O
P
IN
AL A IN U X
RY
TI ND URN
I
A
DC V A
O
_
IN C T
RI
IM
VP N &
µc SE
PR
E
p
l -u
A
LT
S
>
tPRI_UVLO+_DELAY
T
OR
H
S
GH
HI
T
PR
EN
EV
I
LT
VO
T F
PU F
IN N-O
Y R
A R TU
M
SHUTDOWN
T
UI
RC
I
C
tAUTO-RESTART
tSEC_OUT_SCP
RE
W
LO
D
D
LE LLE
L
U PU
P
P
IN
E
E
BL ABL
DC
I_
A
R
VP
EN EN
UT
RT
TA
ENABLE CONTROL
OVERCURRENT
GE
E
AG
BCM6123xD1E2663yzz
BCM Timing Diagram
BCM6123xD1E2663yzz
High Level Functional State Diagram
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
Application
of input voltage to VPRI_DC
VµC_ACTIVE < VPRI_DC < VPRI_UVLO+
STANDBY SEQUENCE
VPRI_DC > VPRI_UVLO+
STARTUP SEQUENCE
TM Low
TM Low
EN High
EN High
VAUX Low
VAUX Low
Powertrain Stopped
Powertrain Stopped
ENABLE falling edge,
or OTP detected
Fault
Autorecovery
FAULT
SEQUENCE
TM Low
EN High
VAUX Low
Input OVLO or UVLO,
Output OCP,
or UTP detected
ENABLE falling edge,
or OTP detected
Input OVLO or UVLO,
Output OCP,
or UTP detected
Powertrain Stopped
Short Circuit detected
BCM® Bus Converter
Page 15 of 28
tPRI_UVLO+_DELAY
expired
ONE TIME DELAY
INITIAL STARTUP
Rev 1.1
07/2017
SUSTAINED
OPERATION
TM PWM
EN High
VAUX High
Powertrain Active
BCM6123xD1E2663yzz
Application Characteristics
PRI to SEC, Full Load Efficiency (%)
PRI to SEC, Power Dissipation (W)
Temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
30
27
24
21
18
15
12
9
6
3
0
260
275
290
305
320
335
350
365
380
395
410
98.0
97.5
97.0
96.5
96.0
95.5
95.0
94.5
94.0
-60
-40
-20
Primary Input Voltage (V)
TCASE:
-55°C
25°C
80°C
VPRI_DC:
Figure 4 — No load power dissipation vs. VPRI_DC
PRI to SEC, Power Dissipation
PRI to SEC, Efficiency (%)
97
95
93
91
89
87
85
83
81
79
7
14
21
28
35
42
260V
49
56
63
384V
PRI to SEC, Power Dissipation
PRI to SEC, Efficiency (%)
93
91
89
87
85
83
81
21
28
35
42
49
56
63
Secondary Output Current (A)
VPRI_DC :
260V
Figure 8 — Efficiency at TCASE = 25°C
BCM® Bus Converter
Page 16 of 28
100
384V
410V
64
56
48
40
32
24
16
8
0
0
7
14
21
28
35
42
49
56
63
260V
384V
410V
Figure 7 — Power dissipation at TCASE = -55°C
95
14
80
Secondary Output Current (A)
97
7
260V
VPRI_DC :
99
0
60
72
410V
Figure 6 — Efficiency at TCASE = -55°C
79
40
80
Secondary Output Current (A)
VPRI_DC :
20
Figure 5 — Full load efficiency vs. temperature; VPRI_DC
99
0
0
Case Temperature (ºC)
384V
80
72
64
56
48
40
32
24
16
8
0
0
7
14
21
28
35
42
49
56
Secondary Output Current (A)
VPRI_DC :
410V
260V
384V
Figure 9 — Power dissipation at TCASE = 25°C
Rev 1.1
07/2017
410V
63
99
PRI to SEC, Power Dissipation
PRI to SEC, Efficiency (%)
BCM6123xD1E2663yzz
97
95
93
91
89
87
85
83
81
79
0
7
14
21
28
35
42
49
56
63
80
72
64
56
48
40
32
24
16
8
0
0
7
Secondary Output Current (A)
260V
384V
PRI to SEC, Output Resistance (mΩ)
9
8
7
6
5
4
3
2
1
-35
-15
5
25
45
65
85
105
Case Temperature (°C)
ISEC_DC:
260V
42
49
56
63
384V
410V
300
270
240
210
180
150
120
90
60
30
0
0
7
14
21
28
35
42
49
56
Secondary Output Current (A)
VPRI_DC:
62.5A
Figure 12 — RSEC vs. temperature; Nominal VPRI_DC
ISEC_DC = 62.5A at TCASE = 80°C
BCM® Bus Converter
Page 17 of 28
35
Figure 11 — Power dissipation at TCASE = 80°C
10
-55
28
Secondary Output Current (A)
Figure 10 — Efficiency at TCASE = 80°C
0
21
VPRI_DC:
410V
Secondary Output Voltage Ripple (mV)
VPRI_DC:
14
384V
Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; No external CSEC_OUT_EXT.
Board mounted module, scope setting:
20MHz analog BW
Rev 1.1
07/2017
63
BCM6123xD1E2663yzz
Figure 14 — Full load secondary voltage ripple, 10µF CPRI_IN_EXT;
No external CSEC_OUT_EXT. Board mounted module,
scope setting: 20MHz analog BW
Figure 15 — 0A– 62.5A transient response: CPRI_IN_EXT = 10µF,
no external CSEC_OUT_EXT
Figure 16 — 62.5A – 0A transient response: CPRI_IN_EXT = 10µF,
no external CSEC_OUT_EXT
Figure 17 — Startup from application of VPRI_DC = 384V,
20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
Figure 18 — Startup from application of EN with pre-applied
VPRI_DC = 384V, 20% ISEC_OUT_DC, 100% CSEC_OUT_EXT
BCM® Bus Converter
Page 18 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
General Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
60.87 / [2.396] 61.00 / [2.402] 61.13 / [2.407]
mm/[in]
Width
W
24.76 / [0.975] 25.14 / [0.990] 25.52 / [1.005]
mm/[in]
Height
H
7.11 / [0.280]
mm/[in]
Volume
Vol
Weight
W
Lead Finish
Without heatsink
7.21 / [0.284]
7.31 / [0.288]
cm3/[in3]
11.06 / [0.675]
41 / [1.45]
g/[oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
Gold
0.003
0.051
T-Grade
-40
125
°C
M-Grade
-55
125
°C
µm
Thermal
Operating Temperature
TINTERNAL
Thermal Resistance Top Side
θINT-TOP
Thermal Resistance Leads
Thermal Resistance Bottom Side
θINT-LEADS
θINT-BOTTOM
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
1.45
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal leads
1.77
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
1.67
°C/W
34
Ws/°C
Thermal Capacity
Assembly
Storage Temperature
ESD Withstand
BCM® Bus Converter
Page 19 of 28
T-Grade
-55
125
°C
M-Grade
-65
125
°C
ESDHBM
Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV)
ESDCDM
Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V)
Rev 1.1
07/2017
BCM6123xD1E2663yzz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
-55°C ≤ TINTERNAL ≤ 125°C (M-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
135
°C
Soldering [1]
Peak Temperature Top Case
Safety
Isolation Voltage / Dielectric Test
VHIPOT
PRIMARY to SECONDARY
4242
PRIMARY to CASE
2121
SECONDARY to CASE
2121
Isolation Capacitance
CPRI_SEC
Unpowered Unit
620
Insulation Resistance
RPRI_SEC
At 500VDC
10
MTBF
VDC
780
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
2.31
MHrs
Telcordia Issue 2 - Method I Case III; 25°C
Ground Benign, Controlled
3.41
MHrs
UL 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
[1]
Product is not intended for reflow solder attach.
BCM® Bus Converter
Page 20 of 28
pF
MΩ
cTUVus EN 60950-1
Agency Approvals / Standards
940
Rev 1.1
07/2017
BCM6123xD1E2663yzz
PMBus™ System Diagram
-OUT
BCM
PRI-COM
VDDB
RXD3
VDD
RXD1
TXD4
VDD
TXD3
10 kΩ
Digital
Supervisor
D44TL1A0
FDG6318P
R2
10 kΩ
NC
NC
NC
SSTOP
3 kΩ
SDA
NC
RXD4
RXD2
SEC-COM
SDA
NC
SCL
RXD1
5V EXT
3 kΩ
EN Control
3.3V, at least 20mA
when using 4xDISO
Ref to Digital Isolator
datasheet for more details
VDD
CP
D
Q
SGND
D
Flip-flop
74LVC1G74DC
NC
SEC-OUT-C
SADDR
PRI-IN-C
NC
-IN BCM
SEC-IN-B
PRI-OUT-B
TX D 1 ’
NC
SER-OUT
SEC-IN-A
PRI-OUT-A
TXD1
SER-IN
TXD2
BCM EN
NC
Digital Isolator
I13TL1A0
SGND
SCL
VCC
SD
RD
Q
SDA
SCL
Host
µc
PMBus
R1
SGND
The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning
limits adjustment, in addition to corresponding status flags.
The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital
Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power
consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to
the output with minimal to no signal distortion.
The Digital Supervisor provides the host system µC with access to an array of up to 4 BCMs. This array is constantly polled for status
by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page (0x00)
prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to the
array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface.
The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital
Supervisor follows the PMBus command structure and specification.
Please refer to the Digital Supervisor data sheet for more details.
BCM® Bus Converter
Page 21 of 28
Rev 1.1
07/2017
BCM6123xD1E2663yzz
BCM in a ChiP
RSEC
0.124nH
LPRI_IN_LEADS = 7nH
+
CPRI_INT_ESR
21.5mΩ
CPRI_INT C
IN
0.37µF
VVPRIIN
–
R7mΩ
OUT
I ISEC
OUT
RCIN
+
IPRI_Q
IQ
34mA
+
–
RCCSEC_INT_ESR
OUT
122mΩ
V•I
1/16 • ISEC
LSEC_OUT_LEADS = 0.64nH
+
130µΩ
1/16 • VPRI
CSEC_INT
COUT
70µF
–
VSEC
VOUT
K
LPRI_INT = 0.56µH
–
Figure 19 — BCM AC model
The BCM uses a high frequency resonant tank to move energy
from primary to secondary and vice versa. The resonant LC tank,
operated at high frequency, is amplitude modulated as a function
of the primary voltage and the secondary current. A small amount
of capacitance embedded in the primary and secondary stages of
the module is sufficient for full functionality and is key to achieving
high power density.
The effective DC voltage transformer action provides additional
interesting attributes. Assuming that RSEC = 0Ω and IPRI_Q = 0A,
Eq. (3) now becomes Eq. (1) and is essentially load independent,
resistor R is now placed in series with VPRI.
R
R
The BCM6123xD1E2663yzz can be simplified into the model
shown in Figure 19.
Vin
V
PRI
At no load:
VSEC = VPRI • K
VSEC
The relationship between VPRI and VSEC becomes:
VSEC = (VPRI – IPRI • R) • K
In the presence of a load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
IPRI – IPRI_Q
K
(3)
VSEC = VPRI • K – ISEC • R • K2
(4)
RSEC represents the impedance of the BCM, and is a function of the
RDS_ON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IPRI_Q represents the quiescent
current of the BCM controller, gate drive circuitry, and core losses.
BCM® Bus Converter
Page 22 of 28
(5)
Substituting the simplified version of Eq. (4)
(IPRI_Q is assumed = 0A) into Eq. (5) yields:
and ISEC is represented by:
ISEC =
V
Vout
SEC
Figure 20 — K = 1/16 BCM with series primary resistor
(2)
VPRI
BCM
SAC
1/16
KK == 1/32
(1)
K represents the “turns ratio” of the BCM.
Rearranging Eq (1):
K=
+
–
(6)
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the BCM. However, in this case a real
resistor, R, on the primary side of the BCM is effectively scaled by
K 2 with respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 3.91mΩ, with K = 1/16.
Rev 1.1
07/2017
BCM6123xD1E2663yzz
A similar exercise can be performed with the additon of a capacitor
or shunt impedance at the primary of the BCM. A switch in series
with VPRI is added to the circuit. This is depicted in Figure 21.
S
VVin
PRI
+
–
BCM
SAC
K = 1/16
K = 1/32
C
VVout
SEC
A solution for keeping the impedance of the BCM low involves
switching at a high frequency. This enables the use of small
magnetic components because magnetizing currents remain low.
Small magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
Figure 21 — BCM with primary capacitor
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
IC (t) = C
dVPRI
The two main terms of power loss in the BCM are:
nn
No load power dissipation (PPRI_NL): defined as the power used to
power up the module with an enabled powertrainat no load.
(7)
dt
Low impedance is a key requirement for powering a highcurrent, low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a BCM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, these benefits are
not achieved if the series impedance of the BCM is too high. The
impedance of the BCM must be low, i.e., well beyond the crossover
frequency of the system.
nn
Resistive loss (PRSEC): refers to the power loss across the BCM
modeled as pure resistive impedance.
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
BCM. In this case,
(8)
IC = ISEC • K
Therefore,
PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PRSEC (11)
substituting Eq. (1) and (8) into Eq. (7) reveals:
ISEC(t) =
C
K2
•
dVSEC
dt
(9)
The above relations can be combined to calculate the overall
module efficiency:
The equation in terms of the secondary has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
η=
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With a
K= 1/16 as shown in Figure 21, C = 1µF would appear as
C = 256µF when viewed from the secondary.
=
PSEC_OUT
PPRI_IN
Rev 1.1
07/2017
=
PPRI_IN – PPRI_NL – PRSEC
PPRI_IN
VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC
= 1–
BCM® Bus Converter
Page 23 of 28
(10)
PDISSIPATED = PPRI_NL + PRSEC
VPRI • IPRI
(
)
PPRI_NL + (ISEC)2 • RSEC
VPRI • IPRI
(12)
BCM6123xD1E2663yzz
Input and Output Filter Design
Thermal Considerations
A major advantage of BCM systems versus conventional PWM
converters is that the transformer based BCM does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
The ChiP module provides a high degree of flexibility in that it
presents three pathways to remove heat from the internal power
dissipating components. Heat may be removed from the top
surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component in determining
the maximum current that is available from a ChiP, as can be
seen from Figure 1.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
nn
Guarantee low source impedance:
To take full advantage of the BCM’s dynamic response, the
impedance presented to its primary terminals must be low from
DC to approximately 5MHz. The connection of the bus converter
module to its power source should be implemented with
minimal distribution inductance. If the interconnect inductance
exceeds 100nH, the primary should be bypassed with a RC
damper to retain low source impedance and stable operation.
With an interconnect inductance of 200nH, the RC damper may
be as high as 1µF in series with 0.3Ω. A single electrolytic or
equivalent low-Q capacitor may be used in place of the
series RC bypass.
Since the ChiP has a maximum internal temperature rating, it
is necessary to estimate this internal temperature based on a
system‑level thermal solution. Given that there are three pathways
to remove heat from the ChiP, it is helpful to simplify the thermal
solution into a roughly equivalent circuit where power dissipation
is modeled as a current source, isothermal surface temperatures
are represented as voltage sources and the thermal resistances are
represented as resistors. Figure 22 shows the “thermal circuit” for a
6123 ChiP BCM in an application where the top, bottom, and leads
are cooled. In this case, the BCM power dissipation is PDTOTAL and
the three surface temperatures are represented as TCASE_TOP, TCASE_
BOTTOM, and TLEADS. This thermal system can now be very easily
analyzed using a SPICE simulator with simple resistors, voltage
sources, and a current source. The results of the simulation provide
an estimate of heat flow through the various dissipation pathways
as well as internal temperature.
nn
Further reduce primary and/or secondary voltage ripple
without sacrificing dynamic response:
Thermal Resistance Top
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
nn
Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and the power MOSFETs must withstand it.
Total load capacitance at the secondary of the BCM shall not
exceed the specified maximum. Owing to the wide bandwidth and
low secondary impedance of the module, low-frequency bypass
capacitance and significant energy storage may be more densely
and efficiently provided by adding capacitance at the primary of
the module. At frequencies <500kHz the module appears as an
impedance of RSEC between the source and load.
Within this frequency range, capacitance at the primary appears
as effective capacitance on the secondary per the relationship
defined in Eq. (13).
CSEC_EXT =
CPRI_EXT
K2
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
Power Dissipation (W)
TCASE_BOTTOM(°C)
θINT-LEADS
+
–
TLEADS(°C)
+
–
+
–
Figure 22 — Top case, Bottom case and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD2+ PD3
Where TINT represents the internal temperature and PD1, PD2, and
PD3 represent the heat flow through the top side, bottom side, and
leads, respectively.
Thermal Resistance Top
(13)
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
This enables a reduction in the size and number of capacitors used
in a typical system.
θINT-BOTTOM
Power Dissipation (W)
TCASE_BOTTOM(°C)
Thermal Resistance Leads
θINT-LEADS
TLEADS(°C)
Figure 23 — Top case and leads thermal model
BCM® Bus Converter
Page 24 of 28
TCASE_TOP(°C)
Rev 1.1
07/2017
+
–
TCASE_TOP(°C)
+
–
BCM6123xD1E2663yzz
Figure 23 shows a scenario where there is no bottom side cooling.
In this case, the heat flow path to the bottom is left open and the
equations now simplify to:
VPRI
TINT – PD1 • θINT-TOP = TCASE_TOP
ZPRI_EQ1
BCM®1
ZSEC_EQ1
R0_1
TINT – PD3 • θINT-LEADS = TLEADS
PDTOTAL = PD1+ PD3
ZPRI_EQ2
BCM®2
VSEC
ZSEC_EQ2
R0_2
+ DC
Thermal Resistance Top
Load
MAX INTERNAL TEMP
θINT-TOP
Thermal Resistance Bottom
Thermal Resistance Leads
θINT-BOTTOM
Power Dissipation (W)
TCASE_BOTTOM(°C)
θINT-LEADS
TLEADS(°C)
TCASE_TOP(°C)
ZPRI_EQn
+
–
ZSEC_EQn
R0_n
Figure 24 — Top case thermal model
Figure 25 — BCM array
Figure 24 shows a scenario where there is no bottom side and
leads cooling. In this case, the heat flow paths to the bottom and
leads are left open and the equations now simplify to:
Fuse Selection
In order to provide flexibility in configuring power systems, ChiP
modules are not internally fused. Input line fusing of ChiP products
is recommended at the system level to provide thermal protection
in case of catastrophic failure.
TINT – PD1 • θINT-TOP = TCASE_TOP
PDTOTAL = PD1
The fuse shall be selected by closely matching system requirements
with the following characteristics:
Please note that Vicor has a suite of online tools, including a
simulator and thermal estimator that greatly simplify the task of
determining whether or not a BCM thermal configuration is valid
for a given condition. These tools can be found at:
http://www.vicorpower.com/powerbench.
nn
Current rating
(usually greater than maximum current of BCM)
nn
Maximum voltage rating
(usually greater than the maximum possible input voltage)
Current Sharing
nn
Ambient temperature
nn
Nominal melting I2t
The performance of the BCM topology is based on efficient
transfer of energy through a transformer without the need of
closed loop control. For this reason, the transfer characteristic
can be approximated by an ideal transformer with a positive
temperature coefficient series resistance.
nn
Recommend fuse: ≤ 5A Bussmann PC-Tron (primary side)
This type of characteristic is close to the impedance characteristic
of a DC power distribution system both in dynamic (AC) behavior
and for steady state (DC) operation.
When multiple BCMs of a given part number are connected in an
array, they will inherently share the load current according to the
equivalent impedance divider that the system implements from the
power source to the point of load. Ensuring equal current sharing
among modules requires that BCM array impedances be matched.
Some general recommendations to achieve matched array
impedances include:
nn
Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
nn
Provide as symmetric a PCB layout as possible among modules
nn
A dedicated input filter for each BCM in an array is required to
prevent circulating currents.
For further details see:
AN:016 Using BCM Bus Converters in High Power Arrays.
BCM® Bus Converter
Page 25 of 28
BCM®n
Rev 1.1
07/2017
BCM6123xD1E2663yzz
BCM Through Hole Package Mechanical Drawing and Recommended Land Pattern
12.57
.495
11.81
.465
0
2.03
.080
(9) PL.
0
2.03
.080
(9) PL.
11.43
.450
11.81
.465
25.14±.38
.990±.015
27.21
1.071
(2) PL.
21.94
.864
(2) PL.
17.09
.673
(2) PL.
30.50
1.201
12.52
.493
(2) PL.
7.94
.312
(2) PL.
0
1.49
.058
(2) PL.
0
61.00±.13
2.402±.005
1.02
.040
(3) PL.
1.02
.040
(3) PL.
0
0
3.37
.132
(2) PL.
6.76
.266
(2) PL.
18.05
.710
(2) PL.
20.84
.820
(2) PL.
27.55
1.085
(2) PL.
0
0
23.64
.931
(2) PL.
TOP VIEW (COMPONENT SIDE)
BOTTOM VIEW
.05 [.002]
NOTES:
.41
.016
(24) PL.
0
11.81±.08
.465±.003
4.17
.164
(24) PL.
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : MM / [INCH]
+VSEC
21.94±.08
.864±.003
(2) PL.
12.52±.08
.493±.003
(2) PL.
6.76±.08
.266±.003
(2) PL.
2.54±.08
.100±.003
PLATED THRU
.38 [.015]
ANNULAR RING
(18) PL.
20.84±.08
.820±.003
(2) PL.
27.55±.08
1.085±.003
(2) PL.
0
-VSEC1
-VSEC2
-VSEC1
-VSEC2
+VSEC
+VSEC
+VSEC
+VSEC
-VSEC1
-VSEC2
-VSEC1
-VSEC2
+VSEC
17.09±.08
.673±.003
(2) PL.
7.94±.08
.312±.003
(2) PL.
0
+VSEC
+VPRI
TM/SER-OUT
+VPRI
+VPRI
EN
VAUX/SER-IN
+VPRI
-VPRI
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
BCM® Bus Converter
Page 26 of 28
27.21±.08
1.071±.003
(2) PL.
+VSEC
0
3.37±.08
.132±.003
(2) PL.
11.81±.08
.465±.003
SEATING
PLANE
7.21±.10
.284±.004
Rev 1.1
07/2017
1.49±.08
.058±.003
(2) PL.
1.52±.08
.060±.003
PLATED THRU
.25 [.010]
ANNULAR RING
(6) PL.
18.05±.08
.710±.003
(2) PL.
23.64±.08
.931±.003
(2) PL.
BCM6123xD1E2663yzz
Revision History
Revision
Date
1.0
02/01/17
Initial Release
1.1
07/28/17
Updated height specification
BCM® Bus Converter
Page 27 of 28
Description
Page Number(s)
n/a
Rev 1.1
07/2017
1, 19, 26
BCM6123xD1E2663yzz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
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mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
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All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
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The products described on this data sheet are protected by the following U.S. Patents Numbers:
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email
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BCM® Bus Converter
Page 28 of 28
Rev 1.1
07/2017