Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 LM4132, LM4132-Q1 SOT-23 Precision Low Dropout Voltage Reference 1 Features 3 Description • • The LM4132 family of precision voltage references performs comparable to the best laser-trimmed bipolar references, but in cost-effective CMOS technology. The key to this breakthrough is the use of EEPROM registers for correction of curvature, temperature coefficient (tempco), and accuracy on a CMOS band-gap architecture allowing package-level programming to overcome assembly shift. The shifts in voltage accuracy and tempco during assembly of die into plastic packages limit the accuracy of references trimmed with laser techniques. 1 • • • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40ºC to +125ºC Ambient Operating Temperature Range – Device HBM ESD Classification Level 2 Output Initial Voltage Accuracy: 0.05% Low Temperature Coefficient: 10 ppm/°C Low Supply Current: 60 µA Enable Pin Allowing a 3-µA Shutdown Mode 20-mA Output Current Voltage Options: 1.8 V, 2.048 V, 2.5 V, 3 V, 3.3 V, 4.096 V Custom Voltage Options Available (1.8 V to 4.096 V) VIN Range of VREF + 400 mV to 5.5 V at 10 mA Stable With Low-ESR Ceramic Capacitors Unlike other LDO references, the LM4132 can deliver up to 20 mA and does not require an output capacitor or buffer amplifier. These advantages along with the SOT-23 packaging are important for space-critical applications. Series references provide lower power consumption than shunt references, because they do not have to idle the maximum possible load current under no-load conditions. This advantage, the low quiescent current (60 µA), and the low dropout voltage (400 mV) make the LM4132 ideal for battery-powered solutions. 2 Applications • • • • • • • • • • • The LM4132 is available in five grades (A, B, C, D and E) for greater flexibility. The best grade devices (A) have an initial accuracy of 0.05% with a specified temperature coefficient of 10 ppm/°C or less, while the lowest grade devices (E) have an initial accuracy of 0.5% and a tempco of 30 ppm/°C. Instrumentation and Process Control Test Equipment Data Acquisition Systems Base Stations Servo Systems Portable, Battery-Powered Equipment Automotive and Industrial Precision Regulators Battery Chargers Communications Medical Equipment Device Information(1) PART NUMBER LM4132, LM4132-Q1 PACKAGE SOT-23 (5) BODY SIZE (NOM) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic Input 5V VIN CIN* LM4132 Enable Output 2.5V VREF * COUT EN GND *The capacitor CIN is required and the capacitor COUT is optional. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 6.1 6.2 6.3 6.4 6.5 Absolute Maximum Ratings ...................................... 3 ESD Ratings.............................................................. 4 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 4 Electrical Characteristics LM4132-1.8 (VOUT = 1.8 V) ............................................................ 5 6.6 Electrical Characteristics LM4132-2 (VOUT = 2.048 V) ........................................................ 6 6.7 Electrical Characteristics LM4132-2.5 (VOUT = 2.5 V) ............................................................ 7 6.8 Electrical Characteristics LM4132-3 (VOUT = 3 V) .... 8 6.9 Electrical Characteristics LM4132-3.3 (VOUT = 3.3 V) ............................................................ 9 6.10 Electrical Characteristics LM4132-3.3Q1(VOUT = 3.3 V) ..................................................... 10 6.11 Electrical Characteristics LM4132-4.1 (VOUT = 4.096 V) ...................................................... 11 6.12 Typical Characteristics .......................................... 12 7 Detailed Description ............................................ 20 7.1 7.2 7.3 7.4 8 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 20 20 20 21 Applications and Implementation ...................... 22 8.1 Application Information............................................ 22 8.2 Typical Applications ................................................ 22 9 Power Supply Recommendations...................... 25 10 Layout................................................................... 26 10.1 Layout Guidelines ................................................. 26 10.2 Layout Example .................................................... 26 11 Device and Documentation Support ................. 27 11.1 11.2 11.3 11.4 11.5 11.6 11.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 27 27 27 27 27 27 27 12 Mechanical, Packaging, and Orderable Information ........................................................... 27 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (March 2016) to Revision G Page • Updated data sheet text to the latest TI documentation and translations standards ............................................................. 1 • Added LM4132-3.3-Q1 to maximum load current in Recommended Operating Conditions ................................................. 4 • Added Electrical Characteristics LM4132-3.3-Q1 table........................................................................................................ 10 Changes from Revision E (January 2016) to Revision F • Page Added correct Layout Example ............................................................................................................................................ 26 Changes from Revision D (March 2015) to Revision E • Page Added Device Information, ESD Ratings and Thermal Information tables, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ..... 1 Changes from Revision C (April 2013) to Revision D • Page Added some of the latest inclusions from new TI formatting and made available of the automotive grade for the SOT-23 package..................................................................................................................................................................... 1 Changes from Revision B (August 2005) to Revision C • 2 Page Changed layout of National Data Sheet to TI format ........................................................................................................... 25 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View N/C 1 5 VREF GND 2 EN 3 4 VIN Pin Functions PIN NO. NAME I/O (1) DESCRIPTION 1 N/C — No connect pin, leave floating 2 GND G Ground 3 EN I Enable pin 4 VIN P Input supply 5 VREF P Reference output (1) G: Ground; I: Input; P: Power 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT –0.3 6 V Power dissipation (TA = 25°C) (3) 350 mW Lead temperature (soldering, 10 sec) 260 °C Vapor phase (60 sec) 215 °C 220 °C 150 °C Maximum voltage on any input Voltage Output short-circuit duration Indefinite Infrared (15 sec) −65 Storage temperature, Tstg (1) (2) (3) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and specifications. Without PCB copper enhancements. The maximum power dissipation must be de-rated at elevated temperatures and is limited by TJMAX (maximum junction temperature), RθJA (junction to ambient thermal resistance) and TA (ambient temperature). The maximum power dissipation at any temperature is: PDissMAX = (TJMAX – TA) / RθJA up to the value listed in theAbsolute Maximum Ratings. RθJA for SOT-23 is 164.1°C/W, TJMAX = 125°C. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 3 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.2 ESD Ratings Electrostatic discharge (1) V(ESD) (1) (2) VALUE UNIT ±2000 V Human-body model (HBM), per AEC Q100-002 (2) The Human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions MIN NOM MAX UNIT Maximum input supply voltage 5.5 Maximum enable input voltage VIN V LM4132 20 mA LM4132-3.3-Q1 25 mA 125 °C Maximum load current Junction temperature, TJ –40 V 6.4 Thermal Information LM4132, LM4132-Q1 THERMAL METRIC (1) DBV (SOT-23) UNIT 5 PINS RθJA Junction-to-ambient thermal resistance 164.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 115.3 °C/W RθJB Junction-to-board thermal resistance 27.1 °C/W ψJT Junction-to-top characterization parameter 12.8 °C/W ψJB Junction-to-board characterization parameter 26.6 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.5 Electrical Characteristics LM4132-1.8 (VOUT = 1.8 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER VREF Output voltage initial accuracy TEST CONDITIONS Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-1.8 (B Grade - 0.1%) –0.1% 0.1% LM4132C-1.8 (C Grade - 0.2%) –0.2% 0.2% LM4132D-1.8 (D Grade - 0.4%) –0.4% 0.4% LM4132E-1.8 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-1.8 20 LM4132C-1.8 20 LM4132D-1.8 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 3 –40°C ≤ TJ ≤ 125°C Load regulation 30 0 mA ≤ ILOAD ≤ 20 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) ISC µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V VN µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-1.8 ΔVREF/ΔILOAD MAX (1) LM4132A-1.8 LM4132A-1.8 TCVREF/°C MIN (1) TYP (2) ppm/mA ppm 230 –40°C ≤ TJ ≤ 125°C mV 400 170 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 5 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.6 Electrical Characteristics LM4132-2 (VOUT = 2.048 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER Output voltage initial accuracy VREF Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-2.0 (B Grade - 0.1%) –0.1% 0.1% LM4132C-2.0 (C Grade - 0.2%) –0.2% 0.2% LM4132D-2.0 (D Grade - 0.4%) –0.4% 0.4% LM4132E-2.0 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-2.0 20 LM4132C-2.0 20 LM4132D-2.0 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 30 0 mA ≤ ILOAD ≤ 20 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) ISC µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V VN 6 3 –40°C ≤ TJ ≤ 125°C Load regulation µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-2.0 ΔVREF/ΔILOAD MAX (1) LM4132A-2.0 LM4132A-2.0 TCVREF/°C MIN (1) TYP (2) TEST CONDITIONS ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 190 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.7 Electrical Characteristics LM4132-2.5 (VOUT = 2.5 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER VREF Output voltage initial accuracy TEST CONDITIONS Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-2.5 (B Grade - 0.1%) –0.1% 0.1% LM4132C-2.5 (C Grade - 0.2%) –0.2% 0.2% LM4132D-2.5 (D Grade - 0.4%) –0.4% 0.4% LM4132E-2.5 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-2.5 20 LM4132C-2.5 20 LM4132D-2.5 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 3 –40°C ≤ TJ ≤ 125°C Load regulation 50 0 mA ≤ ILOAD ≤ 20 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) ISC µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V VN µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-2.5 ΔVREF/ΔILOAD MAX (1) LM4132A-2.5 LM4132A-2.5 TCVREF/°C MIN (1) TYP (2) ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 240 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 7 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.8 Electrical Characteristics LM4132-3 (VOUT = 3 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER Output voltage initial accuracy VREF Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-3.0 (B Grade - 0.1%) –0.1% 0.1% LM4132C-3.0 (C Grade - 0.2%) –0.2% 0.2% LM4132D-3.0 (D Grade - 0.4%) –0.4% 0.4% LM4132E-3.0 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-3.0 20 LM4132C-3.0 20 LM4132D-3.0 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 70 0 mA ≤ ILOAD ≤ 20 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) ISC µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V VN 8 3 –40°C ≤ TJ ≤ 125°C Load regulation µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-3.0 ΔVREF/ΔILOAD MAX (1) LM4132A-3.0 LM4132A-3.0 TCVREF/°C MIN (1) TYP (2) TEST CONDITIONS ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 285 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.9 Electrical Characteristics LM4132-3.3 (VOUT = 3.3 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER VREF Output voltage initial accuracy TEST CONDITIONS Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-3.3 (B Grade - 0.1%) –0.1% 0.1% LM4132C-3.3 (C Grade - 0.2%) –0.2% 0.2% LM4132D-3.3 (D Grade - 0.4%) –0.4% 0.4% LM4132E-3.3 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-3.3 20 LM4132C-3.3 20 LM4132D-3.3 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 3 –40°C ≤ TJ ≤ 125°C Load Regulation 85 0 mA ≤ ILOAD ≤ 20 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) ISC µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V VN µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-3.3 ΔVREF/ΔILOAD MAX (1) LM4132A-3.3 LM4132A-3.3 TCVREF/°C MIN (1) TYP (2) ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 310 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 9 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.10 Electrical Characteristics LM4132-3.3-Q1(VOUT = 3.3 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER MIN (1) TYP (2) TEST CONDITIONS MAX (1) Output voltage initial accuracy LM4132C-3.3-Q1 (C Grade - 0.2%) –0.2% 0.2% LM4132D-3.3-Q1 (D Grade - 0.4%) –0.4% 0.4% TCVREF/°C Temperature coefficient LM4132C-3.3-Q1 IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation VREF ΔVREF/ΔILOAD ΔVREF LM4132D-3.3-Q1 3 –40°C ≤ TJ ≤ 125°C Load Regulation 85 0 mA ≤ ILOAD ≤ 25 mA 25 –40°C ≤ TJ ≤ 125°C 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA 0.1 Hz to 10 Hz Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 120 Long-term stability (3) Output noise voltage µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V ISC µA 100 EN = 0 V VN 10 ppm/°C 60 Dropout voltage (5) (2) (3) (4) (5) 20 –40°C ≤ TJ ≤ 125°C VIN – VREF (1) 20 –40°C ≤ TJ ≤ 125°C UNIT ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 310 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.11 Electrical Characteristics LM4132-4.1 (VOUT = 4.096 V) Unless otherwise specified, limits are TJ = 25°C, VIN = 5 V, and ILOAD = 0 mA. PARAMETER VREF Output voltage initial accuracy TEST CONDITIONS Temperature coefficient (A Grade - 0.05%) –0.05% 0.05% LM4132B-4.1 (B Grade - 0.1%) –0.1% 0.1% LM4132C-4.1 (C Grade - 0.2%) –0.2% 0.2% LM4132D-4.1 (D Grade - 0.4%) –0.4% 0.4% LM4132E-4.1 (E Grade - 0.5%) –0.5% 0.5% 0°C ≤ TJ ≤ 85°C 10 –40°C ≤ TJ ≤ 125°C 20 LM4132B-4.1 20 LM4132C-4.1 20 LM4132D-4.1 –40°C ≤ TJ ≤ 125°C IQ Supply current IQ_SD Supply current in shutdown ΔVREF/ΔVIN Line regulation ΔVREF 30 –40°C ≤ TJ ≤ 125°C 3 –40°C ≤ TJ ≤ 125°C 100 0 mA ≤ ILOAD ≤ 20 mA 120 Long-term stability (3) 1000 Hrs 50 Thermal hysteresis (4) –40°C ≤ TJ ≤ 125°C 75 ILOAD = 10 mA Output noise voltage 0.1 Hz to 10 Hz ISC Short-circuit current –40°C ≤ TJ ≤ 125°C VIL Enable pin maximum low input level –40°C ≤ TJ ≤ 125°C VIH Enable pin minimum high input level –40°C ≤ TJ ≤ 125°C ppm/V 25 –40°C ≤ TJ ≤ 125°C VN µA 7 VREF + 400 mV ≤ VIN ≤ 5.5 V Load regulation µA 100 EN = 0 V Dropout voltage (5) (2) (3) (4) (5) ppm/°C 60 VIN – VREF (1) UNIT 20 LM4132E-4.1 ΔVREF/ΔILOAD MAX (1) LM4132A-4.1 LM4132A-4.1 TCVREF/°C MIN (1) TYP (2) ppm/mA ppm 175 –40°C ≤ TJ ≤ 125°C mV 400 350 µVPP 75 35% (VIN) 65% (VIN) mA V V Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control. Typical numbers are at 25°C and represent the most likely parametric norm. Long-term stability is VREF at 25°C measured during 1000 hrs. Thermal hysteresis is defined as the change in 25°C output voltage before and after cycling the device from (–40°C to 125°C). Dropout voltage is defined as the minimum input to output differential at which the output voltage drops by 0.5% below the value measured with a 5-V input. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 11 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.12 Typical Characteristics 100 450 VREF = 2.048V 400 VDROPOUT (mV) SUPPLY CURRENT (PA) 2.048V 350 300 250 200 150 2.5V 100 4.096V 50 0 2 7 12 17 80 125oC 60 25oC 40 -40oC 20 0 0.5 22 1.5 Figure 1. Dropout vs Load to 0.5% Accuracy 2.5 4.5 VEN (V) IQ SHUTDOWN (PA) 5.0 tVIHt tVILt 1 0.5 4.0 3.5 3.0 2.0 2 2.5 3 3.5 4 4.5 5 -25 -40 75 100 125 85 50 150 -50 -100 80 GROUND CURRENT (PA) 1 TYPICAL UNIT FROM EACH VOLTAGE OPTION 100 DRIFT (ppm) 50 Figure 4. Shutdown IQ vs Temperature 200 75 70 65 60 -150 0 100 200 300 400 500 600 700 800 900 1000 55 0 5 TIME (Hours) Submit Documentation Feedback 10 15 20 LOAD CURRENT (mA) Figure 5. Typical Long-Term Stability 12 25 TEMPERATURE ( C) VIN (V) -200 0 o Figure 3. Enable Threshold Voltage and Hysteresis 0 5.5 2.5 0 150 4.5 Figure 2. Supply Current vs Input Voltage 3 1.5 3.5 INPUT VOLTAGE (V) ILOAD (mA) 2 2.5 Figure 6. Ground Current vs Load Current Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 Typical Characteristics (continued) 45 Temperature Range -40oC < TJ < 125oC after 8 thermal cycles 40 FREQUENCY 35 30 25 20 15 10 5 0 0 25 50 75 100 125 150 200 HYSTERESIS (ppm) Figure 7. Typical Thermal Hysteresis Figure 8. Turnon Transient Response ILOAD = 0 to 10 mA VIN = 4 V to 5.5 V Figure 9. Load Transient Response Figure 10. Line Transient Response Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 13 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.12.1 Typical Characteristics for 1.8 V 1.804 1.8010 1.803 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.8005 1.802 5 TYPICAL UNITS 1.801 1.800 1.799 1.798 125oC 1.8000 1.7995 25oC 1.7990 -40oC 1.7985 1.797 1.796 -40 1.7980 -20 0 20 40 60 80 100 120 0 2 4 TEMPERATURE (oC) 6 8 10 12 14 16 18 20 LOAD CURRENT (mA) Figure 12. Load Regulation Figure 11. Output Voltage vs Temperature 1.8020 OUTPUT VOLTAGE (V) 1.8015 1.8010 125oC 1.8005 25oC 1.8000 1.7995 -40oC 1.7990 1.7985 1.7990 2.2 2.7 3.2 3.7 4.2 4.7 5.2 INPUT VOLTAGE (V) Figure 13. Line Regulation Figure 14. 0.1–10 Hz Noise 0 POWER SUPPLY REJECTION (dB) OUTPUT NOISE VOLTAGE (PV/rt(Hz)) 16 14 NO COUT 12 10 8 6 4 2 0 10 100 1k 10k -10 NO COUT -20 -30 -40 -50 -60 -70 COUT = 0.1 PF -80 -90 10 100 FREQUENCY (Hz) Figure 15. Output Voltage Noise Spectrum 14 Submit Documentation Feedback 1k 10k 100k 1M FREQUENCY (Hz) Figure 16. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.12.2 Typical Characteristics for 2.048 V 2.050 2.052 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.051 2.050 5 TYPICAL UNITS 2.049 2.048 2.047 2.048 25oC -40oC 2.047 125oC 2.046 2.046 2.045 -50 2.049 -25 0 25 50 75 100 2.045 0 125 o TEMPERATURE ( C) 4 8 12 16 20 LOAD CURRENT (mA) Figure 18. Load Regulation Figure 17. Output Voltage vs Temperature 2.052 OUTPUT VOLTAGE (V) 2.051 125oC 2.050 25oC 2.049 2.048 -40oC 2.047 2.046 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) Figure 20. 0.1–10 Hz Noise Figure 19. Line Regulation 0 POWER SUPPLY REJECTION (dB) OUTPUT NOISE VOLTAGE (PV/rt(Hz)) 16 14 NO COUT 12 10 8 6 4 2 0 10 -10 -20 -30 NO COUT -40 -50 -60 -70 COUT = 0.1 PF -80 100 1k 10k 10 FREQUENCY (Hz) 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 21. Output Voltage Noise Spectrum Figure 22. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 15 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.12.3 Typical Characteristics for 2.5 V 2.504 2.503 5 TYPICAL UNITS OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.503 2.502 2.501 2.500 2.499 2.502 -40oC 2.501 2.500 125oC 2.499 2.498 2.497 -50 25oC -25 0 25 50 75 100 2.498 0 125 4 o TEMPERATURE ( C) 8 12 16 20 LOAD CURRENT (mA) Figure 23. Output Voltage vs Temperature Figure 24. Load Regulation 2.502 OUTPUT VOLTAGE (V) 125oC 2.501 2.500 25oC -40oC 2.499 2.498 2.497 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) Figure 25. Line Regulation Figure 26. 0.1–10 Hz Noise 0 POWER SUPPLY REJECTION (dB) OUTPUT NOISE VOLTAGE (PV/rt(Hz)) 32 28 NO COUT 24 20 16 12 8 4 0 -10 NO COUT -20 -30 -40 -50 -60 COUT = 0.1 PF -70 -80 10 100 1k 10k 10 100 FREQUENCY (Hz) Submit Documentation Feedback 10k 100k 1M FREQUENCY (Hz) Figure 27. Output Voltage Noise Spectrum 16 1k Figure 28. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 3.006 3.0020 3.005 3.0015 3.004 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 6.12.4 Typical Characteristics for 3 V 3.003 3.002 5 TYPICAL UNITS 3.001 3 2.999 2.998 3.0005 125oC 3.0000 2.9995 25oC 2.9990 2.9985 -40oC 2.9980 2.997 2.996 -40 3.0010 2.9975 -20 0 20 40 60 0 80 100 120 2 o TEMPERATURE ( C) 4 6 8 10 12 14 16 18 20 LOAD CURRENT (mA) Figure 30. Load Regulation Figure 29. Output Voltage vs Temperature 3.0020 OUTPUT VOLTAGE (V) 3.0015 125oC 3.0010 3.0005 25oC 3.0000 2.9995 2.9990 -40oC 2.9985 2.9980 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 INPUT VOLTAGE (V) Figure 32. 0.1–10 Hz Noise Figure 31. Line Regulation 0 POWER SUPPLY REJECTION (dB) OUTPUT NOISE VOLTAGE PV (Hz)) 30 25 NO COUT 20 15 10 5 0 10 100 1k 10k -10 NO COUT -20 -30 -40 -50 -60 -70 COUT = 0.1 PF -80 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 33. Output Voltage Noise Spectrum Figure 34. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 17 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 6.12.5 Typical Characteristics for 3.3 V 3.305 3.3005 3.304 3.3000 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 3.303 5 TYPICAL UNITS 3.302 3.301 3.3 3.299 3.298 3.297 -40oC 3.2995 3.2990 25oC 3.2985 125oC 3.2980 3.296 3.295 -40 3.2975 -20 0 20 40 60 0 80 100 120 2 4 o 6 8 10 12 14 16 18 20 LOAD CURRENT (mA) TEMPERATURE ( C) Figure 36. Load Regulation Figure 35. Output Voltage vs Temperature 3.3010 OUTPUT VOLTAGE (V) 3.3008 25oC 3.3006 3.3004 3.3002 125oC 3.3000 -40oC 3.2998 3.2996 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 INPUT VOLTAGE (V) Figure 37. Line Regulation Figure 38. 0.1–10 Hz Noise 0 POWER SUPPLY REJECTION (dB) OUTPUT NOISE VOLTAGE PV (Hz)) 30 25 NO COUT 20 15 10 5 0 10 100 1k 10k -10 NO COUT -20 -30 -40 -50 COUT = 0.1 PF -60 -70 -80 -90 10 100 Figure 39. Output Voltage Noise Spectrum 18 Submit Documentation Feedback 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 40. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 6.12.6 Typical Characteristics for 4.096 V 4.104 4.098 -40oC 5 TYPICAL UNITS OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 4.102 4.100 4.098 4.096 4.094 4.096 125oC 4.095 25oC 4.094 4.092 4.090 -50 4.097 -25 0 25 50 75 100 4.093 0 125 4 TEMPERATURE (oC) 8 12 16 20 LOAD CURRENT (mA) Figure 42. Load Regulation Figure 41. Output Voltage vs Temperature 4.100 OUTPUT VOLTAGE (V) 4.099 4.098 125oC 4.097 4.096 4.095 -40oC 4.094 25oC 4.093 4.092 4.5 4.7 4.9 5.1 5.3 5.5 INPUT VOLTAGE (V) Figure 43. Line Regulation Figure 44. 0.1–10 Hz Noise POWER SUPPLY REJECTION RATIO (dB) OUTPUT NOISE VOLTAGE (PV/rt(Hz)) 32 28 NO COUT 24 20 16 12 8 4 0 10 100 1k 10k 0 -10 NO COUT -20 -30 -40 -50 -60 COUT = 0.1 PF -70 -80 10 FREQUENCY (Hz) 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 45. Output Voltage Noise Spectrum Figure 46. Power Supply Rejection vs Frequency Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 19 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 7 Detailed Description 7.1 Overview The LM4132 device is a precision band-gap voltage reference available in 6 different voltages with 20-mA current source capability. This series reference can operate with input voltages from VREF + 400 mV to 5.5 V while consuming 60-µA (typical) supply current. In shutdown mode, current drops to 3 µA (typical). The LM4132 is available in five grades from A and E. The best grade devices (A) have an initial accuracy of 0.05% with a specified tempco of 10 ppm/°C from –40°C to 125°C. The grade devices (E) have an initial accuracy of 0.5% with specified tempco of 30 ppm/°C from –40°C to 125°C. 7.2 Functional Block Diagram VIN VBG BANDGAP CELL ± Q1 ILOAD + VREF EN § R1 · VBG ¨ 1 ¸ © R2 ¹ R1 COUT R2 7.3 Feature Description The LM4132 can be remotely operated by applying an EN voltage between 65% of VIN, and VIN. The LM4312 can be remotely disabled by applying an EN voltage between 0 V to 35% of VIN. The EN pin can also be strapped to VIN, so VREF is active when VIN is applied. 7.3.1 Short Circuited Output The LM4132 features indefinite short-circuit protection. This protection limits the output current to 75 mA when the output is shorted to ground. 7.3.2 Turnon Time Turnon time is defined as the time taken for the output voltage to rise to 90% of the preset value. The turnon time depends on the load. The turnon time is typically 33.2 µs when driving a 1-µF load and 78.8 µs when driving a 10-µF load. Some users may experience an extended turnon time (up to 10 ms) under brownout conditions and low temperatures (–40°C). 20 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 Feature Description (continued) 7.3.3 Thermal Hysteresis Thermal hysteresis is defined as the change in output voltage at 25ºC after some deviation from 25ºC. This is to say that thermal hysteresis is the difference in output voltage between two points in a given temperature profile. An illustrative temperature profile is shown in Figure 47. 125oC VREF1 25oC Time VREF2 -40oC Figure 47. Temperature Profile This may be expressed analytically by Equation 1: VHYS = lVREF1 - VREF2l x 106 ppm VREF where • • • • • VHYS = Thermal hysteresis expressed in ppm VREF = Nominal preset output voltage VREF1 = VREF before temperature fluctuation VREF2 = VREF after temperature fluctuation The LM4132 features a low thermal hysteresis of 75 ppm (typical) from –40°C to 125°C after 8 temperature cycles. (1) 7.4 Device Functional Modes Table 1 describes the functional modes of the LM4132. Table 1. Enable Pin Mode Summary ENABLE PIN CONNECTION LOGIC STATE DESCRIPTION EN = VIN 1 Normal operation — LM4132 starts up. EN = GND 0 The LM4312 is in shutdown mode. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 21 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 8 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM4132 family of precision voltage references can deliver up to 20 mA without an output capacitor or buffer amplifier. The LM4132 is ideal for battery-powered solutions, with a low quiescent current of 60 µA, and a low dropout voltage of 400 mV. The LM4132 enters the shutdown mode (3 µA, typical) when EN is 0 V. 8.2 Typical Applications 8.2.1 LM4132 Typical Application Input 5V VIN Output 2.5V VREF CIN* * COUT LM4132 Enable EN GND 8.2.1.1 Design Requirements For this design example, use the parameters listed as the input parameters. • VIN > VREF + 400 mV (ILOAD ≤ 10 mA) • ILOAD ≤ 20 mA • The LM4132 is enabled when 65%VIN< VEN ≤ VIN. VEN cannot be greater than VIN; otherwise, the device does not operate correctly. • The devices is disabled when 0 V ≤ VEN ≤ 35% VIN. 8.2.1.2 Detailed Design Procedure The foundation of any voltage reference is the band-gap circuit. While the reference in the LM4132 is developed from the gate-source voltage of transistors in the device, principles of the band-gap circuit are easily understood using a bipolar example. For a detailed analysis of the bipolar band-gap circuit, refer to AN-56 LM113 1.2V Reference (SNVA514). 8.2.1.2.1 Supply and Enable Voltages To ensure proper operation, VEN and VIN must be within a specified range. An acceptable range of input voltages is calculated by Equation 2: VIN > VREF + 400 mV (ILOAD ≤ 10 mA) (2) The EN pin uses an internal pullup current source (IPULLUP ≊ 2 µA) that may be left floating or triggered by an external source. If the device is not enabled by an external source, it may be connected to VIN. An acceptable range of enable voltages is given by Figure 4. See Electrical Characteristics LM4132-1.8 (VOUT = 1.8 V) and Figure 3 for more detail. The device does not operate correctly for VEN > VIN. 22 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 Typical Applications (continued) 8.2.1.2.2 Component Selection A small ceramic (X5R or X7R) capacitor on the input must be used to ensure stable operation. The value of CIN must be sized according to the output capacitor value. The value of CIN must satisfy the relationship CIN ≥ COUT. When no output capacitor is used, CIN must have a minimum value of 0.1 µF. Noise on the power-supply input may affect the output noise. Larger input capacitor values (typically 4.7 µF to 22 µF) may help reduce noise on the output and significantly reduce overshoot during start-up. Use of an additional optional bypass capacitor from the input and ground may help further reduce noise on the output. With an input capacitor, the LM4132 drives any combination of resistance and capacitance up to VREF / 20 mA and 10 µF, respectively. The LM4132 is designed to operate with or without an output capacitor and is stable with capacitive loads up to 10 µF. Connecting a capacitor from the output and ground significantly improves the load transient response when switching from a light load to a heavy load. The output capacitor must not be made arbitrarily large because capacitor selection affects the turnon time as well as line and load transients. While a variety of capacitor chemistry types may be used, it is typically advisable to use low equivalent series resistance (ESR) ceramic capacitors. Such capacitors provide a low impedance to high frequency signals, effectively bypassing them to ground. Bypass capacitors must be mounted close to the device. Mounting bypass capacitors close to the device helps reduce the parasitic trace components thereby improving performance. 8.2.1.2.3 Temperature Coefficient Temperature drift is defined as the maximum deviation in output voltage over the operating temperature range. This deviation over temperature may be shown in Figure 48: Temperature Change in Output Voltage Voltage VREF_MAX VREF_MIN Temperature Range Figure 48. VREF vs Temperature Profile Temperature coefficient may be expressed analytically as Equation 3: TD = (VREF_MAX - VREF_MIN) VREF x ΔT x 106 ppm where • • • • • • TD = Temperature drift VREF = Nominal preset output voltage VREF_MIN = Minimum output voltage over operating temperature range VREF_MAX = Maximum output voltage over operating temperature range ΔT = Operating temperature range The LM4132 features a low temperature drift of 10 ppm (maximum) to 30 ppm (maximum), depending on the grade. (3) 8.2.1.2.4 Long-Term Stability Long-term stability refers to the fluctuation in output voltage over a long period of time (1000 hours). The LM4132 features a typical long-term stability of 50 ppm over 1000 hours. The measurements are made using 5 units of each voltage option, at a nominal input voltage (5 V), with no load, at room temperature. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 23 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com Typical Applications (continued) 8.2.1.2.5 Expression of Electrical Characteristics Electrical characteristics are typically expressed in mV, ppm, or a percentage of the nominal value. Depending on the application, one expression may be more useful than the other. To convert one quantity to the other one may apply the following: ppm to mV error in output voltage: VREF x ppmERROR 103 = VERROR where • • VREF is in volts (V) VERROR is in millivolts (mV) (4) Bit error (1 bit) to voltage error (mV): VREF 2n x 103 = VERROR where • • • VREF is in volts (V) VERROR is in millivolts (mV) n is the number of bits (5) mV to ppm error in output voltage: VERROR VREF x 103 = ppmERROR where • • VREF is in volts (V) VERROR is in millivolts (mV) (6) Voltage error (mV) to percentage error (percent): VERROR VREF x 0.1 = Percent_Error where • • VREF is in volts (V) VERROR is in millivolts (mV) (7) 8.2.1.3 Application Curves 2.503 2.502 2.502 2.501 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 125oC -40oC 2.501 2.500 125oC 2.499 2.500 25oC -40oC 2.499 2.498 25oC 2.498 0 24 4 8 12 16 20 2.497 3.0 3.5 4.0 4.5 5.0 LOAD CURRENT (mA) INPUT VOLTAGE (V) Figure 49. Load Regulation Figure 50. Line Regulation Submit Documentation Feedback 5.5 Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 Typical Applications (continued) 8.2.2 Other Application Circuits V REF Input VIN VREF C OUT CIN R R +5V -VREF LM4132 -5V Enable R/2 EN GND 4.7 µF < C OUT < 10 µF Figure 51. Voltage Reference With Complementary Output +5V Input VIN VREF VREF_FORCE CIN 0.1 µF LM4132 Enable EN 100 k: VREF_SENSE GND Figure 52. Precision Voltage Reference With Force and Sense Output Input VIN Output VREF CIN R1 500: LM4132 0.1 µF Enable EN RSET GND I OUT IOUT = (VREF/(R1 + RSET)) + IGND IGND RL 1 k: Figure 53. Programmable Current Source 9 Power Supply Recommendations An input capacitor between VIN and ground is required, and must be placed close to the device. An output capacitor is optional, and if used must satisfy the relationship CIN >= COUT. Refer to Component Selection. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 25 LM4132, LM4132-Q1 SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 www.ti.com 10 Layout 10.1 Layout Guidelines The mechanical stress due to PCB mounting can cause the output voltage to shift from its initial value. The center of a PCB generally has the highest mechanical and thermal expansion stress. Mounting the device near the edges or the corners of the board where mechanical stress is at its minimum. References in SOT-23 packages are generally less prone to assembly stress than devices in small outline (SOIC) packages. A mechanical isolation of the device by creating an island by cutting a U shape slot (U - SLOT) on the PCB while mounting the device helps in reducing the impact of the PCB stresses on the output voltage of the reference. This approach would also provide some thermal isolation from the rest of the circuit. Figure 54 shows a recommended printed board layout for LM4132 along with an in-set diagram, which exhibits a slot cut on three sides of the reference device. Bypass capacitors must be mounted close to the device. Mounting bypass capacitors close to the device reduces the parasitic trace components, thereby improving performance. 10.2 Layout Example PCB Top View VIN VREF PCB Length LM4132 PCB Side View STRESS U - SLOT N/C GND STRESS EN U - SLOT VREF LM4132 N/C PCB Length GND Set CIN close to VIN and GND EN N/C COUT LM4132 CIN Set COUT close to VOUT and GND VREF VIN Figure 54. Typical Layout Example With LM4132 26 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 LM4132, LM4132-Q1 www.ti.com SNVS372G – AUGUST 2005 – REVISED OCTOBER 2016 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: AN-56 LM113 1.2V Reference (SNVA514) 11.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LM4132 Click here Click here Click here Click here Click here LM4132-Q1 Click here Click here Click here Click here Click here 11.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2005–2016, Texas Instruments Incorporated Product Folder Links: LM4132 LM4132-Q1 Submit Documentation Feedback 27 PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4132AMF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AA LM4132AMF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BA LM4132AMF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CA LM4132AMF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DA LM4132AMF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EA LM4132AMF-4.1 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 R4FA LM4132AMF-4.1/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FA LM4132AMFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AA LM4132AMFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BA LM4132AMFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CA LM4132AMFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DA LM4132AMFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EA LM4132AMFX-4.1/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FA LM4132AQ1MFR2.5 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZECX LM4132AQ1MFR3.0 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEIX LM4132AQ1MFT2.5 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZECX LM4132AQ1MFT3.0 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEIX Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 4-Nov-2016 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4132BMF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AB LM4132BMF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BB LM4132BMF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CB LM4132BMF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DB LM4132BMF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EB LM4132BMF-4.1/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FB LM4132BMFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AB LM4132BMFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BB LM4132BMFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CB LM4132BMFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DB LM4132BMFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EB LM4132BMFX-4.1/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FB LM4132BQ1MFR2.5 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZDYX LM4132BQ1MFR3.0 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEJX LM4132BQ1MFT2.5 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZDYX LM4132BQ1MFT3.0 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEJX LM4132CMF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AC LM4132CMF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BC Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 4-Nov-2016 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4132CMF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CC LM4132CMF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DC LM4132CMF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EC LM4132CMF-4.1/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FC LM4132CMFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AC LM4132CMFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BC LM4132CMFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CC LM4132CMFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DC LM4132CMFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EC LM4132CMFX-4.1/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FC LM4132CQ1MFR2.5 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZDZX LM4132CQ1MFR3.0 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEKX LM4132CQ1MFR3.3 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEZX LM4132CQ1MFT2.5 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZDZX LM4132CQ1MFT3.0 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEKX LM4132CQ1MFT3.3 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEZX LM4132DMF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AD LM4132DMF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BD Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 4-Nov-2016 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4132DMF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CD LM4132DMF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DD LM4132DMF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4ED LM4132DMF-4.1/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FD LM4132DMFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AD LM4132DMFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BD LM4132DMFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CD LM4132DMFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DD LM4132DMFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4ED LM4132DMFX-4.1/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FD LM4132DQ1MFR2.5 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEAX LM4132DQ1MFR3.0 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZELX LM4132DQ1MFR3.3 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZFAX LM4132DQ1MFT2.5 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZEAX LM4132DQ1MFT3.0 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZELX LM4132DQ1MFT3.3 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 ZFAX LM4132EMF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AE LM4132EMF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BE Addendum-Page 4 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 4-Nov-2016 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4132EMF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CE LM4132EMF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DE LM4132EMF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EE LM4132EMF-4.1/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FE LM4132EMFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4AE LM4132EMFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4BE LM4132EMFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4CE LM4132EMFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4DE LM4132EMFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4EE LM4132EMFX-4.1/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 R4FE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 5 Samples PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2016 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF LM4132, LM4132-Q1 : • Catalog: LM4132 • Automotive: LM4132-Q1 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 6 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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