HolyStone LCC Large size np0 & x7r mlcc capacitor Datasheet

LCC Series - Large Size MLCC Capacitors
LCC Series
Large Size NP0 & X7R MLCC Capacitors
50V – 8KV
 Features
 Applications.
 Optimized internal design offers the highest possible
 Voltage multipliers
 Power supplies
 DC-DC converters
 Surge protection
 Industrial control circuits
 Isolation
 Ballast
 Snubber
 Custom applications
voltage rating up to 8KVdc.
 Capacitance range from 470pF - 33uF and case sizes
from 1515 – 7565.
 Available with proprietary surface coating for arc
prevention
 Available with flexible termination (Super Term) to
minimize the effects of mechanical stress.
 High reliability screening is available.
 Pd/Ag, 100% Sn and 90/10 Sn/Pb terminations available.
 RoHS compliant.
 Summary of Specifications
-55~+125 ℃
Operating Temperature
Rated Voltage
50Vdc to 8KVdc
NP0 : ≤ ± 30ppm/ ℃
, -55~+125 ℃ (EIA Class Ι )
Temperature Coefficient
X7R : ≤ ± 15%
Capacitance Range
NP0 :100pF to 820nF ; X7R :1000pF to 33uF
Dissipation Factor
NP0 : Q≧1000 ; X7R : D.F.≦2.5%
, -55~+125 ℃ (EIA Class Ⅱ )
Insulation Resistance
10GΩ or 500/C Ω whichever is smaller (C in Farad )
Ageing
NP0:0% ; X7R: 1.0 % per decade of time
V ≤ 500V
Dielectric Strength
: 200% rated voltage
500V ≤ V < 1000V
: 150% rated voltage
V ≥1000V
: 120% rated voltage
 How To Order
C
2520
X
Product
Chip Size Dielectric
Code
C: MLCC
EX.:
Ex.:
Multilayer
1515
N: NP0
Ceramic
2520
X: X7R
Capacitor
3530
3640
4540
5550
6560
7565
103
K
Capacitance Tolerance
Unit : pF
Ex.:
Ex.:
100:10×100
C:+/-0.25pF
471:47×101
D:+/-0.50pF
102:10×102
J:+/- 5%
K:+/-10%
M:+/-20%
102
T
N
Rated
Packaging Termination
Voltage
Ex.:
Ex.:
Ex.:
T: Tape
S:Solderable
050:50Vdc
& Reel
Ag
251:250Vdc
W: Waffle P:Pd/Ag
631:630Vdc
Pack
102:1000Vdc
N: 100%
B: Bulk
Sn Plated
W:90/10
Sn/Pb
Plated
- 30 -
S
Testing
Requirement
Ex.:
S:
Standard
Electrical
H:
Hi-Reliability
X
Special
Requirement
Ex.:
Blank:
Standard
O: Arc
Prevention
Coating
X: Flexible
Termination
(Super Term)
Z: Arc
Prevention and
SuperTerm
LCC Series-Large Size Multilayer Ceramic Chip Capacitors
 Dimensions
TYPE
BW
B
T
W
L
1515
L
3.80±0.50
2520
6.35±0.50
W
3.80±0.50
[.15 ±.020]
5.00±0.50
3530
8.90±0.50
7.60±0.50
3640
9.20±0.50
10.2±0.50
4540
11.5±0.50
10.2±0.50
5550
14.0±0.50
12.7±0.50
6560
16.5±0.50
15.3±0.50
7565
19.0±0.50
16.5±0.50
[.15±.020]
[.25±.020]
[.35±.020]
[.36±.020]
[.45±.020]
[.55±.020]
[.65±.020]
[.750±.020]
[.20±.020]
[.30±.020]
[.40±.020]
[.40±.020]
[.50±.020]
[.60±.020]
[.65±.020]
T (max)
3.20
[.126]
3.20
[.126]
5.00
[.200]
5.00
[.200]
5.00
[.200]
5.00
Unit : mm [inches]
B (min)
BW (min)
1.60
0.30
[.059]
[.012]
5.50
0.30
[.217]
[.012]
6.00
0.30
[.236]
[.012]
7.50
0.30
[.295]
[.012]
9.00
[.354]
5.00
11.50
5.00
14.00
[.200]
0.30
[.157]
[.200]
[.200]
[.012]
4.00
0.30
[.012]
0.30
[.453]
[.012]
0.30
[.551]
[.012]
 Capacitance Range
Size
1515
2520
3530
3640
4540
5550
6560
7565


Dielectric
NPO
X7R
NPO
X7R
NPO
X7R
NPO
X7R
NPO
X7R
NPO
X7R
NPO
X7R
NPO
X7R
50V
473
225
823
475
154
106
224
126
284
156
364
186
654
226
844
336
100V
393
105
683
225
134
475
184
565
244
685
304
825
484
186
674
226
200V
363
474
563
474
104
225
124
225
184
225
224
275
404
106
504
186
500V
103
124
473
224
823
824
104
105
154
125
184
225
304
335
474
475
Capacitance maximum
1KV
2KV
3KV
222
821
473
682
103
392
222
473
153
472
253
103
472
224
473
183
373
153
562
274
683
273
483
203
962
394
104
393
683
273
153
474
124
823
104
423
223
105
224
104
134
553
283
125
364
154
4KV
5KV
8KV
102
222
332
822
362
153
472
223
562
333
682
563
103
823
471
102
102
472
122
103
152
153
182
223
332
333
472
473
471
102
561
182
621
392
681
562
821
103
102
153
All values are capacitance EIA codes.
Other dimensions, capacitance values and voltage ratings are available. Please contact HEC.
*Soldering and handling precautions:
Large ceramic capacitors are more prone to thermal and mechanical cracks. To minimize mechanical cracks, capacitors have to be
handled carefully in the original waffle pack container, carrier tape or other suitable container. Care must be taken that ceramic chips do
not come into contact with one another causing chip outs, cracks or other mechanical damage.
The recommended method for soldering large chips is reflow soldering. Wave soldering and manual soldering are not recommended.
Ceramic capacitors should be preheated to within 50°C of the peak soldering temperature and then use a maximum 2°C/second ramp
rate for both heating and cooling. A sudden increase or decrease in temperature during soldering may cause internal thermal cracks.
Available Options:
• HEC offers flexible termination (Super Term) for very large chips to minimize mechanical cracks due to board flexing.
• To minimize the potential for surface arcing in higher voltage applications, HEC offers the option of a proprietary surface coating.
• Pure tin terminated / ROHS compliant products are offered as standard, however, lead (Pb) content plated termination is also available.
• Pd/Ag termination is also available as an option for hybrid circuits and other applications.
- 31 -
Similar pages