LINER LTM8003 60vin, 3a silent switcher î¼module regulator Datasheet

LTM8073
60VIN, 3A Silent Switcher
µModule Regulator
Features
Description
Complete Step-Down Switch Mode Power Supply
nn Low Noise Silent Switcher® Architecture
nn Wide Input Voltage Range: 3.4V to 60V
nn Wide Output Voltage Range: 0.8V to 15V
nn 3A Continuous Output Current, 24V , 5V
IN
OUT,
TA = 85°C
nn Up to 5A Peak Current
nn Parallelable for Increased Output Current
nn Selectable Switching Frequency: 200kHz to 3MHz
nn Programmable Soft-Start
nn 6.25mm × 9mm × 3.32mm BGA Package
The LTM®8073 is a 60VIN, 3A (continuous) or 5A (peak)
step-down Silent Switcher µModule® (power module)
regulator. Included in the package are the switching controller, power switches, inductor, and all support components. Operating over an input voltage range of 3.4V to
60V, the LTM8073 supports an output voltage range of
0.8V to 15V and a switching frequency range of 200kHz
to 3MHz, each set by a single resistor. Only the input and
output filter capacitors are needed to finish the design.
nn
The low profile package enables utilization of unused
space on the bottom of PC boards for high density point
of load regulation. The LTM8073 is packaged in a thermally
enhanced, compact over-molded ball grid array (BGA)
package suitable for automated assembly by standard surface mount equipment. The LTM8073 is RoHS compliant.
Applications
Power for Portable Products
Distributed Supply Regulation
nn Industrial Supplies
nn Wall Transformer Regulation
nn
nn
L, LT, LTC, LTM, µModule, Burst Mode, Silent Switcher, Linear Technology and the Linear logo
are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their
respective owners.
Typical Application
5VOUT from 7VIN to 60VIN Step-Down Converter
95
BIAS
AUX
RUN
1µF
VOUT
5V
3A
VOUT
RT
32.4k
1.2MHz
GND
SYNC
FB
47.5k
100µF
8073 TA01a
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
EFFICIENCY (%)
LTM8073
VIN
VIN
7V TO 60V
Efficiency, VOUT = 5V, BIAS = 5V
BIAS = 5V
VIN = 24V
90
85
80
0
1
2
LOAD CURRENT (A)
3
8073 TA01
8073fa
For more information www.linear.com/LTM8073
1
LTM8073
Absolute Maximum Ratings
Pin Configuration
(Notes 1, 2)
VIN, RUN Voltage.......................................................65V
PG Voltage.................................................................42V
AUX, VOUT, BIAS Voltage...........................................19V
FB, TR/SS Voltage.......................................................4V
SYNC Voltage...............................................................6V
Maximum Internal Temperature (Note 4)............... 125°C
Storage Temperature.............................. –55°C to 125°C
Peak Solder Reflow (Package Body) Temperature...250°C
TOP VIEW
BANK 2
VIN
RUN
GND
6
5
4
AUX
BIAS
RT TR/SS
SHARE SYNC
1
BANK 3
GND
VOUT
PG
3
2
BANK 1
GND FB
A
B
C
D
E
F
G
H
48-LEAD (9mm × 6.25mm × 3.32mm) BGA PACKAGE
TJMAX = 125°C, θJA = 23.6°C/W, θJCbottom = 4.4°C/W,
θJCtop = 11.3°C/W, θJB = 2.8°C/W, WEIGHT = 0.5g
θ VALUES DETERMINED PER JEDEC 51-9, 51-12
Order Information
http://www.linear.com/product/LTM8073#orderinfo
PART MARKING*
PART NUMBER
LTM8073EY#PBF
LTM8073IY#PBF
TERMINAL FINISH
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(Note 3)
SAC305 (RoHS)
LTM8073
e1
BGA
3
–40°C to 125°C
• Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• Recommended BGA PCB Assembly and Manufacturing Procedures:
www.linear.com/umodule/pcbassembly
• BGA Package and Tray Drawings: www.linear.com/packaging
8073fa
2
For more information www.linear.com/LTM8073
LTM8073
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, RUN = 2V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage
VIN Rising
Output DC Voltage
RFB Open
RFB = 14.3kΩ, VIN = 60V
Peak Output DC Current
VOUT = 3.3V, fSW = 1MHz
Quiescent Current Into VIN
RUN = 0V
BIAS = 0V, No Load, SYNC = 0V, Not Switching
3
300
µA
µA
Quiescent Current Into BIAS
BIAS = 5V, RUN = 0V
BIAS = 5V, No Load, SYNC = 0V, Not Switching
BIAS = 5V, VOUT = 3.3V, IOUT = 3A, fSW = 1MHz
1
275
12
µA
µA
mA
Line Regulation
5.5V < VIN < 36V, IOUT = 1A
0.5
%
Load Regulation
0.1A < IOUT < 3A
0.5
%
Output Voltage Ripple
IOUT = 3A
10
mV
Switching Frequency
RT = 232kΩ
RT = 41.2kΩ
RT = 10.7kΩ
200
0.95
3
kHz
MHz
MHz
3.4
772
802
0.9
RUN Current
TR/SS = 0V
TR/SS Pull-Down
PG Threshold Voltage at FB (Upper)
V
A
(Note 5)
RUN Threshold Voltage
UNITS
V
V
5
l
TR/SS Current
MAX
0.8
15
Voltage at FB
Minimum BIAS Voltage
TYP
l
817
mV
3.2
V
1.06
V
1
µA
2
µA
TR/SS = 0.1V
200
Ω
FB Falling (Note 6)
0.88
V
PG Threshold Voltage at FB (Lower)
FB Rising (Note 6)
0.73
PG Leakage Current
PG = 42V
PG Sink Current
PG = 0.1V
V
1
150
µA
µA
SYNC Threshold Voltage
Synchronization
0.4
1.5
V
SYNC Voltage
To Enable Spread Spectrum
2.9
4.2
V
SYNC Current
SYNC = 0V
35
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise noted, the absolute minimum voltage is zero.
Note 3: The LTM8073E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8073I is guaranteed to meet specifications over the full –40°C to
125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 4: The LTM8073 contains overtemperature protection that is
intended to protect the device during momentary overload conditions. The
internal temperature exceeds the maximum operating junction temperature
when the overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
Note 5. Below this specified voltage, internal circuitry will draw power
from VIN.
Note 6. PG transitions from low to high.
8073fa
For more information www.linear.com/LTM8073
3
LTM8073
Typical Performance Characteristics
Efficiency, VOUT = 0.8V, BIAS = 5V
12VIN
24VIN
36VIN
48VIN
60
80
70
12VIN
24VIN
36VIN
48VIN
60
0
1
2
3
LOAD CURRENT (A)
50
4
0
1
2
3
LOAD CURRENT (A)
8073 G01
95
50
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
75
55
4
95
12VIN
24VIN
36VIN
48VIN
85
85
0
1
2
3
LOAD CURRENT (A)
0
1
2
3
LOAD CURRENT (A)
8073 G07
75
55
4
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
95
Efficiency, VOUT = 5V, BIAS = 5V
85
75
55
4
8073 G06
Efficiency, VOUT = 3.3V, BIAS = 5V
12VIN
24VIN
36VIN
48VIN
65
4
4
Efficiency, VOUT = 2V, BIAS = 5V
65
EFFICIENCY (%)
95
EFFICIENCY (%)
EFFICIENCY (%)
Efficiency, VOUT = 2.5V, BIAS = 5V
12VIN
24VIN
36VIN
48VIN
2
3
LOAD CURRENT (A)
8073 G05
95
65
1
85
65
75
0
8073 G03
Efficiency, VOUT = 1.8V, BIAS = 5V
8073 G04
55
50
4
85
EFFICIENCY (%)
EFFICIENCY (%)
80
60
12VIN
24VIN
36VIN
48VIN
8073 G02
Efficiency, VOUT = 1.5V, BIAS = 5V
70
70
60
EFFICIENCY (%)
90
Efficiency, VOUT = 1.2V, BIAS = 5V
90
80
70
50
Efficiency, VOUT = 1V, BIAS = 5V
EFFICIENCY (%)
EFFICIENCY (%)
80
90
EFFICIENCY (%)
90
TA = 25°C, unless otherwise noted.
0
1
2
3
LOAD CURRENT (A)
75
12VIN
24VIN
36VIN
48VIN
65
4
8073 G08
55
0
1
2
3
LOAD CURRENT (A)
4
8073 G09
8073fa
4
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LTM8073
Typical Performance Characteristics
Efficiency, VOUT = 8V, BIAS = 5V
TA = 25°C, unless otherwise noted.
Efficiency, VOUT = 12V, BIAS = 5V
90
90
90
80
12VIN
24VIN
36VIN
48VIN
70
60
0
1
2
3
LOAD CURRENT (A)
EFFICIENCY (%)
100
EFFICIENCY (%)
100
80
24VIN
36VIN
48VIN
70
60
4
0
1
2
3
LOAD CURRENT (A)
80
80
80
12VIN
24VIN
36VIN
48VIN
0
1
2
3
LOAD CURRENT (A)
EFFICIENCY (%)
90
EFFICIENCY (%)
EFFICIENCY (%)
90
50
70
12VIN
24VIN
36VIN
48VIN
60
50
4
0
1
2
3
LOAD CURRENT (A)
90
50
EFFICIENCY (%)
1
2
LOAD CURRENT (A)
8073 G16
1
2
LOAD CURRENT (A)
3
0.75
70
12VIN
24VIN
36VIN
60
3
0
Input vs Load Current
VOUT = 0.8V
80
0
12VIN
24VIN
36VIN
48VIN
8073 G15
90
80
50
70
Efficiency, VOUT = –15V, BIAS
Tied to LTM8073 GND
12VIN
24VIN
36VIN
48VIN
4
8073 G14
Efficiency, VOUT = –12V, BIAS
Tied to LTM8073 GND
60
2
3
LOAD CURRENT (A)
60
4
8073 G13
70
1
Efficiency, VOUT = –8V, BIAS Tied
to LTM8073 GND
90
60
0
8073 G12
Efficiency, VOUT = –5V, BIAS Tied
to LTM8073 GND
70
24VIN
36VIN
48VIN
8073 G11
Efficiency, VOUT = –3.3V,
BIAS Tied to LTM8073 GND
EFFICIENCY (%)
80
60
4
8073 G10
Efficiency, VOUT = 15V, BIAS 5V
70
INPUT CURRENT (A)
EFFICIENCY (%)
100
50
0
1
LOAD CURRENT (A)
2
8073 G17
12VIN
24VIN
36VIN
48VIN
0.50
0.25
0
0
1
2
3
LOAD CURRENT (A)
4
5
8073 G18
8073fa
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5
LTM8073
Typical Performance Characteristics
Input vs Load Current
VOUT = 1.2V
Input vs Load Current
VOUT = 1V
1.00
1.00
0.25
0
1
2
3
LOAD CURRENT (A)
4
0.75
0.50
0.25
0
5
0
1
8073 G19
Input vs Load Current
VOUT = 1.8V
1.5
12VIN
24VIN
36VIN
48VIN
1.0
0.5
0
0
1
2
3
LOAD CURRENT (A)
4
2
3
LOAD CURRENT (A)
4
0.5
0
0
1
2
3
LOAD CURRENT (A)
4
5
8073 G25
0
1
2
3
LOAD CURRENT (A)
4
0
1
2
3
LOAD CURRENT (A)
4
Input vs Load Current
VOUT = 3.3V
12VIN
24VIN
36VIN
48VIN
1.5
1.0
0.5
0
5
0
1
3.0
3
1.0
0
1
2
3
LOAD CURRENT (A)
4
5
Input vs Load Current
VOUT = 12V
24VIN
36VIN
48VIN
2.0
0
2
3
LOAD CURRENT (A)
8073 G24
Input vs Load Current
VOUT = 8V
12VIN
24VIN
36VIN
48VIN
5
8073 G21
INPUT CURRENT (A)
INPUT CURRENT (A)
INPUT CURRENT (A)
1.0
0
2.0
0.5
4.0
1.5
0.25
8073 G23
Input vs Load Current
VOUT = 5V
2.0
0.50
5
12VIN
24VIN
36VIN
48VIN
1.0
0
5
12VIN
24VIN
36VIN
48VIN
12VIN
24VIN
36VIN
48VIN
0.75
Input vs Load Current
VOUT = 2.5V
8073 G22
2.5
Input vs Load Current
VOUT = 1.5V
8073 G20
INPUT CURRENT (A)
INPUT CURRENT (A)
1.5
INPUT CURRENT (A)
0.50
12VIN
24VIN
36VIN
48VIN
INPUT CURRENT (A)
12VIN
24VIN
36VIN
48VIN
INPUT CURRENT (A)
INPUT CURRENT (A)
0.75
0
TA = 25°C, unless otherwise noted.
4
5
8073 G26
2
1
0
0
1
2
3
LOAD CURRENT (A)
4
5
8073 G27
8073fa
6
For more information www.linear.com/LTM8073
LTM8073
Typical Performance Characteristics
1.50
Input vs Load Current
VOUT = –3.3V
INPUT CURRENT (A)
INPUT CURRENT (A)
2
1
0
0
1
2
3
LOAD CURRENT (A)
4
2.0
12VIN
24VIN
36VIN
48VIN
24VIN
36VIN
48VIN
1.00
INPUT CURRENT (A)
3
Input vs Load Current
VOUT = 15V
0.50
0
5
0
1
2
3
LOAD CURRENT (A)
4
1.5
0.5
0
Input vs Load Current
VOUT = –12V
1
2
LOAD CURRENT (A)
1.5
1.0
0
3
0
1
2
LOAD CURRENT (A)
DROPOUT VOLTAGE (mV)
BIAS CURRENT (mA)
8
0
1
2
SWITCHING FREQUENCY (MHz)
3
8073 G34
Input vs Load Current
VOUT = –15V
12VIN
24VIN
36VIN
1.0
0
1
LOAD CURRENT (A)
2.0
1000
500
0
0
1
2
3
LOAD CURRENT (A)
4
5
8073 G35
2
8073 G33
Dropout Voltage vs Load Current
VOUT = 5V, BIAS Open
4
0
4
1.5
0
3
INPUT CURRENT (A)
1500
12
2
3
LOAD CURRENT (A)
8073 G32
IBIAS vs Switching Frequency
VBIAS = 5V, VIN = 24V
16
1
0.5
8073 G31
20
0
2.0
0.5
0
0.5
2.5
12VIN
24VIN
36VIN
48VIN
2.0
1.0
1.0
8073 G30
INPUT CURRENT (A)
2.5
INPUT CURRENT (A)
INPUT CURRENT (A)
Input vs Load Current
VOUT = –8V
12VIN
24VIN
36VIN
48VIN
12VIN
24VIN
36VIN
48VIN
1.5
0
5
Input vs Load Current
VOUT = –5V
8073 G29
8073 G28
2.0
TA = 25°C, unless otherwise noted.
Input Current vs VIN
VOUT Shorted, DC2389A Eval Board
1.5
1.0
0.5
0
0
10
20
30
INPUT VOLTAGE (V)
40
8073 G36
8073fa
For more information www.linear.com/LTM8073
7
LTM8073
Typical Performance Characteristics
Maximum Load Current vs VIN
BIAS Tied to LTM8073 GND
TA = 25°C, unless otherwise noted.
Maximum Load Current vs VIN
BIAS Tied to LTM8073 GND
Derating, VOUT = 0.8V, BIAS = 5V,
DC2389A Demo Board
5
3
5
4
3
2
–3.3VOUT
–5VOUT
–8VOUT
1
0
20
40
INPUT VOLTAGE (V)
2
1
–12VOUT
–15VOUT
0
60
0
20
40
INPUT VOLTAGE (V)
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
2
12VIN
24VIN
36VIN
48VIN
25
50
75
100
AMBIENT TEMPERATURE (°C)
3
2
12VIN
24VIN
36VIN
48VIN
1
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
12VIN
24VIN
36VIN
48VIN
1
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
4
3
2
12VIN
24VIN
36VIN
48VIN
125
Derating, VOUT = 3.3V, BIAS = 5V,
DC2389A Demo Board
5
8073 G43
0 LFM
4
3
2
12VIN
24VIN
36VIN
48VIN
1
0
125
8073 G42
0 LFM
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
2
0
125
5
0 LFM
25
50
75
100
AMBIENT TEMPERATURE (°C)
3
Derating, VOUT = 2.5V, BIAS = 5V,
DC2389A Demo Board
5
0
4
8073 G41
Derating, VOUT = 1.8V, BIAS = 5V,
DC2389A Demo Board
0
0 LFM
4
0
125
125
5
8073 G40
1
25
50
75
100
AMBIENT TEMPERATURE (oC)
0 LFM
3
0
0
Derating, VOUT = 1.5V, BIAS = 5V,
DC2389A Demo Board
5
4
0
12VIN
24VIN
36VIN
48VIN
1
Derating, VOUT = 1.2V, BIAS = 5V,
DC2389A Demo Board
0 LFM
1
2
8073 G39
MAXIMUM LOAD CURRENT (A)
5
3
8073 G38
8073 G37
Derating, VOUT = 1V, BIAS = 5V,
DC2389A Demo Board
4
0
60
MAXIMUM LOAD CURRENT (A)
0
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
0 LFM
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8073 G44
4
3
2
12VIN
24VIN
36VIN
48VIN
1
0
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8073 G45
8073fa
8
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LTM8073
Typical Performance Characteristics
Derating, VOUT = 5V, BIAS = 5V,
DC2389A Demo Board
5
5
Derating, VOUT = 8V, BIAS = 5V,
DC2389A Demo Board
3
2
12VIN
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
4
3
2
0
125
12VIN
24VIN
36VIN
48VIN
1
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
8073 G46
24VIN
36VIN
48VIN
2
1
12VIN
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
2
1
0
125
12VIN
24VIN
36VIN
48VIN
0
8073 G50
25
50
75
100
AMBIENT TEMPERATURE (°C)
2.0
2.0
Derating, I-Grade VOUT = –15V,
BIAS Tied to LTM8073 GND,
DC2389A Demo Board
0 LFM
MAXIMUM LOAD CURRENT (A)
2
1
12VIN
24VIN
36VIN
48VIN
125
8073 G52
MAXIMUM LOAD CURRENT (A)
0 LFM
0 LFM
1.5
1.0
0.5
0
12VIN
24VIN
36VIN
48VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8073 G51
Derating, I-Grade VOUT = –12V,
BIAS Tied to LTM8073 GND,
DC2389A Demo Board
3
MAXIMUM LOAD CURRENT (A)
0 LFM
3
0
125
125
3
Derating, I-Grade VOUT = –8V,
BIAS Tied to LTM8073 GND,
DC2389A Demo Board
25
50
75
100
AMBIENT TEMPERATURE (°C)
25
50
75
100
AMBIENT TEMPERATURE (°C)
Derating, VOUT = –5V,
BIAS Tied to LTM8073 GND,
DC2389A Demo Board
8073 G49
0
0
8073 G48
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
2
0
24VIN
36VIN
48VIN
0 LFM
3
25
50
75
100
AMBIENT TEMPERATURE (°C)
1
0
125
4
0 LFM
0
2
Derating, VOUT = –3.3V,
BIAS Tied to LTM8073 GND,
DC2389A Demo Board
4
1
3
8073 G47
Derating, VOUT = 15V, BIAS = 5V,
DC2389A Demo Board
0
0 LFM
MAXIMUM LOAD CURRENT (A)
4
0
4
Derating, VOUT = 12V, BIAS = 5V,
DC2389A Demo Board
0 LFM
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
0 LFM
1
TA = 25°C, unless otherwise noted.
125
8073 G53
1.5
1.0
0.5
0
12VIN
24VIN
36VIN
0
25
50
75
100
AMBIENT TEMPERATURE (°C)
125
8073 G54
8073fa
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9
LTM8073
Typical Performance Characteristics
50
CISPR22 Class B Radiated
DC2389A Demo Board, VOUT = 5V
No Filter (FB1 Short, C8, C9 Open)
50
fSW = 1.2MHz, VIN = 28V, IOUT = 3.5A
40
AMPLITUDE (dBuV/m)
AMPLITUDE (dBuV/m)
CISPR22 Class B Radiated
DC2389A Demo Board, VOUT = 5V
No Filter (FB1 Short, C8, C9 Open)
fSW = 1.2MHz, VIN = 14V, I OUT = 3.5A
40
30
20
10
CLASS B LIMIT
HORIZONTAL
VERTICAL
0
–10
TA = 25°C, unless otherwise noted.
0
200
400
600
FREQUENCY (MHz)
800
1000
30
20
10
CLASS B LIMIT
HORIZONTAL
VERTICAL
0
–10
0
8073 G55
200
400
600
FREQUENCY (MHz)
800
1000
8073 G56
Pin Functions
GND (Bank 1, A1, A6, B3): Tie these GND pins to a
local ground plane below the LTM8073 and the circuit
components. In most applications, the bulk of the heat
flow out of the LTM8073 is through these pads, so the
printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and
Thermal Considerations sections for more details.
VIN (Bank 2): VIN supplies current to the LTM8073’s
internal regulator and to the internal power switch. These
pins must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
VOUT (Bank 3): Power Output Pins. Apply the output
filter capacitor and the output load between these pins
and GND pins.
BIAS (Pin A2): The BIAS pin connects to the internal
power bus. Connect to a power source greater than 3.2V.
If VOUT is greater than 3.2V, connect this pin to AUX.
Decouple this pin with at least 1µF if the voltage source
for BIAS is remote.
PG (Pin A3): The PG pin is the open-collector output
of an internal comparator. PG remains low until the FB
pin voltage is between 0.73V and 0.88V typical. The PG
signal is valid when VIN is above 3.4V. If VIN is above
3.4V and RUN is low, PG will drive low. If this function
is not used, leave this pin floating.
SHARE (Pin A4): Tie this to the SHARE pin of another
LTM8073 to load share. Otherwise leave floating. Do not
drive this pin.
RT (Pin A5): The RT pin is used to program the switching
frequency of the LTM8073 by connecting a resistor from
this pin to ground. The Applications Information section
of the data sheet includes a table to determine the resistance value based on the desired switching frequency.
Minimize capacitance at this pin. Do not drive this pin.
FB (Pin B1): The LTM8073 regulates its FB pin to 0.8V.
Connect the adjust resistor from this pin to ground. The
value of RFB is given by the equation RFB = 199.7/(VOUT
– 0.8), where RFB is in kΩ.
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LTM8073
Pin Functions
AUX (Pin B2): Low Current Voltage Source for BIAS.
In many designs, the BIAS pin is simply connected to
VOUT. The AUX pin is internally connected to VOUT and
is placed adjacent to the BIAS pin to ease printed circuit board routing. Also, some applications require a
feed-forward capacitor; it can be connected from AUX
to FB for convenient PCB routing. Although this pin is
internally connected to VOUT, it is not intended to deliver
a high current, so do not draw current from this pin to
the load.
pulse-skipping mode with spread spectrum modulation.
4) Synchronization mode. Drive this pin with a clock
source to synchronize to an external frequency. During
synchronization the part will operate in pulse-skipping
mode.
TR/SS (Pin B5): The TR/SS pin is used to provide a
soft-start or tracking function. The internal 2μA pull-up
current in combination with an external capacitor tied
to this pin creates a voltage ramp. If TR/SS is less than
0.8V, the FB voltage tracks to this value. For tracking, tie
a resistor divider to this pin from the tracked output. This
pin is pulled to ground with an internal MOSFET during
shutdown and fault conditions; use a series resistor if
driving from a low impedance output. This pin may be
left floating if the tracking function is not needed.
SYNC (Pin B4): External clock synchronization input
and operational mode. This pin programs four different
operating modes: 1) Burst Mode®. Tie this pin to ground
for Burst Mode operation at low output loads—this
will result in low quiescent current. 2) Pulse-skipping
mode. Float this pin for pulse-skipping mode. This mode
offers full frequency operation down to low output loads
before pulse-skipping mode occurs. 3) Spread spectrum
mode. Tie this pin high (between 2.9V and 4.2V) for
RUN (Pin B6): Pull the RUN pin below 0.9V to shut down
the LTM8073. Tie to 1.06V or more for normal operation. If the shutdown feature is not used, tie this pin to
the VIN pin.
Block Diagram
BIAS
VIN
AUX
0.2µF
2.2µH
CURRENT
MODE
CONTROLLER
VOUT
249k
10pF
0.1µF
GND
FB
RUN
SHARE
TR/SS
SYNC
RT
PG
8073 BD
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11
LTM8073
Operation
The LTM8073 is a standalone nonisolated step-down
switching DC/DC power supply that can deliver up to 5A.
The continuous current is determined by the internal operating temperature. It provides a precisely regulated output
voltage programmable via one external resistor from 0.8V
to 15V. The input voltage range is 3.4V to 60V. Given that
the LTM8073 is a step-down converter, make sure that the
input voltage is high enough to support the desired output
voltage and load current. A simplified Block Diagram is
given on the previous page.
The LTM8073 contains a current mode controller, power
switching elements, power inductor and a modest amount
of input and output capacitance. The LTM8073 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
An internal regulator provides power to the control circuitry. This bias regulator normally draws power from the
VIN pin, but if the BIAS pin is connected to an external
voltage higher than 3.2V, bias power is drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN pin is used to place
the LTM8073 in shutdown, disconnecting the output and
reducing the input current to a few μA.
To enhance efficiency, the LTM8073 automatically
switches to Burst Mode operation in light or no load
situations. Between bursts, all circuitry associated with
controlling the output switch is shut down reducing the
input supply current.
The oscillator reduces the LTM8073’s operating frequency
when the voltage at the FB pin is low. This frequency foldback helps to control the output current during start-up
and overload.
The TR/SS node acts as an auxiliary input to the error
amplifier. The voltage at FB servos to the TR/SS voltage
until TR/SS goes above about 0.8V. Soft-start is implemented by generating a voltage ramp at the TR/SS pin
using an external capacitor which is charged by an internal
constant current. Alternatively, driving the TR/SS pin with
a signal source or resistive network provides a tracking
function. Do not drive the TR/SS pin with a low impedance voltage source. See the Applications Information
section for more details.
The LTM8073 contains a power good comparator which
trips when the FB pin is between 0.73V and 0.88V, typical.
The PG output is an open-drain transistor that is off when
the output is in regulation, allowing an external resistor
to pull the PG pin high. The PG signal is valid when VIN
is above 3.4V. If VIN is above 3.4V and RUN is low, PG
will drive low.
The LTM8073 is equipped with a thermal shutdown that
inhibits power switching at high junction temperatures.
The activation threshold of this function is above 125°C to
avoid interfering with normal operation, so prolonged or
repetitive operation under a condition in which the thermal
shutdown activates may damage or impair the reliability
of the device.
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LTM8073
Applications Information
For most applications, the design process is straightforward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RFB and RT values.
3. Apply the CFF (from AUX to FB) capacitor as required.
4. Connect BIAS as indicated.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions. Bear in mind that the maximum
output current is limited by junction temperature, the
relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the
graphs in the Typical Performance Characteristics section
for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8073 should be allowed to switch is given
in Table 1 in the Maximum fSW column, while the recommended frequency (and RT value) for optimal efficiency
over the given input condition is given in the fSW column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Table 1. Recommended Component Values and Configuration (TA = 25°C)
VIN (Note 1)
VOUT
RFB
CIN (Note 2)
COUT
CFF
BIAS
fSW
RT
MAX fSW
MIN RT
3.4V to 60V
0.8V
Open
1µF 100V 1206 X7R
2× 100µF 4V 0805 X5R
47pF
5V
450kHz
95.3k
475kHz
90.9k
3.4V to 60V
1V
1M
1µF 100V 1206 X7R
2× 100µF 4V 0805 X5R
47pF
5V
450kHz
95.3k
550kHz
76.8k
3.4V to 60V
1.2V
499k
1µF 100V 1206 X7R
2× 100µF 4V 0805 X5R
47pF
5V
500kHz
84.5k
650kHz
63.4k
3.4V to 60V
1.5V
287k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
27pF
5V
500kHz
84.5k
750kHz
54.9k
3.4V to 60V
1.8V
200k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
10pF
5V
500kHz
84.5k
900kHz
45.6k
2V
169k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
5V
600kHz
64.8k
950kHz
42.2k
4V to 60V
3.4V to 60V
2.5V
118k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
5V
800kHz
51.1k
1.2MHz
32.4K
5V to 60V
3.3V
80.6k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
5V
850kHz
47.5k
1.5MHz
24.3k
7V to 60V
5V
47.5k
1µF 100V 1206 X7R
100µF 6.3V 1206 X5R
5V
1.2MHz
32.4k
2.2MHz
16.9k
11V to 60V
8V
28k
1µF 100V 1206 X7R
47µF 16V 1210 X7R
5V
1.4MHz
26.7k
3MHZ
10k
16V to 60V
12V
17.8k
1µF 100V 1206 X7R
22µF 25V 1210 X5R
5V
1.4MHz
26.7k
3MHZ
10k
19.5V to 60V
15V
14.3k
1µF 100V 1206 X7R
22µF 25V 1210 X5R
5V
1.4MHz
26.7k
3MHZ
10k
3.4V to 56V
–3.3V
80.6k
1µF 100V 1206 X7R
100µF 4V 0805 X5R
LTM8073
GND
850kHz
47.5k
1.5MHz
24.3k
3.4V to 55V
–5V
47.5k
1µF 100V 1206 X7R
100µF 6.3V 1206 X5R
LTM8073
GND
1.2MHz
32.4k
2.2MHz
16.9k
3.4V to 52V
–8V
28k
1µF 100V 1206 X7R
47µF 16V 1210 X7R
LTM8073
GND
1.4MHz
26.7k
3MHZ
10k
3.4V to 48V
–12V
17.8k
1µF 100V 1206 X7R
22µF 25V 1210 X5R
LTM8073
GND
1.4MHz
26.7k
3MHZ
10k
3.4V to 45V
–15V
14.3k
1µF 100V 1206 X7R
22µF 25V 1210 X5R
LTM8073
GND
1.4MHz
26.7k
3MHZ
10k
Note 1: The LTM8073 may be capable of lower input voltages but may skip switching cycles.
Note 2: An input bulk capacitor is required.
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LTM8073
Applications Information
Capacitor Selection Considerations
Frequency Selection
The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating
conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in
undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response,
if it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
The LTM8073 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to
3MHz by using a resistor tied from the RT pin to ground.
Table 2 provides a list of RT resistor values and their resultant frequencies.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than
expected.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8073’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8073 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8073. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8073 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Table 2. SW Frequency vs RT Value
fSW (MHz)
RT (kΩ)
0.2
232
0.3
150
0.4
110
0.5
84.5
0.6
64.8
0.7
60.4
0.8
51.1
1.0
40.2
1.2
32.4
1.4
28.0
1.6
23.7
1.8
20.5
2.0
16.9
2.2
15.8
3.0
10
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating condition. System level or other considerations,
however, may necessitate another operating frequency.
While the LTM8073 is flexible enough to accommodate
a wide range of operating frequencies, a haphazardly
chosen one may result in undesirable operation under
certain operating or fault conditions. A frequency that is
too high can reduce efficiency, generate excessive heat
or even damage the LTM8073 if the output is overloaded
or short-circuited. A frequency that is too low can result
in a final design that has too much output ripple or too
large of an output capacitor.
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LTM8073
Applications Information
BIAS Pin Considerations
The BIAS pin is used to provide drive power for the internal power switching stage and operate other internal circuitry. For proper operation, it must be powered by at
least 3.2V. If the output voltage is programmed to 3.2V
or higher, BIAS may be simply tied to AUX. If VOUT is less
than 3.2V, BIAS can be tied to VIN or some other voltage
source. If the BIAS pin voltage is too high, the efficiency
of the LTM8073 may suffer. The optimum BIAS voltage is
dependent upon many factors, such as load current, input
voltage, output voltage and switching frequency. In all
cases, ensure that the maximum voltage at the BIAS pin
is less than 19V. If BIAS power is applied from a remote
or noisy voltage source, it may be necessary to apply a
decoupling capacitor locally to the pin. A 1µF ceramic
capacitor works well. The BIAS pin may also be left open
at the cost of a small degradation in efficiency.
If the LTM8073 is configured to provide a negative output,
do not connect BIAS to VOUT or AUX. Instead, tie to BIAS
to the LTM8073 GND, which should be the negative output.
Maximum Load
The maximum practical continuous load that the LTM8073
can drive, while rated at 3A, actually depends upon both
the internal current limit and the internal temperature.
The internal current limit is designed to prevent damage
to the LTM8073 in the case of overload or short-circuit.
The internal temperature of the LTM8073 depends upon
operating conditions such as the ambient temperature,
the power delivered, and the heat sinking capability of the
system. For example, if the LTM8073 is configured to regulate at 1.2V, it may continuously deliver 4.5A from 12VIN
if the ambient temperature is controlled to less than 55°C;
this is more than the 3A continuous rating. Please see the
derating curve for VOUT = 1.2V in the Typical Performance
Characteristics section. Similarly, if the output voltage is
15V and the ambient temperature is 95°C, the LTM8073
will deliver at most 2A from 24VIN, which is less than the
3A continuous rating.
paralleled LTM8073s together. To ensure that paralleled
modules start up together, the TR/SS pins may be tied
together, as well. If it is inconvenient to tie the TR/SS pins
together, make sure that the same valued soft-start capacitors are used for each µModule regulator. An example of
two LTM8073s configured for load sharing is given in the
Typical Applications section.
For closer load sharing, synchronize the LTM8073s to an
external clock source. When load sharing among n units
and using a single RFB resistor, the value of the resistor is:
RFB =
199.7
n ( VOUT – 0.8 )
where RFB is in kΩ.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8073 automatically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst
Mode operation, the LTM8073 delivers single cycle bursts
of current to the output capacitor followed by sleep periods where most of the internal circuitry is powered off
and energy is delivered to the load by the output capacitor.
During the sleep time, VIN and BIAS quiescent currents
are greatly reduced, so, as the load current decreases
towards a no load condition, the percentage of time that
the LTM8073 operates in sleep mode increases and the
average input current is greatly reduced, resulting in
higher light load efficiency.
Burst Mode operation is enabled by tying SYNC to GND.
Minimum Input Voltage
The LTM8073 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. Keep the input above 3.4V to ensure proper
operation. Voltage transients or ripple valleys that cause
the input to fall below 3.4V may turn off the LTM8073.
Load Sharing
Output Voltage Tracking and Soft-Start
LTM8073s may be paralleled to produce higher currents.
To do this, tie the VIN, VOUT and SHARE pins of all the
The LTM8073 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 2μA
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LTM8073
Applications Information
pulls up the TR/SS pin to about 2.4V. Putting an external
capacitor on TR/SS enables soft starting the output to
reduce current surges on the input supply. During the softstart ramp the output voltage will proportionally track the
TR/SS pin voltage. For output tracking applications, TR/SS
can be externally driven by another voltage source. From
0V to 0.8V, the TR/SS voltage will override the internal
0.8V reference input to the error amplifier, thus regulating
the FB pin voltage to that of the TR/SS pin. When TR/SS is
above 0.8V, tracking is disabled and the feedback voltage
will regulate to the internal reference voltage. The TR/SS
pin may be left floating if the function is not needed.
pin, the SYNC pin is floated or held high, the frequency
foldback is disabled and the switching frequency will slow
down only during overcurrent conditions.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the RUN pin transitioning low, VIN voltage
falling too low, or thermal shutdown.
The LTM8073 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LTM8073
may be synchronized over a 200kHz to 3MHz range. The RT
resistor should be chosen to set the LTM8073 switching
frequency equal to or below the lowest synchronization
input. For example, if the synchronization signal will be
500kHz and higher, the RT should be selected for 500kHz.
Prebiased Output
As discussed in the Output Voltage Tracking and Soft-Start
section, the LTM8073 regulates the output to the FB voltage determined by the TR/SS pin whenever TR/SS is less
than 0.8V. If the LTM8073 output is higher than the target
output voltage, the LTM8073 will attempt to regulate the
output to the target voltage by returning a small amount
of energy back to the input supply. If there is nothing loading the input supply, its voltage may rise. Take care that
it does not rise so high that the input voltage exceeds the
absolute maximum rating of the LTM8073.
Frequency Foldback
The LTM8073 is equipped with frequency foldback which
acts to reduce the thermal and energy stress on the internal power elements during a short-circuit or output overload condition. If the LTM8073 detects that the output
has fallen out of regulation, the switching frequency is
reduced as a function of how far the output is below the
target voltage. This in turn limits the amount of energy
that can be delivered to the load under fault. During the
start-up time, frequency foldback is also active to limit
the energy delivered to the potentially large output capacitance of the load. When a clock is applied to the SYNC
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below about 0.4V (this can be ground or a logic low
output). To synchronize the LTM8073 oscillator to an
external frequency connect a square wave (with about
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.4V
and peaks above 1.5V.
For some applications it is desirable for the LTM8073 to
operate in pulse-skipping mode, offering two major differences from Burst Mode operation. The first is that the
clock stays awake at all times and all switching cycles
are aligned to the clock. Second is that full switching frequency is reached at lower output load than in Burst Mode
operation. These two differences come at the expense
of increased quiescent current. To enable pulse-skipping
mode, the SYNC pin is floated.
The LTM8073 features spread spectrum operation to further reduce EMI/EMC emissions. To enable spread spectrum operation, apply between 2.9V and 4.2V to the SYNC
pin. In this mode, triangular frequency modulation is used
to vary the switching frequency between the value programmed by RT to about 20% higher than that value. The
modulation frequency is about 3kHz. For example, when
the LTM8073 is programmed to 2MHz, the frequency will
vary from 2MHz to 2.4MHz at a 3kHz rate. When spread
spectrum operation is selected, Burst Mode operation is
disabled, and the part will run in pulse-skipping mode.
The LTM8073 does not operate in forced continuous
mode regardless of SYNC signal.
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LTM8073
Applications Information
Negative Output
VIN
The LTM8073 is capable of generating a negative output
voltage by connected its VOUT to system GND and the
LTM8073 GND to the negative voltage rail. An example
of this is shown in the Typical Applications section. The
most versatile way to generate a negative output is to
use a dedicated regulator that was designed to generate
a negative voltage, but using a buck regulator like the
LTM8073 to generate a negative voltage is a simple and
cost effective solution, as long as certain restrictions are
kept in mind.
Figure 1a shows a typical negative output voltage application. Note that LTM8073 VOUT is tied to system GND and
input power is applied from VIN to LTM8073 VOUT. As a
result, the LTM8073 is not behaving as a true buck regulator, and the maximum output current is depends upon
the input voltage. In the example shown in the Typical
Applications section, there is an attending graph that
shows how much current the LTM8073 deliver for given
input voltages.
VIN
VIN
VIN
VOUT
LTM8073
GND
FAST LOAD
TRANSIENT
OUTPUT
TRANSIENT
RESPONSE
8073 F01b
Figure 1b. Any Output Voltage Transient Appears on
LTM8073 GND
The CIN and COUT capacitors in figure 1c form an AC
divider at the negative output voltage node. If VIN is hotplugged or rises quickly, the resultant VOUT will be a positive transient, which may be unhealthy for the application
load. An antiparallel Schottky diode may be able to prevent this positive transient from damaging the load. The
location of this Schottky diode is important. For example,
in a system where the LTM8073 is far away from the load,
placing the Schottky diode closest to the most sensitive
load component may be the best design choice. Carefully
evaluate whether the negative buck configuration is suitable for the application.
VOUT
FAST VIN
TRANSIENT
LTM8073
OUTPUT EXPERIENCES
A POSITIVE TRANSIENT
VIN
GND
VIN
NEGATIVE
OUTPUT VOLTAGE
8073 F01a
CIN
Figure 1a. The LTM8073 Can Be Used to Generate a
Negative Voltage
Note that this configuration requires that any load current
transient will directly impress the transient voltage onto
the LTM8073 GND, as shown in Figure 1b, so fast load
transients can disrupt the LTM8073’s operation or even
cause damage. Carefully evaluate whether the negative
buck configuration is suitable for the application.
VOUT
LTM8073
COUT
GND
AC DIVIDER
OPTIONAL
SCHOTTKY
DIODE
8073 F01c
Figure 1c. A Schottky Diode Can Limit the Transient
Caused by a Fast Rising VIN to Safe Levels
If the LTM8073 is configured to provide a negative output,
do not connect BIAS to VOUT or AUX. Instead, tie to BIAS to
the LTM8073 GND, which should be the negative output.
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LTM8073
Applications Information
Shorted Input Protection
Care needs to be taken in systems where the output is
held high when the input to the LTM8073 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode OR-ed with the LTM8073’s output. If the VIN pin
is allowed to float and the RUN pin is held high (either
by a logic signal or because it is tied to VIN), then the
LTM8073’s internal circuitry pulls its quiescent current
through its internal power switch. This is fine if your
system can tolerate a few milliamps in this state. If you
ground the RUN pin, the internal current drops to essentially zero. However, if the VIN pin is grounded while the
output is held high, parasitic diodes inside the LTM8073
can pull large currents from the output through the VIN
pin. Figure 2 shows a circuit that runs only when the input
voltage is present and that protects against a shorted or
reversed input.
VIN
VIN
LTM8073
RUN
8073 F02
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8073 Runs Only
When the Input Is Present.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8073. The LTM8073 is nevertheless a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
A few rules to keep in mind are:
1. Place CFF, RFB and RT as close as possible to their
respective pins.
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8073.
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8073.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent to or underneath
the LTM8073.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8073.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of
the thermal vias in Figure 3. The LTM8073 can benefit
from the heat-sinking afforded by vias that connect
to internal GND planes at these locations, due to their
proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
8073fa
18
For more information www.linear.com/LTM8073
LTM8073
Applications Information
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit.
VIN
CIN
GND
GND
RUN
RT
Thermal Considerations
RT TR/SS
SHARE SYNC
PC
BIAS AUX
FB
RFB
GND
COUT
VOUT
GND/THERMAL VIAS
8073 F03
Figure 3. Layout Showing Suggested External Components, GND
Plane and Thermal Vias
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8073. However, these capacitors can cause problems if the LTM8073 is plugged into
a live supply (see Linear Technology Application Note
88 for a complete discussion). The low loss ceramic
capacitor combined with stray inductance in series with
the power source forms an underdamped tank circuit,
and the voltage at the VIN pin of the LTM8073 can ring
to more than twice the nominal input voltage, possibly
exceeding the LTM8073’s rating and damaging the part.
If the input supply is poorly controlled or the LTM8073 is
hot-plugged into an energized supply, the input network
should be designed to prevent this overshoot. This can
be accomplished by installing a small resistor in series
to VIN, but the most popular method of controlling input
voltage overshoot is add an electrolytic bulk cap to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
The LTM8073 output current may need to be derated if
it is required to operate in a high ambient temperature.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature.
The derating curves given in the Typical Performance
Characteristics section can be used as a guide. These
curves were generated by the LTM8073 mounted to a
58cm2 4-layer FR4 printed circuit board. Boards of other
sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions.
For increased accuracy and fidelity to the actual application, many designers use FEA (finite element analysis) to
predict thermal performance. To that end, Page 2 of the
data sheet typically gives four thermal coefficients:
θJA – Thermal resistance from junction to ambient
θJCbottom – Thermal resistance from junction to the bottom of the product case
θJCtop – Thermal resistance from junction to top of the
product case
θJB – Thermal resistance from junction to the printed circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as still
8073fa
For more information www.linear.com/LTM8073
19
LTM8073
Applications Information
air although natural convection causes the air to move.
This value is determined with the part mounted to a JESD
51-9 defined test board, which does not reflect an actual
application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through
the bottom of the package. In the typical µModule regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test conditions don’t generally match the user’s application.
θJCtop is determined with nearly all of the component
power dissipation flowing through the top of the package. As the electrical connections of the typical µModule
regulator are on the bottom of the package, it is rare for
an application to operate such that most of the heat flows
from the junction to the top of the part. As in the case of
θJCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the
user’s application.
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is often just
the sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that
none of these thermal coefficients reflects an actual physical operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 4. The blue resistances are contained
within the µModule regulator, and the green are outside.
The die temperature of the LTM8073 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8073. The bulk of the heat flow out of the LTM8073 is
through the bottom of the package and the pads into the
printed circuit board. Consequently a poor printed circuit
board design can cause excessive heating, resulting in
impaired performance or reliability. Please refer to the PCB
Layout section for printed circuit board design suggestions.
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
AMBIENT
BOARD-TO-AMBIENT
RESISTANCE
8073 F04
µMODULE REGULATOR
Figure 4: Graphical Representation of the Thermal Resistances Between the Device Junction and Ambient
8073fa
20
For more information www.linear.com/LTM8073
LTM8073
Typical Applications
15VOUT from 19.5VIN to 60VIN Step-Down Converter. BIAS Is Tied to AUX
LTM8073
VIN
VIN
19.5V TO 60V
BIAS
AUX
RUN
1µF
VOUT
15V
2.7A
VOUT
RT
26.7k
1.4MHz
FB
GND
22µF
SYNC
14.3k
8073 TA02
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
1.2VOUT from 3.4VIN to 60VIN Step-Down Converter. BIAS Is Tied to an External 3.3V Source
LTM8073
VIN
VIN
3.4V TO 60V
RUN
1µF
EXT 3.3V
VOUT
AUX
BIAS
RT
47pf
GND
SYNC
FB
100µF
×2
VOUT
1.2V
3.5A
499k
84.5k
500kHz
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
8073 TA03
2.5VOUT from 4VIN to 15VIN Step-Down Converter. BIAS Is Tied to VIN
LTM8073
VIN
VIN
4V TO 15V
RUN
BIAS
VOUT
1µF
100µF
RT
51.1k
800kHz
GND
SYNC
FB
VOUT
2.5V
3.3A
118k
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE, AUX
8073 TA04
8073fa
For more information www.linear.com/LTM8073
21
LTM8073
Typical Applications
–5VOUT from 3.4VIN to 55VIN Positive to Negative Converter. BIAS Tied to LTM8073 GND
Maximum Load Current vs VIN,
BIAS Tied to LTM8073 GND
INPUT BULK CAP
5
VIN
LTM8073
RUN
OPTIONAL
SCHOTTKY
DIODE
VOUT
1µF
32.4k
1.2MHz
RT
FB
GND
SYNC BIAS
100µF
47.5k
VOUT
–5V
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE, AUX
MAXIMUM LOAD CURRENT (A)
+
VIN
3.4V TO 35V
4
3
2
1
0
8073 TA05a
0
20
40
INPUT VOLTAGE (V)
60
8073 TA05b
Use Two LTM8073s Powered from the Same Input Source to Get More Output Current
VIN
VIN
7V TO 40V
LTM8073
BIAS
AUX
RUN
1µF
VOUT
3.3V
6.5A CONTINUOUS
10A PEAK
VOUT
RT
47.5k
850kHz
FB
TR/SS
GND
SYNC SHARE
100µF
OPTIONAL
SYNC
TR/SS
VIN
LTM8073
SHARE
BIAS
AUX
RUN
1µF
VOUT
RT
47.5k
850kHz
100µF
FB
GND
SYNC
40.2k
OPTIONAL
SYNC
PIN NOT USED IN THIS CIRCUIT: PG
8073 TA06
8073fa
22
For more information www.linear.com/LTM8073
LTM8073
Package Description
Table 3. LTM8073 Pinout (Sorted by Pin Number)
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
A1
GND
B1
FB
C1
GND
D1
GND
E1
GND
F1
GND
G1
VOUT
H1
VOUT
A2
BIAS
B2
AUX
C2
GND
D2
GND
E2
GND
F2
GND
G2
VOUT
H2
VOUT
A3
PG
B3
GND
C3
VIN
D3
GND
E3
GND
F3
GND
G3
VOUT
H3
VOUT
A4
SHARE
B4
SYNC
C4
VIN
D4
GND
E4
GND
F4
GND
G4
VOUT
H4
VOUT
A5
RT
B5
TR/SS
C5
VIN
D5
GND
E5
GND
F5
GND
G5
VOUT
H5
VOUT
A6
GND
B6
RUN
C6
VIN
D6
GND
E6
GND
F6
GND
G6
VOUT
H6
VOUT
Package Photos
8073fa
For more information www.linear.com/LTM8073
23
aaa Z
0.50 ±0.025 Ø 48x
2.5
2.5
SUGGESTED PCB LAYOUT
TOP VIEW
1.5
PACKAGE TOP VIEW
E
0.000
4
0.5
PIN “A1”
CORNER
0.5
24
1.5
Y
For more information www.linear.com/LTM8073
3.5
2.5
1.5
0.5
0.000
0.5
1.5
2.5
3.5
X
D
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
aaa Z
NOM
3.32
0.50
2.82
0.60
0.50
9.00
6.25
1.00
7.00
5.00
0.32
2.50
DIMENSIONS
0.37
2.55
0.15
0.10
0.20
0.25
0.10
MAX
3.52
0.60
2.92
0.70
0.53
TOTAL NUMBER OF BALLS: 48
0.27
2.45
H1
SUBSTRATE
A1
ddd M Z X Y
eee M Z
DETAIL A
Øb (48 PLACES)
// bbb Z
MIN
3.12
0.40
2.72
0.50
0.47
b1
DETAIL B
H2
MOLD
CAP
ccc Z
MOLD CAP HT
SUBSTRATE THK
BALL DIMENSION
PAD DIMENSION
BALL HT
NOTES
DETAIL B
PACKAGE SIDE VIEW
A2
A
Z
F
e
b
6
4
G
3
e
2
PACKAGE BOTTOM VIEW
b
5
1
DETAIL A
PIN 1
3
SEE NOTES
H
G
F
E
D
C
B
A
7
SEE NOTES
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
BALL DESIGNATION PER JEP95
7
TRAY PIN 1
BEVEL
!
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
BGA 48 0217 REV A
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
COMPONENT
PIN “A1”
(Reference LTC DWG # 05-08-1999 Rev A)
BGA Package
48-Lead (9mm × 6.25mm × 3.32mm)
LTM8073
Package Description
Please refer to http://www.linear.com/product/LTM8073#packaging for the most recent package drawings.
8073fa
LTM8073
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
08/17
Changed recomended BIAS pin connection from Open to LTM8073 GND for the negative voltage output application.
5, 8, 9, 13, 22
Updated derating curves.
Changed minimum storage temperature from –50°C to –55°C.
8, 9
2
8073fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more
www.linear.com/LTM8073
tion that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
25
LTM8073
Typical Application
1VOUT from 3.4VIN to 60VIN Step-Down Converter with Spread Spectrum. BIAS Is Tied to an External 3.3V Source
LTM8073
VIN
VIN
3.4V TO 60V
RUN
1µF
EXT 3.3V
VOUT
BIAS
SYNC
AUX
47pF
GND
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG, SHARE
FB
RT
100µF
×2
VOUT
1V
3.4A
8073 TA07
95.3k
450kHz
Design Resources
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
LTM8050
58V, 2A Step-Down µModule Regulator
3.6V ≤ VIN ≤ 58V, 0.8V ≤ VOUT ≤ 24V, 9mm × 15mm × 4.92mm BGA
LTM8027
60V, 4A Step-Down µModule Regulator
4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, 15mm × 15mm × 4.92mm BGA
LTM8064
58V, 6A CVCC Step-Down µModule Regulator
6V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 36V, 11.9mm × 16mm × 4.92mm BGA
LTM8056
58VIN, 48VOUT Buck-Boost µModule Regulator
5V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 48V, 15mm × 15mm × 4.92mm BGA
LTM8053
40V, 3.5A/6A Step Down Silent Switcher µModule Regulator
3.4V ≤ VIN ≤ 40V, 0.97V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA
LTM8003
LTM8053 with H-Grade (150°C Operation) and FMAE Compliant 3.4V ≤ VIN ≤ 40V. 0.97V ≤ VOUT ≤ 18V, 6.25mm × 9mm × 3.32mm BGA
Pinout
LTM8032
36V, 2A Low EMI Step-Down µModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, EN55022B Compliant
LTM8033
36V, 3A Low EMI Step-Down µModule Regulator
3.6V ≤ VIN ≤ 36V. 0.8V ≤ VOUT ≤ 24V, EN55022B Compliant
8073fa
26
LT 0817 REV A • PRINTED IN USA
For more information www.linear.com/LTM8073
www.linear.com/LTM8073
 LINEAR TECHNOLOGY CORPORATION 2017
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