To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. HD74LV32A Quad. 2-input OR Gates REJ03D0311–0300Z (Previous ADE-205-243A (Z)) Rev.3.00 Jun. 01, 2004 Description The HD74LV32A has four two-input OR gates in a 14-pin package. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74LV32AFPEL SOP–14 pin(JEITA) FP–14DAV FP EL (2,000 pcs/reel) HD74LV32ARPEL HD74LV32ATELL SOP–14 pin(JEDEC) TSSOP–14 pin FP–14DNV TTP–14DV RP T EL (2,500 pcs/reel) ELL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs A B Output Y H X L X H L H H L Note: H: High level L: Low level X: Immaterial Rev.3.00 Jun. 01, 2004 page 1 of 8 HD74LV32A Pin Arrangement 14 VCC 1A 1 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2Y 6 9 3A GND 7 8 3Y (Top view) Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input voltage range*1 Output voltage range*1, 2 VCC VI VO V V V Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation at Ta = 25°C (in still air) *3 IIK IOK IO –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 –20 ±50 ±25 ±50 Storage temperature Tstg ICC or IGND PT 785 500 –65 to 150 mA mA mA mA mW Conditions Output: H or L VCC: OFF VI < 0 VO < 0 or VO > VCC VO = 0 to VCC SOP TSSOP °C Notes: The absolute maximum ratings are values, which must not be exceeded however briefly. In addition, two or more items must not reach their limit values at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. Rev.3.00 Jun. 01, 2004 page 2 of 8 HD74LV32A Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC Input voltage range Output voltage range Output current VI VO IOH 2.0 0 0 — — — — — — — — 0 0 0 5.5 5.5 VCC –50 –2 –6 –12 50 2 6 12 200 100 20 V V V µA mA –40 85 °C IOL Input transition rise or fall rate ∆t/∆v Operating free-air temperature Ta Conditions VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V µA mA ns/V Note: Unused or floating inputs must be held high or low. Logic Diagram A B Rev.3.00 Jun. 01, 2004 page 3 of 8 Y HD74LV32A DC Electrical Characteristics Ta = –40 to 85°C Item Symbol VCC (V)* Min Typ Max Unit Input voltage VIH 1.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 — — — — VCC – 0.1 2.0 2.48 3.8 — — — — — — — — — — — — — — — — — — — — — — — — — — — — 0.5 VCC × 0.3 VCC × 0.3 VCC × 0.3 — — — — 0.1 0.4 0.44 0.55 ±1 20 V Input current Quiescent supply current IIN ICC 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min to Max 2.3 3.0 4.5 Min to Max 2.3 3.0 4.5 0 to 5.5 5.5 Output leakage current IOFF 0 — — Input capacitance CIN 3.3 — 3.3 VIL Output voltage VOH VOL Test Conditions µA µA IOH = –50 µA IOH = –2 mA IOH = –6 mA IOH = –12 mA IOL = 50 µA IOL = 2 mA IOL = 6 mA IOL = 12 mA VIN = 5.5 V or GND VIN = VCC or GND, IO = 0 5 µA VI or VO = 0 V to 5.5 V — pF VI = VCC or GND V Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. Switching Characteristics VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL — — 7.1 9.6 12.8 16.2 1.0 1.0 15.0 19.0 ns Test Conditions FROM (Input) TO (Output) CL = 15 pF CL = 50 pF A or B Y Test Conditions FROM (Input) TO (Output) CL = 15 pF CL = 50 pF A or B Y VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL — — 5.0 6.9 7.9 11.4 1.0 1.0 9.5 13.0 ns VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Propagation delay time tPLH tPHL — — 3.6 4.9 5.5 7.5 1.0 1.0 6.5 8.5 ns Rev.3.00 Jun. 01, 2004 page 4 of 8 Test Conditions FROM (Input) TO (Output) CL = 15 pF CL = 50 pF A or B Y HD74LV32A Operating Characteristics CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Test Conditions Power dissipation capacitance CPD 3.3 5.0 — — 9.5 11.5 — — pF f = 10 MHz Noise Characteristics CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Quiet output, maximum dynamic VOL VOL (P) 3.3 — 0.2 0.8 V Quiet output, minimum dynamic VOL VOL (V) 3.3 — –0.1 –0.8 V Quiet output, minimum dynamic VOH VOH (V) 3.3 — 3.1 — V High-level dynamic input voltage VIH (D) 3.3 2.31 — — V Low-level dynamic inout voltage VIL (D) 3.3 — — 0.99 V Rev.3.00 Jun. 01, 2004 page 5 of 8 Test Conditions HD74LV32A Test Circuit Measurement point C L* Note: C L includes the probe and jig capacitance. • Waveform − 1 tr tf 90% 50% VCC Input VCC 90% 50% VCC 10% 10% t PHL t PLH 0V VOH In phase output 50% VCC 50% VCC VOL t PHL t PLH VOH Out of phase output 50% VCC 50% VCC VOL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t r ≤ 3 ns, t f ≤ 3 ns 2. The output are measured one at a time with one at a time with one transition per measurement. Rev.3.00 Jun. 01, 2004 page 6 of 8 HD74LV32A Package Dimensions As of January, 2003 Unit: mm 10.06 10.5 Max 8 5.5 14 1 1.42 Max *0.20 ± 0.05 2.20 Max 7 *0.40 ± 0.06 1.15 0˚ – 8˚ 0.10 ± 0.10 1.27 0.20 7.80 +– 0.30 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass (reference value) *Ni/Pd/Au plating FP-14DAV — Conforms 0.23 g As of January, 2003 Unit: mm 8.65 9.05 Max 8 1 7 *0.20 ± 0.05 0.635 Max 1.75 Max 3.95 14 + 0.10 6.10 – 0.30 1.08 + 0.67 0.14 – 0.04 *0.40 ± 0.06 + 0.11 0˚ – 8˚ 1.27 0.60 – 0.20 0.15 0.25 M *Ni/Pd/Au plating Rev.3.00 Jun. 01, 2004 page 7 of 8 Package Code JEDEC JEITA Mass (reference value) FP-14DNV Conforms Conforms 0.13 g HD74LV32A As of January, 2003 Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 1.0 *0.20 ± 0.05 0.13 M 6.40 ± 0.20 *Ni/Pd/Au plating Rev.3.00 Jun. 01, 2004 page 8 of 8 0.07 +0.03 –0.04 0.10 *0.15 ± 0.05 1.10 Max 0.83 Max 0˚ – 8˚ 0.50 ± 0.10 Package Code JEDEC JEITA Mass (reference value) TTP-14DV — — 0.05 g Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. 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