ACS86MS Radiation Hardened Quad 2-Input Exclusive OR Gate April 1995 Features Pinouts 14 LEAD CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T14, LEAD FINISH C TOP VIEW • 1.25 Micron Radiation Hardened SOS CMOS • Total Dose 300K RAD (Si) • Single Event Upset (SEU) Immunity <1 x 10-10 Errors/Bit-Day (Typ) A1 1 14 VCC • SEU LET Threshold >80 MEV-cm2/mg B1 2 13 B4 Y1 3 12 A4 • Latch-Up Free Under Any Conditions A2 4 11 Y4 • Military Temperature Range: -55oC to +125oC B2 5 10 B3 Y2 6 9 A3 GND 7 8 Y3 11 • Dose Rate Upset >10 RAD (Si)/s, 20ns Pulse • Significant Power Reduction Compared to ALSTTL Logic • DC Operating Voltage Range: 4.5V to 5.5V • Input Logic Levels - VIL = 30% of VCC Max 14 LEAD CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR, CDFP3-F14, LEAD FINISH C TOP VIEW - VIH = 70% of VCC Min • Input Current ≤1µA at VOL, VOH A1 1 14 VCC B1 2 13 B4 The Intersil ACS86MS is a radiation hardened quad 2-input exclusive OR gate. A high logic level on both inputs forces the output to a logic low state. Y1 3 12 A4 A2 4 11 Y4 B2 5 10 B3 The ACS86MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family. Y2 6 9 A3 GND 7 8 Y3 Description Ordering Information PART NUMBER TEMPERATURE RANGE ACS86DMSR -55oC ACS86KMSR -55oC SCREENING LEVEL PACKAGE to +125oC Intersil Class S Equivalent 14 Lead SBDIP to +125oC Intersil Class S Equivalent 14 Lead Ceramic Flatpack ACS86D/Sample +25oC Sample 14 Lead SBDIP ACS86K/Sample +25oC Sample 14 Lead Ceramic Flatpack ACS86HMSR +25oC Die Die Functional Diagram Truth Table INPUTS OUTPUT An Bn Yn L L L (1, 4, 9, 12) An L H H H L H Bn (2, 5, 10, 13) H H L (3, 6, 8, 11) Yn NOTE: L = Logic Level Low, H = Logic Level High CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 1 518849 File Number 3995 Spec Number Specifications ACS86MS Absolute Maximum Ratings Reliability Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V Input Voltage Range . . . . . . . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±50mA Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (All Voltages Referenced to VSS) Thermal Impedance θJA θJC DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7W Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4W Maximum Device Power Dissipation. . . . . . . . . . . . . . . . . . .(TBD)W Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Gates CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Time at 4.5V VCC (TR, TF) . . . . . . .10ns/ V Max Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . VCC to 70% of VCC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . .0V to 30% of VCC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current Output Current (Source) Output Current (Sink) Output Voltage High Output Voltage Low Input Leakage Current Noise Immunity Functional Test SYMBOL ICC IOH IOL VOH VOL IIN FN GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 5 µA 2, 3 +125oC, -55oC - 100 µA 1 +25oC -12 - mA 2, 3 +125oC, -55oC -8 - mA 1 +25oC 12 - mA 2, 3 +125oC, -55oC 8 - mA VCC = 5.5V, VIH = 3.85V, VIL = 1.65V, IOH = -50µA 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, IOH = -50µA 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIH = 3.85V, VIL = 1.65V, IOL = 50µA 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, IOL = 50µA 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V 1 +25oC - ±0.5 µA 2, 3 +125oC, -55oC - ±1.0 µA 7, 8A, 8B +25oC, +125oC, -55oC - - V (NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V, (Note 2) VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V, (Note 2) VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, (Note 3) LIMITS NOTES: 1. All voltages referenced to device GND. 2. Force/measure functions may be interchanged. 3. For functional tests, VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”. Spec Number 2 518849 Specifications ACS86MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Input to Output (NOTES 1, 2) CONDITIONS SYMBOL GROUP A SUBGROUPS LIMITS TEMPERATURE MIN MAX UNITS TPHL VCC = 4.5V, VIH = 4.5V, VIL = 0V 9 +25oC 2 12 ns TPLH VCC = 4.5V, VIH = 4.5V, VIL = 0V 10, 11 +125oC, -55oC 2 13 ns NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL Capacitance Power Dissipation CPD Input Capacitance CIN CONDITIONS NOTE TEMP MIN TYP MAX UNITS 1 +25oC - - pF 1 +125oC - TBD TBD - pF 1 +25oC - - 10 pF 1 +125oC - - 10 pF VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER RAD LIMITS (NOTE 1) CONDITIONS TEMPERATURE MIN MAX Supply Current ICC VCC = 5.5V, VIN = VCC or GND +25oC - 100 µA Output Current (Source) IOH VCC = VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0 +25oC -8.0 - mA Output Current (Sink) IOL VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0 +25oC 8.0 - mA Output Voltage High VOH VCC = 5.5V, VIH = 3.85V, VIL = 1.65V, IOH = -50µA +25oC VCC -0.1 - V VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, IOH = -50µA +25oC VCC -0.1 - V VCC = 5.5V, VIH = 3.85V, VIL = 1.65V, IOL = 50µA +25oC - 0.1 V VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, IOL = 50µA +25oC - 0.1 V Output Voltage Low SYMBOL VOL UNITS Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC - ±1 µA Noise Immunity Functional Test FN VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, (Note 2) +25oC - - V VCC = 4.5V, VIH = 4.5V, VIL = 0V +25oC 2 13 ns Propagation Delay Input to Output TPHL TPLH NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”. TABLE 5. DELTA PARAMETERS (+25oC) PARAMETER SYMBOL (NOTE 1) DELTA LIMIT UNITS Supply Current ICC ±1.0 µA Output Current IOL/IOH ±15 % NOTE: 1. All delta calculations are referenced to 0 hour readings or pre-life readings. Spec Number 3 518849 Specifications ACS86MS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP METHOD GROUP A SUBGROUPS Initial Test (Preburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test 1 (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H Interim Test 2 (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H PDA 100%/5004 1, 7, 9, Deltas Interim Test 3 (Postburn-In) 100%/5004 1, 7, 9 PDA 100%/5004 1, 7, 9, Deltas Final Test 100%/5004 2, 3, 8A, 8B, 10, 11 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample/5005 1, 7, 9 Sample/5005 1, 7, 9 Group A (Note 1) Group B Group D READ AND RECORD ICC, IOL/H Subgroups 1, 2, 3, 9, 10, 11 NOTE: 1. Alternate Group A testing may be exercised in accordance with MIL-STD-883, Method 5005. TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUP Group E Subgroup 2 READ AND RECORD METHOD PRE RAD POST RAD PRE RAD POST RAD 5005 1, 7, 9 Table 4 1, 9 Table 4 (Note 1) NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TABLE 8. BURN-IN TEST CONNECTIONS (+125oC < TA < 139oC) OSCILLATOR GROUND 1/2 VCC = 3V ±0.5V VCC = 6V ±0.5V 50kHz 25kHz 1, 2, 4, 5, 7, 9, 10, 12, 13 3, 6, 8, 11 14 - - 7 3, 6, 8, 11 1, 2, 4, 5, 9, 10, 12, 13 - - 7 3, 6, 8, 11 14 1, 2, 4, 5, 9, 10, 12, 13 - OPEN STATIC BURN-IN 1 (Note 1) STATIC BURN-IN 2 (Note 1) DYNAMIC BURN-IN (Note 1) NOTE: 1. Each pin except VCC and GND will have a series resistor of 500Ω ±5%. TABLE 9. IRRADIATION TEST CONNECTIONS (TA = +25oC, ±5oC) FUNCTION OPEN GROUND VCC ±0.5V Irradiation Circuit (Note 1) 3, 6, 8, 11 7 1, 2, 4, 5, 9, 10, 12, 13, 14 NOTE: 1. Each pin except VCC and GND will have a series resistor of 47kΩ ±5%. Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures. Spec Number 4 518849 Specifications ACS86MS Intersil - Space Products MS Screening Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) 100% Static Burn-In 2 Method 1015, 24 Hours at +125oC Min Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Interim Electrical Test 2 (Note 1) 100% Nondestructive Bond Pull Method 2023 100% Dynamic Burn-In Method 1015, 240 Hours at +125oC or 180 Hours at +135oC 100% Internal Visual Inspection Method 2010 100% Interim Electrical Test 3 (Note 1) 100% Temperature Cycling Method 1010 Condition C (-65o to +150oC) 100% Final Electrical Test 100% Constant Acceleration 100% Radiographics Method 2012 (2 Views) 100% PIND Testing 100% External Visual Method 2009 100% External Visual Inspection Group A (All Tests) Method 5005 (Class S) 100% Serialization Group B (Optional) Method 5005 (Class S) (Note 2) 100% Initial Electrical Test Group D (Optional) Method 5005 (Class S) (Note 2) 100% Static Burn-In 1 Method 1015, 24 Hours at +125oC Min CSI and/or GSI (Optional) (Note 2) 100% Interim Electrical Test 1 (Note 1) Data Package Generation (Note 3) 100% Fine and Gross Seal Method 1014 NOTES: 1. Failures from interim electrical tests 1 and 2 are combined for determining PDA (PDA = 5% for subgroups 1, 7, 9 and delta failures combined, PDA = 3% for subgroup 7 failures). Interim electrical tests 3 PDA (PDA = 5% for subgroups 1, 7, 9 and delta failures combined, PDA = 3% for subgroup 7 failures). 2. These steps are optional, and should be listed on the purchase order if required. 3. Data Package Contents: Cover Sheet (P.O. Number, Customer Number, Lot Date Code, Intersil Number, Lot Number, Quantity). Certificate of Conformance (as found on shipper). Lot Serial Number Sheet (Good Unit(s) Serial Number and Lot Number). Variables Data (All Read, Record, and delta operations). Group A Attributes Data Summary. Wafer Lot Acceptance Report (Method 5007) to include reproductions of SEM photos. NOTE: SEM photos to include percent of step coverage. X-Ray Report and Film, including penetrometer measurements. GAMMA Radiation Report with initial shipment of devices from the same wafer lot; containing a Cover Page, Disposition, RAD Dose, Lot Number, Test Package, Spec Number(s), Test Equipment, etc. Irradiation Read and Record data will be on file at Intersil. Propagation Delay Timing Diagram and Load Circuit DUT VIH VS TEST POINT RL 500Ω CL 50pF INPUT VSS TPLH TPHL VOH VS OUTPUT AC VOLTAGE LEVELS VOL PARAMETER ACS UNITS VCC 4.50 V VIH 4.50 V VS 2.25 V VIL 0 V GND 0 V Spec Number 5 518849 ACS86MS Die Characteristics DIE DIMENSIONS: 88 mils x 88 mils 2.24mm x 2.24mm DIE ATTACH: Material: Silver Glass or JM7000 Polymer after 7/1/95 WORST CASE CURRENT DENSITY: < 2.0 x 105 A/cm2 METALLIZATION: Type: AlSiCu Metal 1 Thickness: 6.75kÅ (Min), 8.25kÅ (Max) Metal 2 Thickness: 9kÅ (Min), 11kÅ (Max) BOND PAD SIZE: > 4.3 mils x 4.3 mils > 110µm x 110µm GLASSIVATION: Type: SiO2 Thickness: 8kÅ ±1kÅ Metallization Mask Layout ACS86MS B1 (2) A1 (1) VCC (14) B4 (13) Y1 (3) (12) A4 A2 (4) (11) Y4 NC NC (10) B3 B2 (5) (6) Y2 (7) GND (8) Y3 (9) A3 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Spec Number 6 518849