Sony CXA1842 3-mode surround and vocal cancellation Datasheet

CXA1842S
3-Mode Surround and Vocal Cancellation
Description
The CXA1842S is a bipolar IC which combines 3mode surround, bass boosting and vocal
cancellation function into a single chip.
22 pin SDIP (Plastic)
Features
• 3-mode surround (surround A, surround B,
simulated stereo)
• Vocal cancellation function
• Bass boosting function
Absolute Maximum Ratings (Ta=25°C)
• Supply voltage
VCC
14
• Operating temperature Topr –20 to +75
• Storage temperature
Tstg –65 to +150
• Allowable power dissipation
PD
880
Applications
CD Radio-cassette tape recorders, equipment with
Karaoke functions
Structure
Bipolar silicon monolithic IC
Recommended Operating Conditions
Supply voltage
VCC
5 to 12
V
°C
°C
mW
V
Lch IN
LPF L1
LPF L2
LPF L3
DET L
DET R
PSN1
PSN2
GND
Vcc
Lch OUT
Block Diagram and Pin Configuration
22
21
20
19
18
17
16
15
14
13
12
S4
REF
S6
S5
VCA
DET
S2
S.S
DET
VCA
S5
S6
REF
S4
Vcc
S3
VCA
R2
–6
S1
DET
SW CONT
R1
LPF R2
LPF R3
DET V.C
7
8
9
10
11
Rch OUT
LPF R1
6
REF
5
SW2
4
SW1
3
B.B
2
V.C
1
Rch IN
REF
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E93702-TE
CXA1842S
Pin Description
Pin
No.
Symbol
(VCC=10V, Ta=25°C)
Pin
Voltage
Equivalent Circuit
Description
Channel L
input pin
Channel R
VCC
1
Rch IN
1
5.0V
129
56K
22
22
Lch IN
AGND
GND
Time constants for L.P.F.
32K
2
21
LPF R1
LPF L1
64K
80K
AGND
2
3
20
LPF R2
LPF L2
21
5.0V
3
20
4
19
LPF R3
LPF L3
4
19
Level detector pin.
To be connected with a
capacitor
VCC
5
DET V.C
17
DET R
5
0.5V
129
17
5K
18
18
500
200
200
100K
DET L
—2—
CXA1842S
Pin
No.
Symbol
Pin
Voltage
Equivalent Circuit
Description
VCC
6
V.C
7
B.B
SW is turned ON when this
pin is connected to GND
VCC
—
8
SW 1
6
AGND
129
9
7
SW 2
8
9
Reference voltage
(1/2 VCC)
VCC
48K
10
10
REF
5.0V
AGND
48K
GND
VCC
11 Rch OUT
Channel R
output pin
Channel L
297
5.0V
11
12
Lch OUT
13
Vcc
10V
14
GND
0
129
297
12
Power supply
GND pin
The pin to be connected with
a capacitor for time constants
of phase shift
VCC
15
PSN 2
5.0V
16
PSN 1
15
16
—3—
CXA1842S
Electrical Characteristics
(VCC=10V, Ta=25°C)
No.
Item
Conditions
1
2
3
4
5
6
7
8
9
No signal current
Lch gain
Rch gain
Channel balance
Lch total harmonic distortion
Rch total harmonic distortion
Lch noise level
Rch noise level
Channel separation
Vin=GND
Vin=2Vrms, f=1kHz
↓
Lch gain - Rch gain
Vin=2Vrms, f=1kHz
↓
Vin=GND
↓
Vin=2Vrms, f=1kHz
SW conditions
S1 S2 S3 S4 S5 S6
O
O
O
O
O
— — — — — —
O
O
O
O
O
O
O
O
S7
O
—
O
O
O
Min. Typ. Max. Unit
1.6
-3
-3
-3
—
—
—
—
55
3.35
0
0
0
0.07
0.07
- 90
- 90
63
5.1 mA
3
dB
3
dB
3
dB
0.1
%
0.1
%
- 80 dBm
- 80 dBm
—
dB
O...indicates “ON”.
18
17
16
15
14
13
12
PSN1
PSN2
GND
Vcc
Lch OUT
V1
19
DET R
10V
0.01µ
2200p
20
DET L
C11
21
LPF L3
C10
10µ
22
LPF L2
C9
10µ
C8
0.1µ
C4
10µ
LPF L1
0.022µ
C15
10µ
Lch IN
10µ
C6
10k
C12
C2
R4
Electrical Characteristics Measurement Circuit
S5
S6
S7
DET V.C
V.C
B.B
SW1
SW2
REF
Rch OUT
4
5
6
7
8
9
10
11
V
10µ
10µ
—4—
10k
C14
R3
10µ
S2
S1
S4
S3
C13
0.022µ
10µ
C5
C7
3
LPF R3
LPF R2
2
0.1µ
LPF R1
1
C3
C1
Rch IN
VIN
CXA1842S
Application Circuit
C12
GND
C2
22
21
19
18
17
16
C15
10µ
0.01µ
2200p
C11
10µ
C10
C9
0.022µ
20
10µ
C8
0.1µ
C4
10µ
C6
Vcc
10µ
15
14
13
12
Lch IN
Lch OUT
GND
GND
CXA1842S
Rch IN
Rch OUT
10
9
10µ
8
C13
10µ
C7
0.022µ
7
SW2
6
SW1
5
SW4
4
C5
SW3
3
0.1µ
C1
2
C3
1
11
C14
10µ
10µ
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Mode Switch Correspondence
No.
1
2
3
4
5
MODE
Simulated Stereo
Surround A
Surround B
Pass
Vocal cancel
SW1
ON
ON
OFF
OFF
—
SW2
ON
OFF
ON
OFF
—
SW3
ON
ON
ON
ON
OFF
—...don't care
Bass boosting ON when SW4=ON (Invalid during vocal cancellation)
VTH for SW ... VTH (H) = VCC to 3 V, VTH (L) = 2 V to GND
—5—
CXA1842S
Description of Functions
(1) Simulated Stereo
The sum of the L and R signals is input to the Simulated Stereo* (hereafter S.S) block, and a simulated
stereo signal is generated.
(2) Surround A (matrix surround)
The difference of the L and R signals is raised in level by the VCA (maximum 18 dB (typ.)), and is added
to the raw signal.
(3) Surround B
The difference of the L and R signals is raised in level by the VCA (maximum 18 dB (typ.)), is input to the
S.S block, and is then added to the raw signal.
(4) Pass
The L and R signals are output without modification.
(5) Vocal Cancellation
The difference of the L and R signals is input to the S.S block after first passing through the AGC circuit,
and is then output to L and R. In contrast with conventional products, the vocal cancel signal (L-R signal)
is raised in level by the VCA (max. 12 dB typ.), and low frequency part is enhanced, to prevent reduction in
the acoustic pressure level when vocal cancellation is ON.
* Simulated Stereo circuit:
Phases in the audio band are divided into two separate orthogonal channels and treated as L+R and L-R
signals, and are added and subtracted to produce simulated L and R signals. All-pass network.
—6—
CXA1842S
Vocal cancellation Frequency response
Surround Frequency response
Sur B
Lin Rout
Vin=–40 dBm
20
Sur B
Rin Rout
Sste Rout
+10
Vocal cancellation
Surround (dB)
+20
Sste Lout
0
–10
Vin=–10 dBm
0
–20
–20
100
1K
–40
10K
Frequency (Hz)
10
100
1K
10K
Frequency (Hz)
Bass boosting Frequency response
Input/Output Characteristic
10
Surround f=50Hz
0
Output level (dBm)
20
Vin=–30 dBm
10
Vin=–20 dBm
–10
Sur A f=1kHz
–20
–30
–40
Sur A
BB ON
0
–60
–50
–40
–30
–20
–10
Input level (dBm)
100
1K
10K
Frequency (Hz)
Supply voltage vs. Current consumption
Current consumption (mA)
2
4
3
2
1
5
6
7
8
9
10
11
12
Supply voltage (VCC)
—7—
0
10
1
THD (%)
Bass boosting production (dB)
Vin=–50 dBm
CXA1842S
Unit : mm
+ 0.1
0.05
0.25 –
22PIN SDIP (PLASTIC)
+ 0.4
19.2 – 0.1
7.62
+ 0.3
6.4 – 0.1
12
22
0° to 15°
11
1
0.5 ± 0.1
+ 0.15
0.9 – 0.1
+ 0.4
3.9 – 0.1
0.51 MIN
1.778
+ 0.15
3.25 – 0.2
Package Outline
PACKAGE STRUCTURE
MOLDING COMPOUND
EPOXY RESIN
SONY CODE
SDIP-22P-01
LEAD TREATMENT
SOLDER PLATING
EIAJ CODE
SDIP022-P-0300
LEAD MATERIAL
COPPER ALLOY
PACKAGE WEIGHT
0.95g
JEDEC CODE
—8—
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