Hanbit HMS51232Z4L-15 Sram module 2mbyte (512k x 32-bit), low power, 72-pin simm 5v Datasheet

HANBit
HMS51232M4L
HAN
SRAM MODULE 2Mbyte (512K x 32-Bit),
BIT
SIMM 5V
LOW POWER, 72-Pin
Part No.
HMS51232M4L
GENERAL DESCRIPTION
The HMS51232M4L is a static random access memory (SRAM) module containing 524,288 words organized in
a x32-bit configuration. The module consists of four 512K x 8 SRAMs mounted on a 72-pin, single-sided, FR4printed circuit board.
The HMS51232M4L also support low data retention voltage for battery back-up operations with low data retention
current. Four chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1 and /CE_LL1) are used to enable the module’s
4 bytes independently. Output enable (/OE) and write enable (/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be
powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
FEATURES
PIN ASSIGNMENT
Vss
A3
A2
A1
A0
Vcc
A11
/OE
A10
Vcc
NC
/CE_LL1
DQ7
DQ0
DQ1
DQ2
DQ6
DQ5
DQ4
DQ3
A15
A17
/WE
A13
Vcc
DQ8
DQ9
DQ10
NC
Vcc
/CE_LM1
DQ15
DQ14
DQ13
DQ12
DQ11
Š Access time : 55, 70ns
Š High-density 2MByte design
Š High-reliability, low-power design
Š Single +5V ±0.5V power supply
Š Low data retention voltage : 2V(min)
Š Three state output and TTL-compatible
Š FR4-PCB design
Š Low profile 72-Pin SIMM
OPTIONS
MARKING
Š Timing
55ns access
-55
70ns access
-70
Š Packages
72-pin SIMM
M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
A18
A16
Vss
A6
Vcc
A5
A4
Vcc
NC
/CE_UM1
DQ23
DQ16
DQ17
DQ18
DQ22
DQ21
DQ20
DQ19
Vcc
A14
A12
A7
Vcc
A8
A9
DQ24
DQ25
DQ26
NC
/CE_UU1
DQ31
DQ30
DQ29
DQ28
DQ27
Vss
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
72-Pin SIMM
TOP VIEW
1
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
FUNCTIONAL BLOCK DIAGRAM
32
DQ0 - DQ31
A0 - A18
19
A0-18
DQ 0-7
/WE
U1
/OE
/CE
/CE_UU1
A0-18
DQ 8-15
/WE
U2
/OE
/CE
/CE_UM1
A0-18
DQ16-23
/WE
U3
/OE
/CE
/CE_LM1
A0-18
DQ24-31
/WE
/WE
/OE
/OE
U4
/CE
/CE_LL1
TRUTH TABLE
MODE
/OE
/CE
/WE
DQ
POWER
STANDBY
X
H
X
HIGH-Z
STANDBY
NOT SELECTED
H
L
H
HIGH-Z
ACTIVE
READ
L
L
H
Dout
ACTIVE
WRITE
X
L
L
Din
ACTIVE
2
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN,OUT
-0.5V to +7.0V
Voltage on Vcc Supply Relative to Vss
VCC
-0.5V to +7.0V
Power Dissipation
PD
4W
TSTG
-65oC to +150oC
Voltage on Any Pin Relative to Vss
Storage Temperature
Operating Temperature
TA
0oC to +70oC
Š Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
*
( TA=0 to 70 o C )
SYMBOL
MIN
TYP.
MAX
Supply Voltage
VCC
4.5V
5.0V
5.5V
Ground
VSS
0
0
0
Input High Voltage
VIH
2.2
-
Vcc+0.5V**
Input Low Voltage
VIL
-0.5*
-
0.8V
VIL(Min.) = -2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA
** VIH(Min.) = Vcc+2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA
DC AND OPERATING CHARACTERISTICS (1)(0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
PARAMETER
Input Leakage Current
Output Leakage Current
TEST CONDITIONS
VIN = Vss to Vcc
/CE=VIH or /OE =VIH or /WE=VIL
VOUT=Vss to VCC
SYMBO
L
MIN
MAX
UNITS
ILI
-4
4
µA
IL0
-4
4
µA
2.4
Output High Voltage
IOH = -4.0mA
VOH
Output Low Voltage
IOL = 8.0mA
VOL
V
0.4
V
* Vcc=5.0V, Temp=25 oC
3
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
DC AND OPERATING CHARACTERISTICS (2)
MAX
DESCRIPTION
Power Supply
Current:Operating
Power Supply
Current:Standby
TEST CONDITIONS
IIO=0mA,/CE=VIL, VIN=VIL or
VIH, Read
SYMBOL
-55
-70
UNIT
lCC
60
60
mA
/CE=VIH, Other inputs=VIL or VIH
lSB
12
12
mA
/CE≥Vcc-0.2V,
inputs=0~Vcc
lSB1
400
400
µA
Other
CAPACITANCE
DESCRIPTION
TEST CONDITIONS
SYMBOL
MAX
UNIT
Input /Output Capacitance
VI/O=0V
CI/O
32
pF
Input Capacitance
VIN=0V
CIN
40
pF
* NOTE : Capacitance is sampled and not 100% tested
AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V, unless otherwise specified)
TEST CONDITIONS
PARAMETER
VALUE
Input Pulse Level
0.8 to 2.4V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
CL=100pF + 1TTL
* See test condition of DC and Operating characteristics
CL*
* Including scope and jig capacitance
4
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
READ CYCLE
-55
PARAMETER
-70
UNIT
SYMBOL
MIN
MAX
MIN
MAX
Read Cycle Time
tRC
Address Access Time
tAA
55
70
ns
Chip Select to Output
tCO
55
70
ns
Output Enable to Output
tOE
25
35
ns
Output Enable to Low-Z Output
tOLZ
5
5
ns
Chip Enable to Low-Z Output
tLZ
10
10
ns
Output Disable to High-Z Output
tOHZ
0
20
0
25
ns
Chip Disable to High-Z Output
tHZ
0
20
0
25
ns
Output Hold from Address Change
tOH
10
55
70
ns
10
ns
WRITE CYCLE
PARAMETER
-55
-70
UNIT
SYMBOL
MIN
MAX
MIN
MAX
Write Cycle Time
tWC
55
70
ns
Chip Select to End of Write
tCW
45
60
ns
Address Set-up Time
tAS
0
0
ns
Address Valid to End of Write
tAW
45
60
ns
Write Pulse Width
tWP
40
50
ns
Write Recovery Time
tWR
0
0
ns
Write to Output High-Z
tWHZ
0
Data to Write Time Overlap
tDW
25
30
ns
Data Hold from Write Time
tDH
0
0
ns
End of Write to Output Low-Z
tOW
5
5
ns
5
20
0
25
ns
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE( Address Controlled) ( /CE = /OE = VIL , /WE = VIH)
tRC
Address
tAA
tOH
Data out
Previous Data Valid
Data Valid
TIMING WAVEFORM OF READ CYCLE (/WE = VIH )
tRC
Address
tHZ(3,4)
tAA
tCO
/CE
tLZ(4)
tOHZ
tOE
/OE
tOH
tOLZ
Data Out
High-Z
Data Valid
Notes (Read Cycle)
1. /WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to first transition address.
3. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit condition and are not referenced to VOH
or VOL levels.
4. At any given temperature and voltage condition, tHZ (max.) is less than tLZ (min.) both for a given device and from device
to device.
6
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
TIMING WAVEFORM OF WRITE CYCLE ( /WE Controlled )
tWC
Address
tAW
tWR(5)
/OE
tCW(3)
/CE
tWP(2)
tAS(4)
/WE
tDH
tDW
High-Z
Data In
Data Valid
tOHZ
tOW
Data Out
High-Z
TIMING WAVEFORM OF WRITE CYCLE ( /CE Controlled )
tWC
Address
tAW
tWR(5)
tCW(3)
/CE
tAS(4)
/WE
tWP(2)
tDH
tDW
Data In
Data Valid
High-Z
Data Out
Notes( Write Cycle)
1. All write cycle timing is referenced from the last valid address to the first transition address.
2. A write occurs during the overlap of a low /CE and a low /WE. A write begins at the latest transition among
/CE going low and /WE going low : A write ends at the earliest transition among /CE going high and/WE going high.
tWP is measured from the beginning of write to the end of write.
3. tCW is measured from the later of /CE going low to the end of write.
7
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
4. tAS is measured from the address valid to the beginning of wirte.
5. tWR is measured from the end of write to the address change. tWR applied in case a write ends as/CE, or /WE going high.
FUNCTIONAL DESCRIPTION
/CE
/WE
/OE
MODE
I/O PIN
SUPPLY CURRENT
H
X*
X
Not Select
High-Z
l SB, l SB1
L
H
H
Output Disable
High-Z
lCC
L
H
L
Read
DOUT
lCC
L
L
X
Write
DIN
lCC
Note: X means Don't Care
DATA RETENTION CHARACTERISTICS* (TA = 0 to 70 “)
PARAMETER
SYMBOL
TEST CONDITION
YV
MAX
UNIT
2
5.5
V
-
50
µA
CC-0.2V
VCC for Data Retention
VDR
/CE
Data Retention Current
IDR
VCC=3.0V, /CE
Y
MIN
YV
CC-0.2V
X
VIN VCC-0.2V or VIN 0.2V
Data Retention Set-up Time
tSDR
See Data Retention
0
-
ns
Recovery Time
tRDR
Wave forms(below)
5
-
ns
* L-Version Only
DATA RETENTION WAVEFORM 1 (/CE Controlled)
tSDR
Data Retention Mode
tRDR
Vcc
4.5V
2.2V
VDR
/CE
Vss
/CE
/Vcc- 0.2V
8
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
PACKAGING INFORMATION
SIMM Design
108.20 mm
3.18 mm
TYP(2x)
16 mm
6.35 mm
1
72
2.03 mm
1.02 mm
6.35 mm
1.27 mm
3.34 mm
95.25 mm
2.54 mm
0.25 mm MAX
MIN
1.29±0.08mm
Gold: 1.04±0.10 mm
1.27
Solder: 0.914±0.10 mm
(Solder & Gold Plating Lead)
9
HANBit Electronics Co.,Ltd.
HANBit
HMS51232M4L
ORDERING INFORMATION
1
2
3
HMS
4
5
6
7
8
512 32 M 4L-15
15ns Access Time
HANBit
Component, Low Power
Memory
Modules
SIMM
x32bit
SRAM
512K
1. - Product Line Identifier
HANBit ------------------------------------------------------- H
2. - Memory Modules
3. - SRAM
4. - Depth : 512K
5. - Width : x 32bit
6. - Package Code
SIMM ------------------------------------------------------- M
ZIP
------------------------------------------------------- Z
7. - Number of Memory Components, Low Power -------L
8. - Access time
10 ----------------------------------------------------------- 10ns
12 ----------------------------------------------------------- 12ns
15 ----------------------------------------------------------- 15ns
17 ----------------------------------------------------------- 17ns
20 ----------------------------------------------------------- 20ns
10
HANBit Electronics Co.,Ltd.
Similar pages