ON NCP59800BMNADJTBG 1 a low noise, rf ldo voltage regulator Datasheet

NCP59800
1 A Low Noise, RF LDO
Voltage Regulator
The NCP59800 is a 1 A low−dropout linear regulators (LDOs)
offering high power−supply ripple rejection (PSRR) and ultra−low
output noise. This LDO uses an advanced BiCMOS process to achieve
very good electrical performance. It is an ideal choice for noise
sensitive Analog RF Front−Ends used in Telecom Equipment. The
NCP59800 is available in the 3 mm x 3 mm DFN8 package.
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Features
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1
Operating Input Voltage Range: 2.2 V to 6.0 V
Output Voltage Range: 0.8 V to 5 V (adjustable)
Quiescent Current typ. 60 mA
Low Dropout: 200 mV typ. at 1 A, VOUT = 2.5 V
±2.5% VOUT Accuracy across Load/Line/Temperature
Stable with Small 4.7 mF Ceramic Capacitors
Very−Low Noise: Typically 15 mVRMS from 100 Hz to 100 kHz
Over−Current and Thermal Shutdown Protection
Available in 3 x 3 mm DFN8 Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
DFN8
3 x 3 mm
CASE 506DB
MARKING DIAGRAM
1
A
L
Y
W
G
Typical Applications
• Telecom Infrastructure
• Audio
• High−Speed I/F (PLL/VCO)
PIN CONNECTIONS
VOUT
VIN
OUT
CIN
EN
1 mF
FB
GND
Optional
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
NCP59800
IN
59800
ADJB
ALYWG
G
R1
NR
10 nF
R2
COUT
4.7 mF
OUT
IN
OUT
IN
FB/SNS
NR
GND
EN
(Top View)
3 mm x 3 mm DFN8 0.65 P
Figure 1. Typical Application Schematics
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
December, 2017 − Rev. 2
1
Publication Order Number:
NCP59800/D
NCP59800
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No. DFN8
Pin Name
Description
7,8
IN
4, EPAD
GND
Unregulated input supply.
5
EN
Driving the enable pin (EN) high turns on the regulator.
Driving this pin low puts the regulator into shutdown mode.
6
NR
Connect an external capacitor between this pin and ground to reduce the output noise to very low
levels. The capacitor slows down the VOUT ramp as well (soft−start).
Max recommended CNR value is 0.47 mF
3
FB
This pin is the input to the control loop error amplifier and is used to set the output voltage of the
device.
1,2
OUT
Ground.
Regulator output. A 4.7 mF to 100 mF capacitor is required for stability.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Symbol
Value
Unit
IN
6.5
V
OUT
−0.3 to (VIN + 0.3) ≤ 6.5
V
Enable Input Voltage
EN
−0.3 to 6.5
V
FB Input Voltage
FB
−0.3 to 3.6
V
IOUT
Internally Limited
mA
TJ(MAX)
150
°C
TA
−40 to +125
°C
Output Voltage
Output Current
Maximum Junction Temperature
Operating Ambient Temperature Range
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
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NCP59800
Table 3. RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Input Voltage
VIN
(VOUT + VDO) ≥ 2.2
6.0
V
Junction Temperature
TJ
−40
+125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, DFN8 3 mm x 3 mm
Thermal Resistance, Junction−to−Air (Note 3)
Symbol
Value
Unit
RqJA
52
°C/W
3. The junction−to−ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC−standard, high−K board, as
specified in JESD51−7, in an environment described in JESD51−2a.
Table 5. ELECTRICAL CHARACTERISTICS Over the operating temperature range of TJ = –40°C to +125°C, VIN = (VOUT(NOM) +
0.5 V) or 2.2 V (whichever is greater), IOUT = 1 mA, VEN = 2.2 V, COUT = 4.7 mF, and CNR = 0.01 mF, unless otherwise noted. NCP59800
Adjustable device is tested at VOUT = 0.8 V and VOUT = 5.0 V. Typical values are at TJ = +25°C.
Parameter
Test Conditions
Symbol
Min
Input Voltage Range
VIN
(VOUT+VDO)
≥ 2.2
Internal Reference
VNR
Typ
Max
Unit
6.0
V
0.8
Output Voltage
Adjustable
VOUT
0.8
Output Voltage Accuracy
(Note 4)
VOUT + 0.5 V ≤ VIN ≤ 6.0 V, VIN ≥ 2.2 V
1 mA ≤ IOUT ≤ 1 A
VOUT
−2.5
Line Regulation
VOUT + 0.5 V ≤ VIN ≤ 6.0 V, VIN ≥ 2.2 V
IOUT = 1 mA
DVOUT/ DVIN
150
Load Regulation
1 mA ≤ IOUT ≤ 1 A
DVOUT/ DIOUT
2.0
Dropout Voltage
VOUT + 0.5 V ≤ VIN ≤ 6.0 V, VIN ≥ 2.2 V
IOUT = 500 mA, VFB = GND
±0.3
VDO
V
5.0
V
+2.5
%
mV/V
mV/mA
250
mV
VOUT + 0.5 V ≤ VIN ≤ 6.0 V, VIN ≥ 2.5 V
IOUT = 750 mA, VFB = GND
350
mV
VOUT + 0.5 V ≤ VIN ≤ 6.0 V, VIN ≥ 2.5 V
IOUT = 1 A, VFB = GND
500
mV
1.6
2.5
A
60
100
mA
450
mA
0.2
2.0
mA
0.02
1.0
mA
Output Current Limit
VOUT = 0.85 VOUT(NOM), VIN ≥ 3.3 V
Ground Pin Current
IOUT = 0.1 mA
ICL
1.1
IGND
IOUT = 1 A
Shutdown Current (IGND)
VEN ≤ 0.4 V, VIN ≥ 2.2 V, RL = 1 kW,
0°C ≤ TJ ≤ 85°C
Feedback Pin Current
VIN = 6.0 V, VFB = 0.8 V
Power Supply
Rejection Ratio
IOUT = 750 mA,
VOUT = 3.3 V,
VIN = 4.3 V
Output Noise Voltage
ISHDN
f = 100 Hz
f = 1 kHz
f = 1 MHz
PSRR
77
63
27
dB
BW = 100 Hz−100 kHz, IOUT = 100 mA,
CNR = 100 nF, VIN = 4.3 V, VOUT = 3.3 V
VN
15 x VOUT
mVRMS
Enable Input Current
VIN = VEN = 6.0 V
IEN
0.02
Soft−Start Charging Current
VNR = 0.5 V
ISS
7.2
EN Pin Threshold Voltage
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
1.0
mA
mA
V
1.2
0.4
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. As for NCP59800 (adjustable); it does not include external resistor tolerances and it is not tested at this condition:
VOUT = 0.8 V, 4.5 V ≤ VIN ≤ 6.0 V, and 750 mA ≤ IOUT ≤ 1 A because of power dissipation higher than maximum rating of the package.
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3
NCP59800
Table 5. ELECTRICAL CHARACTERISTICS Over the operating temperature range of TJ = –40°C to +125°C, VIN = (VOUT(NOM) +
0.5 V) or 2.2 V (whichever is greater), IOUT = 1 mA, VEN = 2.2 V, COUT = 4.7 mF, and CNR = 0.01 mF, unless otherwise noted. NCP59800
Adjustable device is tested at VOUT = 0.8 V and VOUT = 5.0 V. Typical values are at TJ = +25°C.
Parameter
Start−Up Time
Test Conditions
VOUT(NOM) = 3.3 V
VOUT = 0% to 90%
VOUT(NOM)
RL = 3.3kW, COUT=4.7 mF
Min
tSTR
CNR = 10 nF
CNR = 100 nF
UVLO
Undervoltage Lockout
VIN rising, RL = 1 kW
UVLO Hysteresis
VIN falling, RL = 1 kW
Thermal Shutdown
Shutdown, temperature increasing
Reset, temperature decreasing
Thermal Shutdown Recovery
Symbol
1.86
Typ
Max
Unit
1.0
ms
10
ms
2.0
2.1
V
75
mV
TSD_TEMP
160
°C
TSD_HYST
140
TJ Operating Range
−40
+125
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. As for NCP59800 (adjustable); it does not include external resistor tolerances and it is not tested at this condition:
VOUT = 0.8 V, 4.5 V ≤ VIN ≤ 6.0 V, and 750 mA ≤ IOUT ≤ 1 A because of power dissipation higher than maximum rating of the package.
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4
NCP59800
APPLICATIONS INFORMATION
capacitance values 4.7 mF up to 100 mF. This device is
evaluated using a 4.7 mF/10 V, 10% tolerance, X5R type
Ceramic Capacitors of 0805 size.
X5R− and X7R−type capacitors are highly recommended
because they have minimal variation in value and ESR over
temperature.
General Information
The NCP59800 regulator is equipped with Noise
Reduction pin (NR) for noise sensitive applications. A noise
reduction capacitor (CNR) at the NR pin bypasses noise
generated by the bandgap reference. This family of
regulators offers sub−bandgap output voltages, current
limit, and thermal protection, and is fully specified from
–40°C to +125°C, assuming resistors with zero error. For the
actual design, pay attention to any resistor error factors.
Figure 3 gives the Typical Application Schematics.
Startup Response
The CNR serves not only for noise reduction. During
Start−Up the CNR capacitor works like the Soft Start timing
capacitor. The controlled monotonic ramping of Voltage
Reference (adjustable Soft−Start) is limiting the Inrush
Current.
NCP59800
VIN
VOUT
IN
CIN
1 mF
OUT
EN
FB
GND
Optional
R1
NR
COUT
4.7 mF
Table 6. RECOMMENDED 1% FEEDBACK RESISTOR
Values for Frequently Used Nominal Output Voltages
R2
10 nF
Figure 3. Typical Application Schematics
Output Voltage Setting
The output voltage can be adjusted from 0.8 V to 5.0 V
using resistors divider between the output and the FB input.
The values of R1 and R2 can be calculated for any voltage
using the following formula:
ǒ
Ǔ
R
V OUT + 0.8 V 1 ) 1
R2
Recommended resistor values for frequently used
voltages can be found in the Table 6.
VOUT
R1
R2
0.8 V
0 W (Short)
10.0 kW
1.0 V
2.49 kW
10.0 kW
1.2 V
4.99 kW
10.0 kW
1.5 V
8.87 kW
10.0 kW
1.8 V
12.5 kW
10.0 kW
2.5 V
21.0 kW
10.0 kW
3.3 V
30.9 kW
10.0 kW
5.0 V
52.3 kW
10.0 kW
Power Dissipation
The maximum power dissipation supported by the device
is dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part. For reliable operation junction temperature
should be limited to +125°C.
Capacitors Selection
Although an input capacitor is not required for stability, it
is good analog design practice to connect a 0.1 mF to 1.0 mF
low equivalent series resistance (ESR) capacitor across the
input supply near the regulator. The NCP59800 is designed
to be stable with standard ceramic output capacitors of
Table 7. ORDERING INFORMATION
Device
Output Voltage
Marking
NCP59800BMNADJTAG
ADJ
59800
ADJB
NCP59800BMNADJTBG
ADJ
59800
ADJB
Package
Shipping†
DFN8 3x3
(Pb−Free)
3000/Tape & Reel
NOTE: The A or B letter in the device suffix represents part orientation in the tape.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*To order other package and voltage variants, please contact your ON sales representative.
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5
NCP59800
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506DB
ISSUE O
A
B
D
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L1
PIN ONE
REFERENCE
2X
0.10 C
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.10 C
2X
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
E
ÉÉÉ
ÉÉÉ
ÇÇÇ
EXPOSED Cu
TOP VIEW
DETAIL B
0.05 C
(A3)
A
ÉÉ
ÉÉ
ÇÇ
MOLD CMPD
DIM
A
A1
A3
b
b1
D
D2
E
E2
e
e1
L
L1
A3
A1
DETAIL B
ALTERNATE
CONSTRUCTIONS
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
D2
DETAIL A
4
1
L
8X
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.25
0.35
0.20
0.30
3.00 BSC
1.65
1.85
3.00 BSC
1.40
1.60
0.65 BSC
0.65 REF
0.30
0.50
0.00
0.15
3.30
2.05
8X
0.63
PACKAGE
OUTLINE
E2
e1
4X
1.64 3.30
b1
8
5
e/2
e
8X
0.65
PITCH
b
0.10 C A B
0.05 C
1
0.65
PITCH
NOTE 3
BOTTOM VIEW
12X
0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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For additional information, please contact your local
Sales Representative
NCP59800/D
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