LINER LT8362 Low iq boost/sepic/ inverting converter with 2a, 60v switch Datasheet

LT8362
Low IQ Boost/SEPIC/
Inverting Converter
with 2A, 60V Switch
DESCRIPTION
FEATURES
Wide Input Voltage Range: 2.8V to 60V
nn Ultralow Quiescent Current and Low Ripple
Burst Mode® Operation: IQ = 9µA
nn 2A, 60V Power Switch
nn Positive or Negative Output Voltage Programming
with a Single Feedback Pin
nn Programmable Frequency (300kHz to 2MHz)
nn Synchronizable to an External Clock
nn Spread Spectrum Frequency Modulation for Low EMI
nn BIAS Pin for Higher Efficiency
nn Programmable Undervoltage Lockout (UVLO)
nn Thermally Enhanced 10-Lead 3mm × 3mm DFN and
16-Lead MSOP packages
nn
APPLICATIONS
Industrial and Automotive
Telecom
nn Medical Diagnostic Equipment
nn Portable Electronics
nn
nn
The LT®8362 is a current mode DC/DC converter with a
60V, 2A switch operating from a 2.8V to 60V input. With
a unique single feedback pin architecture it is capable
of boost, SEPIC or inverting configurations. Burst Mode
operation consumes as low as 9µA quiescent current to
maintain high efficiency at very low output currents, while
keeping typical output ripple below 15mV.
An external compensation pin allows optimization of loop
bandwidth over a wide range of input and output voltages and programmable switching frequencies between
300kHz and 2MHz. A SYNC/MODE pin allows synchronization to an external clock. It can also be used to select
between burst or pulse-skipping modes of operation with
or without Spread Spectrum Frequency Modulation for
low EMI. For increased efficiency, a BIAS pin can accept
a second input to supply the INTVCC regulator. Additional
features include frequency foldback and programmable
soft-start to control inductor current during start-up.
The LT8362 is available in a thermally enhanced 10-lead
3mm × 3mm DFN package or a thermally enhanced
16-lead MSOP package with four pins removed.
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
2MHz, 48V Output Boost Converter
6.8μH
4.7µF
EN/UVLO
LT8362
SS
FBX
4.7pF
4.7µF
BIAS
INTVCC
SYNC/MODE
RT
1M
SW
GND VC
20k
1µF
34.8k
80
70
1.4
60
1.2
50
1.0
40
8362 TA01a
0.8
POWER LOSS
30
20
0
150pF
1.6
EFFICIENCY
0.6
0.4
VIN = 12V
VIN = 24V
10
57.6k
10nF
1.8
90
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.7
POWER LOSS (W)
VIN
2.0
100
VOUT
48V
200mA AT VIN = 8V
320mA AT VIN = 12V
700mA AT VIN = 24V
EFFICIENCY (%)
VIN
8V TO 38V
Efficiency and Power Loss
0.2
0
0.8
8362 TA01b
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LT8362
ABSOLUTE MAXIMUM RATINGS
(Note 1)
SW............................................................................. 60V FBX............................................................................ ±4V
VIN, EN/UVLO............................................................. 60V Operating Junction Temperature (Note 3)
BIAS........................................................................... 40V
LT8362E, LT8362I................................–40°C to 125°C
EN/UVLO Pin Above VIN Pin, SYNC............................. 6V
LT8362H..............................................–40°C to 150°C
INTVCC ................................................................(Note 2) Storage Temperature Range....................–65°C to 150°C
VC ................................................................................ 4V
PIN CONFIGURATION
TOP VIEW
TOP VIEW
EN/UVLO 1
VIN 3
INTVCC
NC
BIAS
VC
5
6
7
8
16 SW1
17
PGND,
GND
14 SW2
12
11
10
9
SYNC/MODE
SS
RT
FBX
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
LEAD FREE FINISH
TAPE AND REEL
1
VIN
2
INTVCC
3
BIAS
4
VC
5
10 SW
11
PGND,
GND
9 SYNC/MODE
8 SS
7 RT
6 FBX
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS PGND AND GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
EN/UVLO
θJA = 43°C/W
EXPOSED PAD (PIN 11) IS PGND AND GND, MUST BE SOLDERED TO PCB
http://www.linear.com/product/LT8362#orderinfo
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8362EMSE#PBF
LT8362EMSE#TRPBF
8362
16-Lead Plastic MSOP with 4 Pins Removed
–40°C to 125°C
LT8362IMSE#PBF
LT8362IMSE#TRPBF
8362
16-Lead Plastic MSOP with 4 Pins Removed
–40°C to 125°C
LT8362HMSE#PBF
LT8362HMSE#TRPBF
8362
16-Lead Plastic MSOP with 4 Pins Removed
–40°C to 150°C
LT8362EDD#PBF
LT8362EDD#TRPBF
LGWZ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT8362IDD#PBF
LT8362IDD#TRPBF
LGWZ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT8362HDD#PBF
LT8362HDD#TRPBF
LGWZ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 150°C
Consult LTC® Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
8362fa
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LT8362
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
VIN Operating Voltage Range
VIN Quiescent Current at Shutdown
MIN
TYP
UNITS
60
V
l
1
1
2
15
μA
μA
l
2
2
5
25
μA
μA
l
9
9
15
30
μA
μA
l
1200
1200
1600
1850
µA
µA
l
22
22
40
65
µA
µA
4.4
4
4.65
4.25
V
V
l
2.8
MAX
VEN/UVLO = 0.2V
VEN/UVLO = 1.5V
VIN Quiescent Current
Sleep Mode (Not Switching)
Active Mode (Not Switching)
SYNC = 0V
SYNC = 0V or INTVCC, BIAS = 0V
SYNC = 0V or INTVCC, BIAS = 5V
BIAS Threshold
Rising, BIAS Can Supply INTVCC
Falling, BIAS Cannot Supply INTVCC
VIN Falling Threshold to Supply INTVCC
BIAS = 12V
BIAS Falling Threshold to Supply INTVCC
VIN = 12V
BIAS – 2V
V
VIN
V
FBX Regulation
1.568
–0.820
1.6
–0.80
1.632
–0.780
V
V
0.005
0.005
0.015
0.015
%/V
%/V
10
nA
FBX Regulation Voltage
FBX > 0V
FBX < 0V
FBX Line Regulation
FBX > 0V, 2.8V < VIN < 60V
FBX < 0V, 2.8V < VIN < 60V
FBX Pin Current
FBX = 1.6V, –0.8V
l
–10
RT = 165k
RT = 45.3k
RT = 20k
l
l
l
273
0.92
1.85
300
1
2
327
1.08
2.15
14
20
25
%
70
60
90
85
ns
ns
50
75
ns
l
l
Oscillator
Switching Frequency (fOSC)
SSFM Maximum Frequency Deviation
(∆f/fOSC) • 100, RT = 20k
Minimum On-Time
Burst Mode, VIN = 24V (Note 6)
Pulse-Skip Mode, VIN = 24V (Note 6)
Minimum Off-Time
l
kHz
MHz
MHz
SYNC/Mode, Mode Thresholds (Note 5)
High (Rising)
Low (Falling)
l
l
0.14
1.3
0.2
1.7
V
V
SYNC/Mode, Clock Thresholds (Note 5)
Rising
Falling
l
l
0.4
1.3
0.8
1.7
V
V
fSYNC/fOSC Allowed Ratio
RT = 20k
0.95
1
1.25
kHz/kHz
SYNC Pin Current
SYNC = 2V
SYNC = 0V, Current Out of Pin
10
10
25
25
µA
µA
2.5
3.1
A
Switch
Maximum Switch Current Limit Threshold
l
2
Switch Overcurrent Threshold
Discharges SS Pin
3.75
Switch RDS(ON)
ISW = 0.5A
165
Switch Leakage Current
VSW = 60V
0.1
A
mΩ
1
µA
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LT8362
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
EN/UVLO Logic
EN/UVLO Pin Threshold (Rising)
Start Switching
l
1.576
1.68
1.90
V
EN/UVLO Pin Threshold (Falling)
Stop Switching
l
1.555
1.6
1.645
V
EN/UVLO Pin Current
VEN/UVLO = 1.6V
l
–50
50
nA
Soft-Start
Soft-Start Charge Current
SS = 0.5V
2
µA
Soft-Start Pull-Down Resistance
Fault Condition, SS = 0.1V
220
Ω
Error Amplifier Transconductance
FBX = 1.6V
FBX = –0.8V
75
60
µA/V
µA/V
Error Amplifier Voltage Gain
FBX = 1.6V
FBX = –0.8V
185
145
V/V
V/V
Error Amplifier Max Source Current
VC = 1.1V, Current Out of Pin
7
µA
Error Amplifier Max Sink Current
VC = 1.1V
7
µA
Error Amplifier
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: INTVCC cannot be externally driven. No additional components or
loading is allowed on this pin.
Note 3: The LT8362E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT8362I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT8362H is guaranteed over the full –40°C to
150°C operating junction temperature range.
Note 4: The IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
Note 5: For SYNC/MODE inputs required to select modes of operation see
the Pin Functions and Applications Information sections.
Note 6: The IC is tested in a Boost converter configuration with the output
voltage programmed for 24V.
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LT8362
TYPICAL PERFORMANCE CHARACTERISTICS
FBX Positive Regulation Voltage
vs Temperature
–0.780
VIN = 12V
FBX VOLTAGE (V)
FBX VOLTAGE (V)
1.608
1.600
1.592
–0.795
–0.800
–0.805
1.584
–0.810
1.576
–0.815
1.568
–50 –25
–0.820
–50 –25
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
2.02
2.00
1.98
1.96
1.94
1.92
2.06
2.04
2.02
2.00
1.98
1.96
1.94
1.90
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
8362 G04
100
90
0
5 10 15 20 25 30 35 40 45 50 55 60
VIN (V)
125
2.6
2.5
2.4
2.3
100
75
50
25
0
–0.8
100
VIN = 12V
90
70
60
50
40
30
2.2
20
2.1
10
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
8362 G07
VIN = 12V
–0.4
0.0
0.4
0.8
VOLTAGE (V)
0
–50 –25
1.2
1.6
8362 G06
MINIMUM OFF TIME (ns)
2.7
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Switch Minimum Off-Time
vs Temperature
80
MINIMUM ON TIME (ns)
2.8
0
1.58
Switch Minimum On-Time
vs Temperature
VIN = 12V
2.9
EN/UVLO FALLING (TURN–OFF)
1.60
8362 G05
Switch Current Limit
vs Duty Cycle
3.0
1.62
Normalized Switching Frequency
vs FBX Voltage
Switching Frequency vs VIN
1.92
1.90
–50 –25
1.64
8362 G03
NORMALIZED SWITCHING FREQUENCY (%)
2.04
1.66
1.54
–50 –25
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
2.08
SWITCHING FREQUENCY (MHz)
SWITCHING FREQUENCY (MHz)
2.10
VIN = 12V
2.06
1.68
8362 G02
Switching Frequency
vs Temperature
2.08
EN/UVLO RISING (TURN–ON)
1.70
1.56
8362 G01
SWITCH CURRENT LIMIT (A)
1.72
–0.790
1.616
2.0
1.74
VIN = 12V
–0.785
1.624
2.10
EN/UVLO Pin Thresholds
vs Temperature
EN/UVLO PIN VOLTAGE (V)
1.632
FBX Negative Regulation Voltage
vs Temperature
VIN = 12V
80
70
60
50
40
30
20
10
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
8362 G08
0
–50 –25
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
8362 G09
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LT8362
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Pin Current (Active Mode,
Not Switching, Bias = 0V)
vs Temperature
30
1.8
1.6
VIN PIN CURRENT (mA)
24
VIN PIN CURRENT (µA)
2.0
VIN = 12V
VBIAS = 0V
VSYNC_MODE = 0V
27
21
18
15
12
9
50
VIN = 12V
VBIAS = 0V
VSYNC_MODE = FLOAT
46
42
1.4
1.2
1.0
0.8
0.6
34
30
26
22
0.4
18
3
0.2
14
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
0
–50 –25
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
8362 G10
IL
500mA/DIV
VSW
20V/DIV
VSW
20V/DIV
8362 G13
1µs/DIV
1µs/DIV
VIN = 12V
VOUT = 48V
FRONT PAGE APPLICATION
IOUT
200mA/DIV
IOUT
200mA/DIV
VIN = 12V
VOUT = 48V
VIN = 12V
VOUT = 48V
VOUT
500mV/DIV
1.0
0.5
VOUT
500mV/DIV
100µs/DIV
0
10
20
30
40
LOAD CURRENT (mA)
8362 G15
VOUT Transient Response: Load
Current Transients from 160mA to
320mA to 160mA
FRONT PAGE APPLICATION
1.5
0
8362 G14
VOUT Transient Response: Load
Current Transients from 80mA to
320mA to 80mA
FRONT PAGE APPLICATION
2.0
Switching Waveforms
(in Deep Burst Mode)
IL
500mA/DIV
Burst Frequency vs Load Current
2.5
0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
8362 G12
Switching Waveforms
(in DCM/Light Burst Mode)
VSW
20V/DIV
1µs/DIV
10
–50 –25
8362 G11
Switching Waveforms
(in CCM)
IL
500mA/DIV
VIN = 12V
VBIAS = 5V
VSYNC_MODE = FLOAT
38
6
0
–50 –25
SWITCHING FREQUENCY (MHz)
VIN Pin Current (Active Mode, Not
Switching, Bias = 5V)
vs Temperature
VIN PIN CURRENT (µA)
VIN Pin Current (Sleep Mode, Not
Switching) vs Temperature
8362 G17
100µs/DIV
8362 G16
50
8362 G18
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LT8362
PIN FUNCTIONS
EN/UVLO: Shutdown and Undervoltage Detect Pin. The
LT8362 is shut down when this pin is low and active
when this pin is high. Below an accurate 1.6V threshold,
the part enters undervoltage lockout and stops switching.
This allows an undervoltage lockout (UVLO) threshold to
be programmed for system input voltage by resistively
dividing down system input voltage to the EN/UVLO pin.
An 80mV pin hysteresis ensures part switching resumes
when the pin exceeds 1.68V. EN/UVLO pin voltage below
0.2V reduces VIN current below 1µA. If shutdown and
UVLO features are not required, the pin can be tied directly
to system input.
RT: A resistor from this pin to the exposed pad GND copper (near FBX) programs switching frequency.
VIN: Input Supply. This pin must be locally bypassed. Be
sure to place the positive terminal of the input capacitor as
close as possible to the VIN pin, and the negative terminal
as close as possible to the exposed pad PGND copper
(near EN/UVLO).
INTVCC: Regulated 3.2V Supply for Internal Loads. The
INTVCC pin must be bypassed with a 1µF low ESR ceramic
capacitor to GND. No additional components or loading is
allowed on this pin. INTVCC draws power from the BIAS
pin if 4.4V ≤ BIAS ≤ VIN, otherwise INTVCC is powered by
the VIN pin.
NC: No Internal Connection. Leave this pin open.
BIAS: Second Input Supply for Powering INTVCC.
Removes the majority of INTVCC current from the VIN pin
to improve efficiency when 4.4V ≤ BIAS ≤ VIN. If unused,
tie the pin to GND.
VC: Error Amplifier Output Pin. Tie external compensation
network to this pin.
FBX: Voltage Regulation Feedback Pin for Positive or
Negative Outputs. Connect this pin to a resistor divider
between the output and the exposed pad GND copper
(near FBX). FBX reduces the switching frequency during
start-up and fault conditions when FBX is close to 0V.
SS: Soft-Start Pin. Connect a capacitor from this pin to
GND copper (near FBX) to control the ramp rate of inductor current during converter start-up. SS pin charging
current is 2μA. An internal 220Ω MOSFET discharges this
pin during shutdown or fault conditions.
SYNC/MODE: This pin allows five selectable modes for
optimization of performance.
SYNC/MODE Pin Input
Capable Mode(s) of Operation
(1) GND or <0.14V
Burst
(2) External Clock
Pulse-skip/Sync
(3) 100k Resistor to GND
Burst/SSFM
(4) Float (pin open)
Pulse-skip
(5) INTVCC or >1.7V
Pulse-skip/SSFM
where the selectable modes of operation are,
Burst = low IQ, low output ripple operation at light loads
Pulse-skip = skipped pulse(s) at light load (aligned to clock)
Sync = switching frequency synchronized to external clock
SSFM = Spread Spectrum Frequency Modulation for low
EMI
SW1, SW2 (SW): Output of the Internal Power Switch.
Minimize the metal trace area connected to these pins to
reduce EMI.
PGND,GND: Power Ground and Signal Ground for the
IC. The package has an exposed pad underneath the IC
which is the best path for heat out of the package. The
pin should be soldered to a continuous copper ground
plane under the device to reduce die temperature and
increase the power capability of the LT8362. Connect
power ground components to the exposed pad copper
exiting near the EN/UVLO and SW pins. Connect signal
ground components to the exposed pad copper exiting
near the VC and FBX pins.
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7
LT8362
BLOCK DIAGRAM
L
VIN
R4
OPT
VOUT
R3
OPT
COUT
CIN
EN/UVLO
VIN
VBIAS (+)
VBIAS – 2V(–)
INTERNAL
REFERENCE
UVLO
+
SW
+
+
–
–
SW
BIAS
4.4V(+)
4.0V(–)
1.68V(+)
1.6V(–)
A6
UVLO
D
–
TJ > 170°C
3.2V REGULATOR
INTVCC
INTVCC
UVLO
SYNC/MODE
CVCC
RT
OSCILLATOR
FREQUENCY
FOLDBACK
ERROR AMP
SELECT
FBX
1.6V
BURST
DETECT
ERROR
AMP
+
–
A1
–
+
R2
A7
A5
PWM
COMPARATOR
ERROR
AMP
OVERCURRENT
–
+
M1
DRIVER
A2
–
A3
ISS
2μA
UVLO
OVERCURRENT
M2
Q1
+
SLOPE
RSENSE
A4
–
SS
MAX
ILIMIT
+
–0.8V
1.5×
MAX
ILIMIT
+
VOUT
R1
SWITCH
LOGIC
SLOPE
–
R5
PGND/GND
VC
8362 BD
CSS
RC
CC
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LT8362
OPERATION
The LT8362 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring
to the Block Diagram. An oscillator (with frequency
programmed by a resistor at the RT pin) turns on the
internal power switch at the beginning of each clock
cycle. Current in the inductor then increases until the
current comparator trips and turns off the power switch.
The peak inductor current at which the switch turns off
is controlled by the voltage on the VC pin. The error
amplifier servos the VC pin by comparing the voltage on
the FBX pin with an internal reference voltage (1.60V or
–0.80V, depending on the chosen topology). When the
load current increases it causes a reduction in the FBX
pin voltage relative to the internal reference. This causes
the error amplifier to increase the VC pin voltage until the
new load current is satisfied. In this manner, the error
amplifier sets the correct peak switch current level to
keep the output in regulation.
The LT8362 is capable of generating either a positive or
negative output voltage with a single FBX pin. It can be
configured as a boost or SEPIC converter to generate a
positive output voltage, or as an inverting converter to
generate a negative output voltage. When configured as
a Boost converter, as shown in the Block Diagram, the
FBX pin is pulled up to the internal bias voltage of 1.60V
by a voltage divider (R1 and R2) connected from VOUT
to GND. Amplifier A2 becomes inactive and amplifier A1
performs (inverting) amplification from FBX to VC. When
the LT8362 is in an inverting configuration, the FBX pin
is pulled down to –0.80V by a voltage divider from VOUT
to GND. Amplifier A1 becomes inactive and amplifier A2
performs (non-inverting) amplification from FBX to VC.
If the EN/UVLO pin voltage is below 1.6V, the LT8362
enters undervoltage lockout (UVLO), and stops switching.
When the EN/UVLO pin voltage is above 1.68V (typical),
the LT8362 resumes switching. If the EN/UVLO pin voltage is below 0.2V, the LT8362 draws less than 1µA from
VIN.
For the SYNC/MODE pin tied to ground or <0.14V, the
LT8362 will enter low output ripple Burst Mode operation for ultra low quiescent current during light loads to
maintain high efficiency. For a 100k resistor from SYNC/
MODE pin to GND, the LT8362 uses Burst Mode operation for improved efficiency at light loads but seamlessly
transitions to Spread-Spectrum Modulation of switching frequency for low EMI at heavy loads. For the SYNC/
MODE pin floating (left open), the LT8362 uses pulseskipping mode, at the expense of hundreds of microamps,
to maintain output voltage regulation at light loads by
skipping switch pulses. For the SYNC/MODE pin tied to
INTVCC or >1.7V, the LT8362 uses pulse-skipping mode
and performs Spread-Spectrum Modulation of switching
frequency. For the SYNC/MODE pin driven by an external
clock, the converter switching frequency is synchronized
to that clock and pulse-skipping mode is also enabled. See
the Pin Functions section for SYNC/MODE pin.
The LT8362 includes a BIAS pin to improve efficiency
across all loads. The LT8362 intelligently chooses
between the VIN and BIAS pins to supply the INTVCC for
best efficiency. The INTVCC supply current can be drawn
from the BIAS pin instead of the VIN pin for 4.4V ≤ BIAS
≤ VIN.
Protection features ensure the immediate disable of
switching and reset of the SS pin for any of the following
faults: internal reference UVLO, INTVCC UVLO, switch current > 1.5× maximum limit, EN/UVLO < 1.6V or junction
temperature > 170°C.
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9
LT8362
APPLICATIONS INFORMATION
ACHIEVING ULTRALOW QUIESCENT CURRENT
To enhance efficiency at light loads the LT8362 uses a
low ripple Burst Mode architecture. This keeps the output capacitor charged to the desired output voltage while
minimizing the input quiescent current and output ripple.
In Burst Mode operation, the LT8362 delivers single small
pulses of current to the output capacitor followed by sleep
periods where the output power is supplied by the output
capacitor. While in sleep mode, the LT8362 consumes
only 9µA.
As the output load decreases, the frequency of single current pulses decreases (see Figure 1) and the percentage of
time the LT8362 is in sleep mode increases, resulting in
much higher light load efficiency than for typical converters. To optimize the quiescent current performance at light
loads, the current in the feedback resistor divider must
be minimized as it appears to the output as load current.
In addition, all possible leakage currents from the output
should also be minimized as they all add to the equivalent output load. The largest contributor to leakage current
can be due to the reverse biased leakage of the Schottky
diode (see Diode Selection in the Applications Information
section).
While in Burst Mode operation, the current limit of the
switch is approximately 500mA resulting in the output
voltage ripple shown in Figure 2. Increasing the output
capacitance will decrease the output ripple proportionally.
As the output load ramps upward from zero the switching
frequency will increase but only up to the fixed frequency
SWITCHING FREQUENCY (MHz)
2.5
VIN = 12V
VOUT = 48V
1.5
1.0
0.5
0
0
10
20
30
40
LOAD CURRENT (mA)
VOUT
10mV/DIV
10µs/DIV
8362 F02
Figure 2. Burst Mode Operation
defined by the resistor at the RT pin as shown in Figure 1.
The output load at which the LT8362 reaches the fixed
frequency varies based on input voltage, output voltage,
and inductor choice.
PROGRAMMING INPUT TURN-ON AND TURN-OFF
THRESHOLDS WITH EN/UVLO PIN
The EN/UVLO pin voltage controls whether the LT8362 is
enabled or is in a shutdown state. A 1.6V reference and
a comparator A6 with built-in hysteresis (typical 80mV)
allow the user to accurately program the system input
voltage at which the IC turns on and off (see the Block
Diagram). The typical input falling and rising threshold
voltages can be calculated by the following equations:
R3 + R4
R4
R3 + R4
= 1.68 •
R4
VIN(FALLING,UVLO(–)) = 1.60 •
VIN(RISING, UVLO(+))
VIN current is reduced below 1µA when the EN/UVLO pin
voltage is less than 0.2V. The EN/UVLO pin can be connected directly to the input supply VIN for always-enabled
operation. A logic input can also control the EN/UVLO pin.
FRONT PAGE APPLICATION
2.0
IL
500mA/DIV
50
When operating in Burst Mode operation for light load
currents, the current through the R3 and R4 network can
easily be greater than the supply current consumed by the
LT8362. Therefore, R3 and R4 should be large enough to
minimize their effect on efficiency at light loads.
8362 F01
Figure 1. Burst Frequency vs Load Current
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LT8362
APPLICATIONS INFORMATION
INTVCC REGULATOR
Synchronization and Mode Selection
A low dropout (LDO) linear regulator, supplied from VIN,
produces a 3.2V supply at the INTVCC pin. A minimum
1µF low ESR ceramic capacitor must be used to bypass
the INTVCC pin to ground to supply the high transient currents required by the internal power MOSFET gate driver.
To select low ripple Burst Mode operation, for high efficiency at light loads, tie the SYNC/MODE pin below 0.14V
(this can be ground or a logic low output).
No additional components or loading is allowed on this
pin. The INTVCC rising threshold (to allow soft-start and
switching) is typically 2.65V. The INTVCC falling threshold
(to stop switching and reset soft-start) is typically 2.5V.
To improve efficiency across all loads, the majority of
INTVCC current can be drawn from the BIAS pin (4.4V ≤
BIAS ≤ VIN) instead of the VIN pin. For SEPIC applications
with VIN often greater than VOUT, the BIAS pin can be
directly connected to VOUT. If the BIAS pin is connected
to a supply other than VOUT, be sure to bypass the pin
with a local ceramic capacitor.
Programming Switching Frequency
The LT8362 uses a constant frequency PWM architecture
that can be programmed to switch from 300kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary RT value for a desired switching
frequency is in Table 1.
The RT resistor required for a desired switching frequency
can be calculated using:
51.2
RT =
– 5.6
fOSC
where RT is in kΩ and fOSC is the desired switching frequency in MHz.
Table 1. SW Frequency vs RT Value
fOSC (MHz)
RT (kΩ)
0.3
165
0.45
107
0.75
63.4
1
45.3
1.5
28.7
2
20
To synchronize the LT8362 oscillator to an external frequency connect a square wave (with 20% to 80% duty
cycle) to the SYNC pin. The square wave amplitude should
have valleys that are below 0.4V and peaks above 1.7V
(up to 6V). The LT8362 will not enter Burst Mode operation at low output loads while synchronized to an external
clock, but instead will pulse skip to maintain regulation.
The LT8362 may be synchronized over a 300kHz to 2MHz
range. The RT resistor should be chosen to set the LT8362
switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal
will be 500kHz and higher, the RT should be selected for
500kHz.
For some applications it is desirable for the LT8362 to
operate in pulse-skipping mode, offering two major differences from Burst Mode operation. Firstly, the clock stays
awake at all times and all switching cycles are aligned to
the clock. Secondly, the full switching frequency is maintained at lower output load than in Burst Mode operation.
These two differences come at the expense of increased
quiescent current. To enable pulse-skipping mode, float
the SYNC pin.
To improve EMI/EMC, the LT8362 can provide spread
spectrum frequency modulation (SSFM). This feature varies the clock with a triangle frequency modulation of 20%.
For example, if the LT8362's frequency was programmed
to switch at 2MHz, spread spectrum mode will modulate
the oscillator between 2MHz and 2.4MHz. The 20% modulation will occur at a frequency: fOSC/256 where fOSC is
the switching frequency programmed using the RT pin.
The LT8362 can also be configured to operate in pulseskipping/SSFM mode by tying the SYNC/MODE pin above
1.7V. The LT8362 can also be configured for Burst Mode
operation at light loads (for improved efficiency) and
SSFM at heavy loads (for low EMI) by tying a 100k from
the SYNC/MODE pin to GND.
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11
LT8362
APPLICATIONS INFORMATION
DUTY CYCLE CONSIDERATION
The LT8362 minimum on-time, minimum off-time and
switching frequency (fOSC) define the allowable minimum
and maximum duty cycles of the converter (see Minimum
On-Time, Minimum Off-Time, and Switching Frequency
in the Electrical Characteristics table).
Minimum Allowable Duty Cycle =
Minimum On-Time(MAX) • fOSC(MAX)
Maximum Allowable Duty Cycle =
1 – Minimum Off-Time(MAX) • fOSC(MAX)
The required switch duty cycle range for a Boost converter
operating in continuous conduction mode (CCM) can be
calculated as:
DMIN = 1 –
DMAX = 1 –
VIN(MAX)
VOUT + VD
VIN(MIN)
VOUT + VD
where VD is the diode forward voltage drop. If the above
duty cycle calculations for a given application violate
the minimum and/or maximum allowed duty cycles
for the LT8362, operation in discontinuous conduction
mode (DCM) might provide a solution. For the same VIN
and VOUT levels, operation in DCM does not demand as
low a duty cycle as in CCM. DCM also allows higher duty
cycle operation than CCM. The additional advantage of
DCM is the removal of the limitations to inductor value
and duty cycle required to avoid sub-harmonic oscillations and the right half plane zero (RHPZ). While DCM
provides these benefits, the trade-off is higher inductor
peak current, lower available output power and reduced
efficiency.
Choose the resistor values for a negative output voltage
according to:
⎛ |V | ⎞
R1 = R2 • ⎜ OUT – 1⎟
⎝ 0.80V ⎠
The locations of R1 and R2 are shown in the Block
Diagram. 1% resistors are recommended to maintain
output voltage accuracy.
Higher-value FBX divider resistors result in the lowest
input quiescent current and highest light-load efficiency.
FBX divider resistors R1 and R2 are usually in the range
from 25k to 1M.
SOFT-START
The LT8362 contains several features to limit peak switch
currents and output voltage (VOUT) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
High peak switch currents during start-up may occur
in switching regulators. Since VOUT is far from its final
value, the feedback loop is saturated and the regulator
tries to charge the output capacitor as quickly as possible,
resulting in large peak currents. A large surge current may
cause inductor saturation or power switch failure.
The LT8362 addresses this mechanism with a programmable soft-start function. As shown in the Block Diagram, the
soft-start function controls the ramp of the power switch
current by controlling the ramp of VC through Q1. This
allows the output capacitor to be charged gradually toward
its final value while limiting the start-up peak currents.
Figure 3 shows the output voltage and supply current for
the first page Typical Application. It can be seen that both
the output voltage and supply current come up gradually.
SETTING THE OUTPUT VOLTAGE
The output voltage is programmed with a resistor divider
from the output to the FBX pin. Choose the resistor values
for a positive output voltage according to:
⎛V
⎞
R1 = R2 • ⎜ OUT – 1⎟
⎝ 1.60V ⎠
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LT8362
APPLICATIONS INFORMATION
COMPENSATION
IL
1A/DIV
VOUT
20V/DIV
500µs/DIV
8362 F03
Figure 3. Soft-Start Waveforms
FAULT PROTECTION
An inductor overcurrent fault (> 3.75A) and/or INTVCC
undervoltage (INTVCC < 2.5V) and/or thermal lockout
(TJ > 170°C) will immediately prevent switching, will
reset the SS pin and will pull down VC. Once all faults are
removed, the LT8362 will soft-start VC and hence inductor
peak current.
FREQUENCY FOLDBACK
During start-up or fault conditions in which VOUT is very
low, extremely small duty cycles may be required to maintain control of inductor peak current. The minimum ontime limitation of the power switch might prevent these
low duty cycles from being achievable. In this scenario
inductor current rise will exceed inductor current fall
during each cycle, causing inductor current to “walk up”
beyond the switch current limit. The LT8362 provides
protection from this by folding back switching frequency
whenever FBX or SS pins are close to GND (low VOUT
levels or start-up). This frequency foldback provides a
larger switch-off time, allowing inductor current to fall
enough each cycle (see Normalized Switching Frequency
vs FBX Voltage in the Typical Performance Characteristics
section).
THERMAL LOCKOUT
If the LT8362 die temperature reaches 170°C (typical),
the part will stop switching and go into thermal lockout.
When the die temperature has dropped by 5°C (nominal),
the part will resume switching with a soft-started inductor
peak current.
Loop compensation determines the stability and transient
performance. The LT8362 uses current mode control to
regulate the output which simplifies loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LT8362, a series resistor-capacitor
network is usually connected from the VC pin to GND.
The Block Diagram shows the typical VC compensation
network. For most applications, the capacitor should be
in the range of 100pF to 10nF, and the resistor should
be in the range of 5k to 100k. A small capacitor is often
connected in parallel with the RC compensation network
to attenuate the VC voltage ripple induced from the output voltage ripple through the internal error amplifier. The
parallel capacitor usually ranges in value from 2.2pF to
22pF. A practical approach to designing the compensation network is to start with one of the circuits in this data
sheet that is similar to your application, and tune the compensation network to optimize the performance. Stability
should then be checked across all operating conditions,
including load current, input voltage and temperature.
Application Note 76 is a good reference.
THERMAL CONSIDERATIONS
Care should be taken in the layout of the PCB to ensure
good heat sinking of the LT8362. Both packages have an
exposed pad underneath the IC which is the best path
for heat out of the package. The exposed pad should be
soldered to a continuous copper ground plane under the
device to reduce die temperature and increase the power
capability of the LT8362. The ground plane should be
connected to large copper layers to spread heat dissipated by the LT8362. Power dissipation within the LT8362
(PDISS_LT8362) can be estimated by subtracting the inductor and Schottky diode power losses from the total power
losses calculated in an efficiency measurement. The junction temperature of LT8362 can then be estimated by:
TJ(LT8362) = TA + θ JA • PDISS_LT8362
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13
LT8362
APPLICATIONS INFORMATION
APPLICATION CIRCUITS
The LT8362 can be configured for different topologies.
The first topology to be analyzed will be the boost converter, followed by the SEPIC and inverting converters.
Due to the current limit of its internal power switch, the
LT8362 should be used in a boost converter whose maximum output current (IO(MAX)) is:
I O(MAX) ≤
VIN(MIN)
Boost Converter: Switch Duty Cycle
The LT8362 can be configured as a boost converter for
the applications where the converter output voltage is
higher than the input voltage. Remember that boost converters are not short-circuit protected. Under a shorted
output condition, the inductor current is limited only by the
input supply capability. For applications requiring a stepup converter that is short-circuit protected, please refer
to the Applications Information section covering SEPIC
converters.
The conversion ratio as a function of duty cycle is:
VOUT
1
=
VIN
1− D
in continuous conduction mode (CCM).
For a boost converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (VOUT) and the input voltage (VIN). The maximum
duty cycle (DMAX) occurs when the converter has the
minimum input voltage:
DMAX =
VOUT − VIN(MIN)
VOUT
Discontinuous conduction mode (DCM) provides higher
conversion ratios at a given frequency at the cost of
reduced efficiencies, higher switching currents, and lower
available output power.
Boost Converter: Maximum Output Current Capability
and Inductor Selection
For the boost topology, the maximum average inductor
current is:
I L(MAX)(AVE) = IO(MAX) •
1
1
•
1 − DMAX
η
VOUT
• (2A − 0.5 • ΔISW ) • η
Minimum possible inductor value and switching frequency
should also be considered since they will increase inductor
ripple current ∆ISW.
The inductor ripple current ∆ISW has a direct effect on the
choice of the inductor value and the converter’s maximum
output current capability. Choosing smaller values of
∆ISW increases output current capability, but requires
large inductances and reduces the current loop gain
(the converter will approach voltage mode). Accepting
larger values of ∆ISW provides fast transient response and
allows the use of low inductances, but results in higher
input current ripple and greater core losses, and reduces
output current capability. It is recommended to choose a
∆ISW of approximately 0.75A.
Given an operating input voltage range, and having chosen the operating frequency and ripple current in the
inductor, the inductor value of the boost converter can
be determined using the following equation:
L =
VIN(MIN)
ΔISW • fOSC
• DMAX
The peak inductor current is the switch current limit (maximum 3.1A), and the RMS inductor current is approximately equal to IL(MAX)(AVE).
Choose an inductor that can handle at least 3.1A without saturating, and ensure that the inductor has a low DCR (copperwire resistance) to minimize I2R power losses. Note that in
some applications, the current handling requirements of the
inductor can be lower, such as in the SEPIC topology where
each inductor only carries one-half of the total switch current. For better efficiency, use similar valued inductors with a
larger volume. Many different sizes and shapes are available
from various manufacturers (see Table 2). Choose a core
material that has low losses at the programmed switching
where η (< 1.0) is the converter efficiency.
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LT8362
APPLICATIONS INFORMATION
frequency, such as a ferrite core. The final value chosen
for the inductor should not allow peak inductor currents to
exceed 2A in steady state at maximum load. Due to tolerances, be sure to account for minimum possible inductance
value, switching frequency and converter efficiency.
For inductor current operation in CCM and duty cycles
above 50%, the LT8362's internal slope compensation prevents sub-harmonic oscillations provided the
inductor value exceeds a minimum value given by:
L>
(2 •D– 1)
(–14 •D2 +21•D– 5) • (fOSC ) (1–D)
VIN
•
Lower L values are allowed if the inductor current operates in DCM or duty cycle operation is below 50%.
Table 2. Inductor Manufacturers
Sumida
(847) 956-0666
www.sumida.com
TDK
(847) 803-6100
www.tdk.com
Murata
(714) 852-2001
www.murata.com
Coilcraft
(847) 639-6400
www.coilcraft.com
Wurth
(605) 886-4385
www.we-online.com
BOOST CONVERTER: INPUT CAPACITOR SELECTION
Bypass the input of the LT8362 circuit with a ceramic
capacitor of X7R or X5R type placed as close as possible to the VIN and GND pins. Y5V types have poor
performance over temperature and applied voltage, and
should not be used. A 4.7µF to 10µF ceramic capacitor is
adequate to bypass the LT8362 and will easily handle the
ripple current. If the input power source has high impedance, or there is significant inductance due to long wires
or cables, additional bulk capacitance may be necessary.
This can be provided with a low performance electrolytic
capacitor.
inductance forms a high quality (under damped) tank circuit. If the LT8362 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8362’s voltage rating. This situation is
easily avoided (see Application Note 88).
BOOST CONVERTER: OUTPUT CAPACITOR SELECTION
Low ESR (equivalent series resistance) capacitors should
be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice,
as they are small and have extremely low ESR. Use X5R or
X7R types. This choice will provide low output ripple and
good transient response. A 4.7µF to 47µF output capacitor
is sufficient for most applications, but systems with very
low output currents may need only a 1µF or 2.2µF output capacitor. Solid tantalum or OS-CON capacitor can be
used, but they will occupy more board area than a ceramic
and will have a higher ESR. Always use a capacitor with a
sufficient voltage rating.
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
must be considered when choosing the correct output
capacitors for a given output ripple voltage. The effect of
these three parameters (ESR, ESL and bulk C) on the output voltage ripple waveform for a typical boost converter
is illustrated in Figure 4.
tON
tOFF
ΔVCOUT
VOUT
(AC)
ΔVESR
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
8362 F04
Figure 4. The Output Ripple Waveform of a Boost Converter
A precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8362.
A ceramic input capacitor combined with trace or cable
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15
LT8362
APPLICATIONS INFORMATION
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step ∆VESR and the charging/discharging ∆VCOUT. For the purpose of simplicity, we will choose
2% for the maximum output ripple, to be divided equally
between ∆VESR and ∆VCOUT. This percentage ripple will
change, depending on the requirements of the application,
and the following equations can easily be modified. For a
1% contribution to the total ripple voltage, the ESR of the
output capacitor can be determined using the following
equation:
ESRCOUT
0.01 • VOUT
≤
ID(PEAK)
For the bulk C component, which also contributes 1% to
the total ripple:
COUT ≥
IO(MAX)
0.01 • VOUT • fOSC
The output capacitor in a boost regulator experiences
high RMS ripple currents, as shown in Figure 4. The RMS
ripple current rating of the output capacitor can be determined using the following equation:
IRMS(COUT) ≥ IO(MAX) •
DMAX
1 − DMAX
nature. When in Burst Mode operation, the LT8362’s
switching frequency depends on the load current, and
at very light loads the LT8362 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Since the LT8362 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this is unacceptable, use a high performance
tantalum or electrolytic capacitor at the output. Low noise
ceramic capacitors are also available.
Table 3. Ceramic Capacitor Manufacturers
Taiyo Yuden
(408) 573-4150
www.t-yuden.com
AVX
(803) 448-9411
www.avxcorp.com
Murata
(714) 852-2001
www.murata.com
BOOST CONVERTER: DIODE SELECTION
A Schottky diode is recommended for use with the LT8362.
Low leakage Schottky diodes are necessary when low
quiescent current is desired at low loads. The diode leakage appears as an equivalent load at the output and should
be minimized. Choose Schottky diodes with sufficient
reverse voltage ratings for the target applications.
Table 4. Recommended Schottky Diodes
PART NUMBER
Multiple capacitors are often paralleled to meet ESR
requirements. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering and has the
required RMS current rating. Additional ceramic capacitors in parallel are commonly used to reduce the effect of
parasitic inductance in the output capacitor, which reduces
high frequency switching noise on the converter output.
CERAMIC CAPACITORS
Ceramic capacitors are small, robust and have very low
ESR. However, ceramic capacitors can cause problems
when used with the LT8362 due to their piezoelectric
AVERAGE
FORWARD REVERSE REVERSE
CURRENT VOLTAGE CURRENT
(A)
(V)
(µA)
MANUFACTURER
DFLS260
2
60
20
Diodes, Inc.
PMEG2020EJ
2
20
100
NXP
PMEG3020EPA
2
30
80
NXP
BOOST CONVERTER: LAYOUT HINTS
The high speed operation of the LT8362 demands careful
attention to board layout. Careless layout will result in performance degradation. Figure 5 shows the recommended
component placement for a boost converter. Note the vias
under the exposed pad. These should connect to a local
ground plane for better thermal performance.
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LT8362
APPLICATIONS INFORMATION
VIN
VOUT
PGND
SW
VOUT
VIN
°
1 EN
SW1 16
PGND
SW
PGND
SW2 14 SW
3 VIN
5 INTVCC
°
SYNC 12
6 NC
7 BIAS
GND
8 VC
1 EN
SW 10
2 VIN
SYNC 9
SS 11
3 INTVCC
RT 10
4 BIAS
SS 8
RT 7
GND
5 VC
FBX 9
FBX 6
VOUT
VOUT
°
°
8362 F05
(a) MSOP
(b) DFN
Figure 5. Suggested Boost Converter Layout
SEPIC CONVERTER APPLICATIONS
CDC
L1
The LT8362 can be configured as a SEPIC (single-ended
primary inductance converter), as shown in Figure 6. This
topology allows for the input to be higher, equal, or lower
than the desired output voltage. The conversion ratio as
a function of duty cycle is:
D1
VIN
VOUT
CIN
L2
VIN
COUT
SW
LT8362
EN/UVLO
VOUT + VD
D
=
VIN
1− D
INTVCC
FBX
GND
in continuous conduction mode (CCM).
8362 F06
In a SEPIC converter, no DC path exists between the input
and output. This is an advantage over the boost converter
for applications requiring the output to be disconnected
from the input source when the circuit is in shutdown.
Figure 6. LT8362 Configured in a SEPIC Topology
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17
LT8362
APPLICATIONS INFORMATION
SEPIC Converter: Switch Duty Cycle and Frequency
For a SEPIC converter operating in CCM, the duty cycle
of the main switch can be calculated based on the output
voltage (VOUT), the input voltage (VIN) and the diode forward voltage (VD).
The maximum duty cycle (DMAX) occurs when the converter operates at the minimum input voltage:
DMAX
VOUT + VD
=
VIN(MIN) + VOUT + VD
Conversely, the minimum duty cycle (DMIN) occurs when
the converter operates at the maximum input voltage:
DMIN =
VOUT + VD
VIN(MAX) + VOUT + VD
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
and
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
where Minimum Off-Time, Minimum On-Time and fOSC
are specified in the Electrical Characteristics table.
SEPIC Converter: The Maximum Output Current
Capability and Inductor Selection
As shown in Figure 6, the SEPIC converter contains two
inductors: L1 and L2. L1 and L2 can be independent, but
can also be wound on the same core, since identical voltages are applied to L1 and L2 throughout the switching
cycle.
For the SEPIC topology, the current through L1 is the
converter input current. Based on the fact that, ideally, the
output power is equal to the input power, the maximum
average inductor currents of L1 and L2 are:
IL2(MAX)(AVG) = IO(MAX)
ISW(MAX)(AVG) = IL1(MAX)(AVG) + IL2(MAX)(AVG)
= IO(MAX) •
1
1 − DMAX
and the peak switch current is:
⎛
χ ⎞
1
ISW(PEAK) = ⎜1 + ⎟ • IO(MAX) •
⎝
2 ⎠
1 − DMAX
The constant c in the preceding equations represents
the percentage peak-to-peak ripple current in the switch,
relative to ISW(MAX)(AVG), as shown in Figure 7. Then, the
switch ripple current ∆ISW can be calculated by:
∆ISW = χ • ISW(MAX)(AVG)
Be sure to check that DMAX and DMIN obey:
IL1(MAX)(AVG) = IIN(MAX)(AVG) = IO(MAX) •
In a SEPIC converter, the switch current is equal to IL1 +
IL2 when the power switch is on, therefore, the maximum
average switch current is defined as:
DMAX
1 − DMAX
The inductor ripple currents ∆IL1 and ∆IL2 are identical:
∆IL1 = ∆IL2 = 0.5 • ∆ISW
ISW
ISW =  • ISW(MAX)(AVG)
ISW(MAX)(AVG)
t
DTS
TS
8362 F07
Figure 7. The Switch Current Waveform of the SEPIC Converter
The inductor ripple current has a direct effect on the
choice of the inductor value. Choosing smaller values of
∆IL requires large inductances and reduces the current
loop gain (the converter will approach voltage mode).
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher input current ripple and
greater core losses. It is recommended that c falls in the
range of 0.5 to 0.8.
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LT8362
APPLICATIONS INFORMATION
Due to the current limit of its internal power switch, the
LT8362 should be used in a SEPIC converter whose maximum output current (IO(MAX)) is:
IO(MAX) < (1 – DMAX ) • (2A – 0.5 • ∆ISW ) • η
where η (< 1.0) is the converter efficiency. Minimum
possible inductor value and switching frequency should
also be considered since they will increase inductor ripple
current ∆ISW.
Given an operating input voltage range, and having chosen ripple current in the inductor, the inductor value (L1
and L2 are independent) of the SEPIC converter can be
determined using the following equation:
L1 = L2 =
VIN(MIN)
0.5 • ΔISW • fOSC
• DMAX
Similar to Boost converters, the SEPIC converter also needs
slope compensation to prevent subharmonic oscillations
while operating in CCM. The equation presented in the
Boost converter section defines the minimum inductance
value to avoid sub-harmonic oscillations when coupled
inductors are used. For uncoupled inductors, the minimum
inductance requirement is doubled.
SEPIC Converter: Output Diode Selection
To maximize efficiency, a fast switching diode with a low
forward drop and low reverse leakage is desirable. The
average forward current in normal operation is equal to
the output current.
It is recommended that the peak repetitive reverse voltage
rating VRRM is higher than VOUT + VIN(MAX) by a safety
margin (a 10V safety margin is usually sufficient).
For most SEPIC applications, the equal inductor values
will fall in the range of 2.2µH to 100µH.
The power dissipated by the diode is:
By making L1 = L2, and winding them on the same core,
the value of inductance in the preceding equation is
replaced by 2L, due to mutual inductance:
where VD is diode’s forward voltage drop, and the diode
junction temperature is:
L=
VIN(MIN)
ΔISW • fOSC
• DMAX
This maintains the same ripple current and energy storage
in the inductors. The peak inductor currents are:
PD = IO(MAX) • VD
TJ = TA + PD • Rθ JA
The RθJA used in this equation normally includes the RθJC
for the device, plus the thermal resistance from the board,
to the ambient temperature in the enclosure. TJ must not
exceed the diode maximum junction temperature rating.
SEPIC Converter: Output and Input Capacitor Selection
IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1
IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2
The maximum RMS inductor currents are approximately
equal to the maximum average inductor currents.
The selections of the output and input capacitors of the
SEPIC converter are similar to those of the boost converter.
Based on the preceding equations, the user should choose
the inductors having sufficient saturation and RMS current ratings.
8362fa
For more information www.linear.com/LT8362
19
LT8362
APPLICATIONS INFORMATION
SEPIC Converter: Selecting the DC Coupling Capacitor
Inverting Converter: Switch Duty Cycle and Frequency
The DC voltage rating of the DC coupling capacitor (CDC,
as shown in Figure 6) should be larger than the maximum
input voltage:
For an inverting converter operating in CCM, the duty
cycle of the main switch can be calculated based on the
negative output voltage (VOUT) and the input voltage (VIN).
VCDC > VIN(MAX)
CDC has nearly a rectangular current waveform. During the
switch off-time, the current through CDC is IIN, while approximately –IO flows during the on-time. The RMS rating of the
coupling capacitor is determined by the following equation:
IRMS(CDC) > IO(MAX)
+ VD
V
• OUT
VIN(MIN)
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for CDC.
The LT8362 can be configured as a dual-inductor inverting topology, as shown in Figure 8. The VOUT to VIN ratio
is:
VOUT − VD
D
= −
VIN
1− D
VIN
+
+
CIN
SW
LT8362
GND
L2
–
–
COUT
D1
VOUT
VOUT − VD
− VD − VIN(MIN)
Conversely, the minimum duty cycle (DMIN) occurs when
the converter operates at the maximum input voltage :
DMIN =
VOUT
VOUT − VD
− VD − VIN(MAX)
Be sure to check that DMAX and DMIN obey :
and
DMIN > Minimum On-Time(MAX) • fOSC(MAX)
where Minimum Off-Time, Minimum On-Time and fOSC
are specified in the Electrical Characteristics table.
Inverting Converter: Inductor, Output Diode and Input
Capacitor Selections
in continuous conduction mode (CCM).
CDC
DMAX =
DMAX < 1 – Minimum Off-Time(MAX) • fOSC(MAX)
INVERTING CONVERTER APPLICATIONS
L1
The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage:
VOUT
+
The selections of the inductor, output diode and input
capacitor of an inverting converter are similar to those
of the SEPIC converter. Please refer to the corresponding
SEPIC converter sections.
+
8362 F10
Figure 8. A Simplified Inverting Converter
8362fa
20
For more information www.linear.com/LT8362
LT8362
APPLICATIONS INFORMATION
Inverting Converter: Output Capacitor Selection
The inverting converter requires much smaller output
capacitors than those of the boost, flyback and SEPIC
converters for similar output ripples. This is due to the
fact that, in the inverting converter, the inductor L2 is
in series with the output, and the ripple current flowing
through the output capacitors are continuous. The output
ripple voltage is produced by the ripple current of L2 flowing through the ESR and bulk capacitance of the output
capacitor:
⎛
⎞
1
ΔVOUT(P–P) = ΔIL2 • ⎜ESRCOUT +
⎟
8 • fOSC • COUT ⎠
⎝
After specifying the maximum output ripple, the user can
select the output capacitors according to the preceding
equation.
The ESR can be minimized by using high quality X5R or
X7R dielectric ceramic capacitors. In many applications,
ceramic capacitors are sufficient to limit the output voltage ripple.
The RMS ripple current rating of the output capacitor
needs to be greater than:
IRMS(COUT) > 0.3 • ∆IL2
Inverting Converter: Selecting the DC Coupling
Capacitor
The DC voltage rating of the DC coupling capacitor (CDC,
as shown in Figure 8) should be larger than the maximum
input voltage minus the output voltage (negative voltage):
VCDC > VIN(MAX) +| VOUT |
CDC has nearly a rectangular current waveform. During
the switch off-time, the current through CDC is IIN, while
approximately –IO flows during the on-time. The RMS
rating of the coupling capacitor is determined by the following equation:
IRMS(CDC) > IO(MAX) •
DMAX
1 − DMAX
A low ESR and ESL, X5R or X7R ceramic capacitor works
well for CDC.
8362fa
For more information www.linear.com/LT8362
21
LT8362
TYPICAL APPLICATIONS
2MHz, 8V to 38V Input, 48V Boost Converter
L1
6.8µH
VIN
8V TO 38V
VIN
FBX
EN/UVLO
LT8362
BIAS
SYNC/MODE
RT
C6
4.7pF
R1
1M
SW
Efficiency
100
INTVCC
SS
GND
R3
20k
VC
C2
1µF
R4
57.6k
C5
10nF
90
R2
34.8k
EFFICIENCY (%)
C1
4.7µF
VOUT
48V
200mA AT VIN = 8V
C3
320mA AT VIN = 12V
4.7µF
700mA AT VIN = 24V
50V
1210
D1
C4
150pF
80
70
8362 TA02
D1: DIODES INC. DFLS260
L1: WURTH ELEKTRONIK LHMI 7050 74437349068
C3: MURATA GRM32ER71H475k
60
VIN = 12V
VIN = 24V
50
0.001
0.01
0.1
LOAD CURRENT (A)
1
8362 TA02a
2MHz, 2.8V to 9V Input, 12V Boost Converter
L1
2.2µH
VIN
2.8V TO 9V
VIN
LT8362
SYNC/MODE
R3
20k
C6
4.7pF
C3
10µF
FBX
EN/UVLO
RT
R1
1M
SW
VOUT
12V
300mA AT VIN = 2.8V
600mA AT VIN = 5V
1.1A AT VIN = 9V
Efficiency
BIAS
100
INTVCC
SS
GND
C5
10nF
D1: NXP PMEG2020EJ
L1: WURTH ELEKTRONIK LHMI 7050 74437349022
C3: MURATA GRM31CR71E106KA12L
95
VC
R4
36.5k
R2
154k
C2
1µF
C4
680pF
8362 TA03
90
EFFICIENCY (%)
C1
4.7µF
D1
85
80
75
70
65
VIN = 2.8V
VIN = 5V
VIN = 9V
60
55
50
0
0.2
0.4
0.6
0.8
LOAD CURRENT (A)
1.0
1.2
8362 TA03a
8362fa
22
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 4V to 19V Input, 24V Boost Converter
L1
4.7µH
VIN
4V TO 19V
VIN
R1
1M
SW
C3
4.7µF
1210
Efficiency
FBX
EN/UVLO
LT8362
100
BIAS
SYNC/MODE
RT
C6
4.7pF
95
INTVCC
SS
GND
VC
C5
10nF
R3
20k
C2
1µF
R4
36.5k
90
R2
71.5k
EFFICIENCY (%)
C1
4.7µF
VOUT
24V
500mA AT VIN = 8V
700mA AT VIN = 12V
1.24A AT VIN = 19V
D1
C4
330pF
8362 TA04
D1: NXP PMEG3020EPA
L1: WURTH ELEKTRONIK LHMI 7050 74437349047
C3: MURATA GRM32ER71H475k
85
80
75
70
65
VIN = 8V
VIN = 12V
VIN = 19V
60
55
50
0
0.2
0.4 0.6 0.8 1.0
LOAD CURRENT (A)
1.2
1.4
8362 TA04a
2MHz, 2.8V to 6V Input, 48V Boost Converter in DCM
L1
0.33µH
C1
4.7µF
VIN
LT8362
SYNC/MODE
R3
20k
C6
4.7pF
FBX
EN/UVLO
RT
R1
1M
SW
C3
1µF
100V
1210
VOUT
48V
20mA AT VIN = 2.8V
22mA AT VIN = 5V
25mA AT VIN = 6V
Efficiency
BIAS
100
INTVCC
SS
GND
C5
10nF
D1: DIODES INC. DFLS260
L1: WURTH ELEKTRONIK LHMI 7050 744373490033
C3: MURATA GRM32CR72A105KA35L
90
VC
R4
36.5k
R2
34.8k
C2
1µF
C4
680pF
8362 TA05
80
EFFICIENCY (%)
VIN
2.8V TO 6V
D1
70
60
50
40
30
VIN = 2.8V
VIN = 5V
VIN = 6V
20
10
0
0
5
10
15
20
LOAD CURRENT (mA)
25
30
8362 TA05a
8362fa
For more information www.linear.com/LT8362
23
LT8362
TYPICAL APPLICATIONS
2MHz, 2.8V to 28V Input, 5V SEPIC Converter
L1
2.2µH
C6
1µF
D1
VIN
2.8V TO 28V
VIN
L2
2.2µH
SW
EN/UVLO
R1
1M
C7
4.7pF
Efficiency
FBX
LT8362
BIAS
SYNC/MODE
RT
C3
22µF
100
VOUT
95
INTVCC
SS
GND
VC
R4
36.5k
C5
10nF
R3
20k
90
R2
464k
C2
1µF
85
EFFICIENCY (%)
C1
4.7µF
VOUT
5V
500mA AT VIN = 2.8V
750mA AT VIN = 5V
1A AT VIN = 12V
1.2A AT VIN = 28V
C4
680pF
8362 TA06
80
75
70
65
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 1260 744871220
C3: TAIYO YUDEN TMK325B7226MMHP
C6: MURATA GRM31CR72A105K
VIN = 2.8V
VIN = 5V
VIN = 12V
VIN = 28V
60
55
50
0
0.2
0.4 0.6 0.8 1.0
LOAD CURRENT (A)
1.2
1.4
8362 TA06a
2MHz, 2.8V to 42V Input, 12V SEPIC Converter
C6
1µF
VIN
2.8V TO 42V
C1
4.7µF
VIN
LT8362
SYNC/MODE
RT
R3
20k
L2
4.7µH
SW
EN/UVLO
SS
GND
C5
10nF
D1
FBX
BIAS
INTVCC
C3
10µF
C7
4.7pF
VOUT
12V
125mA AT VIN = 2.8V
460mA AT VIN = 5V
760mA AT VIN = 12V
1A AT VIN = 24V
1A AT VIN = 42V
Efficiency
VOUT
100
95
R2
154k
VC
R4
36.5k
R1
1M
C2
1µF
C4
680pF
8362 TA07
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 1260 744871470
C3: MURATA GRM31CR71E106KA12L
C6: MURATA GRM31CR72A105K
90
EFFICIENCY (%)
L1
4.7µH
85
80
75
70
65
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 42V
60
55
50
0
0.2
0.4
0.6
0.8
LOAD CURRENT (A)
1.0
1.2
8362 TA07a
8362fa
24
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
2MHz, 4.5V to 30V Input, 24V SEPIC Converter
L1
6.8µH
VIN
4.5V TO 30V
C1
4.7µF
VIN
C6
1µF
D1
L2
6.8µH
SW
C3
10µF
R1
1M
C7
4.7pF
VOUT
24V
260mA AT VIN = 5V
500mA AT VIN = 12V
700mA AT VIN = 24V
700mA AT VIN = 30V
EN/UVLO
BIAS
INTVCC
SS
GND
100
VC
R4
36.5k
C5
10nF
R3
20k
VOUT
C2
1µF
C4
680pF
8362 TA08
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 744870006
C3: MURATA GRM31CR71E106KA12L
C6: MURATA GRM31CR72A105K
95
R2
71.5k
90
EFFICIENCY (%)
RT
Efficiency
FBX
LT8362
SYNC/MODE
85
80
75
70
65
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 30V
60
55
50
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.7
0.8
8362 TA08a
2MHz, 2.8V to 28V Input, –5V Inverting Converter
L1
2.2µH
C6
1µF
L2
2.2µH
VIN
2.8V TO 28V
D1
VIN
SW
EN/UVLO
LT8362
SYNC/MODE
RT
R3
20k
SS
GND
C5
10nF
C3
22µF
R1
1M
C7
4.7pF
FBX
Efficiency
BIAS
INTVCC
100
VC
R4
36.5k
95
R2
191k
C2
1µF
C4
680pF
8362 TA09
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 1260 744871220
C3: TAIYO YUDEN TMK325B7226MMHP
C6: MURATA GRM31CR72A105K
90
EFFICIENCY (%)
C1
4.7µF
VOUT
–5V
500mA AT VIN = 2.8V
750mA AT VIN = 5V
1A AT VIN = 12V
1.2A AT VIN = 28V
85
80
75
70
65
VIN = 2.8V
VIN = 5V
VIN = 12V
VIN = 28V
60
55
50
0
0.2
0.4 0.6 0.8 1.0
LOAD CURRENT (A)
1.2
1.4
8362 TA09a
8362fa
For more information www.linear.com/LT8362
25
LT8362
TYPICAL APPLICATIONS
2MHz, 2.8V to 42V Input, –12V Inverting Converter
L1
4.7µH
VIN
2.8V TO 42V
C1
4.7µF
C6
1µF
L2
4.7µH
D1
VIN
SW
C3
10µF
R1
1M
C7
4.7pF
VOUT
–12V
125mA AT VIN = 2.8V
460mA AT VIN = 5V
760mA AT VIN = 12V
1A AT VIN = 24V
1A AT VIN = 42V
EN/UVLO
LT8362
FBX
SS
GND
VC
R4
36.5k
C5
10nF
R3
20k
100
95
R2
71.5k
C2
1µF
90
EFFICIENCY (%)
RT
Efficiency
BIAS
INTVCC
SYNC/MODE
C4
680pF
8362 TA10
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 1260 744871470
C3: MURATA GRM31CR71E106KA12L
C6: MURATA GRM31CR72A105K
85
80
75
70
65
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 42V
60
55
50
0
0.2
0.4
0.6
0.8
LOAD CURRENT (A)
1.0
1.2
8362 TA10a
2MHz, 4.5V to 30V Input, –24V Inverting Converter
L1
6.8µH
VIN
4.5V TO 30V
C1
4.7µF
C6
1µF
L2
6.8µH
D1
VIN
SW
C3
10µF
R1
1M
C7
4.7pF
VOUT
–24V
260mA AT VIN = 5V
500mA AT VIN = 12V
700mA AT VIN = 24V
700mA AT VIN = 30V
EN/UVLO
LT8362
Efficiency
FBX
BIAS
SYNC/MODE
100
INTVCC
R3
20k
SS
GND
C5
10nF
VC
R4
36.5k
95
R2
34.8k
C2
1µF
C4
680pF
8362 TA11
D1: DIODES INC. DFLS260
L1, L2: WURTH ELEKTRONIK WE-DD SMD 1280 744870006
C3: MURATA GRM31CR71E106KA12L
C6: MURATA GRM31CR72A105K
90
EFFICIENCY (%)
RT
85
80
75
70
65
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 30V
60
55
50
0
0.1
0.2
0.3 0.4 0.5 0.6
LOAD CURRENT (A)
0.7
0.8
8362 TA11a
8362fa
26
For more information www.linear.com/LT8362
LT8362
TYPICAL APPLICATIONS
Low IQ, Low EMI, 2MHz, 48V Output Boost Converter with SSFM
INPUT EMI FILTER
L2
0.47µH
VIN
8V TO 38V
C8
4.7µF
50V
1206
C6
33µF
L1
6.8µH
+
C1
10µF
50V
1206
VIN
SW
LT8362
SS
GND
VC
C3
0.1µF
100V
0402
C7
0.1µF
100V
0402
R4
22.1k
C5
10nF
R3
20k
R2
34.8k
C2
1µF
C4
1nF
8362 TA12
Conducted EMI Performance
(CISPR25 Class 5 Peak)
Conducted EMI Performance
(CISPR25 Class 5 Average)
80
80
CLASS 5 PEAK LIMIT
LT8362 2MHz fSW PEAK EMI
70
60
60
50
40
30
20
10
50
40
30
20
10
0
0
–10
–10
0
3
6
9
12
15
18
FREQUENCY (MHz)
21
24
CLASS 5 AVERAGE LIMIT
LT8362 2MHz fSW AVERAGE EMI
70
AMPLITUDE (dBµV)
AMPLITUDE (dBµV)
C9
10µF
50V
1210
INTVCC
D1: DIODES INC. DFLS260
L1: WURTH ELEKTRONIK LHMI 74437324068
L2: WURTH ELEKTRONIK 74479876147
FB1: WURTH ELEKTRONIK 742792040
C6: 50CE33PCS
–20
C10
0.1µF
x2
100V
0402
VOUT
48V
300mA AT VIN = 12V
700mA AT VIN = 24V
BIAS
SYNC/MODE
RT
C11
4.7pF
R1
1M
FBX
EN/UVLO
R5
100k
OUTPUT EMI FILTER
FB2
D1
27
–20
30
0
3
6
9
12
15
18
FREQUENCY (MHz)
21
24
27
8362 TA12a
8362 TA12b
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 2MHz
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 2MHz
Radiated EMI Performance
(CISPR25 Class 5 Average)
60
60
50
50
40
40
AMPLITUDE (dBµV/m)
AMPLITUDE (dBµV/m)
Radiated EMI Performance
(CISPR25 Class 5 Peak)
30
20
10
0
CLASS 5 PEAK LIMIT
LT8362 2MHz fSW PEAK EMI
–10
–20
0
100
200
300
400
500
600
FREQUENCY (MHz)
700
800
30
20
10
0
CLASS 5 AVERAGE LIMIT
LT8362 2MHz fSW AVERAGE EMI
–10
900
1000
–20
0
100
200
300
400
500
600
FREQUENCY (MHz)
700
800
900
1000
8362 TA12d
8362 TA12c
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 2MHz
30
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 2MHz
8362fa
For more information www.linear.com/LT8362
27
LT8362
TYPICAL APPLICATIONS
Low IQ, Low EMI, 400kHz, 48V Boost Converter with SSFM
INPUT EMI FILTER
L2
2.2µH
VIN
4V TO 35V
C8
4.7µF
x4
50V
1206
L1
22µH
+
C6
82µF
C1
10µF
50V
1206
VIN
SW
LT8362
SYNC/MODE
R5
100k
GND
C3
1µF
100V
0402
R2
34.8k
VC
R4
22.1k
C5
10nF
R3
121k
C9
10µF
50V
1210
VOUT
48V
300mA AT VIN = 12V
C7
0.1µF 700mA AT VIN = 24V
100V
0402
BIAS
INTVCC
SS
C10
0.1µF
x2
100V
0402
C11
4.7pF
R1
1M
FBX
EN/UVLO
RT
OUTPUT EMI FILTER
FB1
D1
C2
1µF
C4
1nF
8362 TA13
D1: DIODES INC. DFLS260
L1: WURTH ELEKTRONIK LHMI 74437346220
L2: WURTH ELEKTRONIK 74437324022
FB1: WURTH ELEKTRONIK 742792040
C6: PANASONIC 35SVPF82M
Conducted EMI Performance
(CISPR25 Class 5 Peak)
Conducted EMI Performance
(CISPR25 Class 5 Average)
80
80
CLASS 5 PEAK LIMIT
LT8362 400kHz fSW PEAK EMI
70
60
50
40
30
20
10
50
40
30
20
10
0
0
–10
–10
–20
0
3
6
9
12
15
18
FREQUENCY (MHz)
21
24
CLASS 5 AVERAGE LIMIT
LT8362 400kHz fSW AVERAGE EMI
70
AMPLITUDE (dBµV)
AMPLITUDE (dBµV)
60
27
–20
30
0
3
6
9
12
15
18
FREQUENCY (MHz)
21
24
27
8362 TA13a
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 400kHz
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 400kHz
Radiated EMI Performance
(CISPR25 Class 5 Average)
60
60
50
50
40
40
AMPLITUDE (dBµV/m)
AMPLITUDE (dBµV/m)
Radiated EMI Performance
(CISPR25 Class 5 Peak)
30
20
10
0
CLASS 5 PEAK LIMIT
LT8362 400kHz fSW PEAK EMI
–10
–20
0
100
200
300
400
500
600
FREQUENCY (MHz)
700
800
30
20
10
0
CLASS 5 AVERAGE LIMIT
LT8362 400kHz fSW AVERAGE EMI
–10
900
1000
–20
0
100
200
300
400
500
600
FREQUENCY (MHz)
700
8362 TA13c
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 400kHz
30
8362 TA13b
800
900
1000
8362 TA13d
12V INPUT TO 48V OUTPUT AT 300mA, fSW = 400kHz
8362fa
28
For more information www.linear.com/LT8362
LT8362
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8362#packaging for the most recent package drawings.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
5
0.200 REF
1
0.75 ±0.05
0.00 – 0.05
(DD) DFN REV C 0310
0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
8362fa
For more information www.linear.com/LT8362
29
LT8362
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8362#packaging for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
16
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
1.0 BSC
(.039)
BSC
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16 14 121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
1
3 567 8
1.0
(.039)
BSC
0.17 – 0.27
(.007 – .011)
TYP
0.50
NOTE:
(.0197)
1. DIMENSIONS IN MILLIMETER/(INCH)
BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0213 REV D
8362fa
30
For more information www.linear.com/LT8362
LT8362
REVISION HISTORY
REV
DATE
DESCRIPTION
A
12/17
Removed Lead Temperature line from Absolute Maximum Ratings
PAGE NUMBER
2
Corrected Electrical Characteristics table SSFM Maximum Frequency Deviation Condition
3
Corrected fSYNC/fOSC units
3
Corrected Soft-Start Charge Current Condition to 0.5V
4
Inverting Converter Section: Added, + |VOUT| to equation
21
Added efficiency graph to 48V Boost Converter circuit
22
Removed 200mA output current line from schematic
27
Corrected Conducted EMI Y axis units on both plots
27
Removed 100mA and 200mA output current lines from schematic
28
Edited circuit: Added lower FB resistor, shorted BIAS pin to GND
28
Corrected Conducted EMI Y axis units on both plots
28
8362fa
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license
is granted
by implication
or otherwise under any patent or patent rights of Analog Devices.
For more
information
www.linear.com/LT8362
31
LT8362
TYPICAL APPLICATION
2MHz, Low-IQ Automotive Pre-Boost Application
L1
1.5µH
VIN
2.8V TO 20V
C1
4.7µF
VIN
D1
C6
4.7pF
C3
22µF
FBX
EN/UVLO
LT8362
SYNC/MODE
RT
R1
1M
SW
VOUT
8V (while boosting)
500mA AT VIN = 2.8V
BIAS
INTVCC
SS
R3
20k
GND
C5
10nF
VC
R4
57.6k
C2
1µF
C4
150pF
D1: NXP PMEG2020EJ
L1: WURTH ELEKTRONIK LHMI 7050 74437349015
C3: TAIYO YUDEN TMK325B7226MMHP
Line Transient Response
(Pass-Through to Boosting)
R2
250k
VOUT
5V/DIV
VOUT = 8V, IOUT = 0.5A
8362 TA14
VIN
5V/DIV
VIN = 14V to 3V (20V/ms)
100µs/DIV
8362 TA14a
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT8300
100VIN Micropower Isolated Flyback Converter with
150V/260mA Switch
VIN = 6V to 100V, Low IQ Monolithic No-Opto Flyback, 5-Lead
TSOT‑23
LT8330
60V, 1A, Low IQ Boost/SEPIC/Inverting 2MHz Converter
VIN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation),
6-Lead TSOT-23, 3mm × 2mm DFN packages
LT8331
Low IQ Boost/SEPIC/Flyback/Inverting Converter with
140V/0.5A Switch
VIN = 4.5V to 100V, VOUT(MAX)=140V, IQ = 6µA (Burst Mode
Operation), MSOP-16(12)E
LT8335
28V, 2A, Low IQ Boost/SEPIC/Inverting 2MHz Converter
VIN = 3V to 25V, VOUT(MAX) = 25V, IQ = 6µA (Burst Mode Operation),
3mm × 2mm DFN package
LT8494
70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up
DC/DC Converter
VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3µA
(Burst Mode Operation), ISD = <1µA, 20-Lead TSSOP
LT8570/LT8570-1
65V, 500mA/250mA Boost/Inverting DC/DC Converter
VIN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = ±60V, IQ = 1.2mA,
ISD = <1mA, 3mm × 3mm DFN-8, MSOP-8E
LT8580
1A (ISW), 65V, 1.5MHz, High Efficiency Step-Up DC/DC
Converter
VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA,
3mm × 3mm DFN-8, MSOP-8E
8362fa
32
LT 1217 REV A • PRINTED IN USA
www.linear.com/LT8362
 ANALOG DEVICES, INC. 2017