HFU2N65F / HFD2N65F 650V N-Channel MOSFET Features Key Parameters Originative New Design Very Low Intrinsic Capacitances Excellent Switching Characteristics 100% Avalanche Tested RoHS Compliant HFU2N65F TO-251 Parameter Value Unit BVDSS 650 V ID 2 A RDS(on), Typ 4 ȍ Qg, Typ 6.5 nC HFD2N65F TO-252 Symbol D D S S G G Absolute Maximum Ratings Symbol VDSS ID TC=25 unless otherwise specified Parameter Drain-Source Voltage Value Unit 650 V Drain Current – Continuous (TC = 25) 2.0 * A Drain Current – Continuous (TC = 100) 1.3 * A – Pulsed 8.0 * A ρ30 V mJ IDM Drain Current VGS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) 110 IAR Avalanche Current (Note 1) 2.0 A EAR Repetitive Avalanche Energy (Note 1) 4.2 mJ Peak Diode Recovery dv/dt (Note 3) (Note 1) 4.5 V/ns Power Dissipation (TA = 25)* 2.5 W PD Power Dissipation (TC = 25) - Derate above 25 42 W TJ, TSTG Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds dv/dt TL 0.34 W/ -55 to +150 300 Value Unit 2.98 /W 110 /W 50 /W * Drain current limited by maximum junction temperature Thermal Resistance Characteristics Symbol Parameter RșJC Junction-to-Case, Max. RșJA Junction-to-Ambient (minimum pad of 2 oz copper), Max. RșJA Junction-to-Ambient (* 1 in2 pad of 2 oz copper), Max. క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ HFU2N65F_HFD2N65F Oct 2016 Symbol TJ=25 unless otherwise specified Parameter Test Conditions Min Typ Max Unit 2.0 -- 4.0 V On Characteristics VGS Gate Threshold Voltage VDS = VGS, ID = 250 ȝ$ RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 1 A -- 4.0 5.0 gFS Forward Transconductance VDS = 30 V ID = 1 A -- 1.2 -- S VGS = 0 V, ID = 250 ȝ$ 650 -- -- V VDS = 650 V, VGS = 0 V -- -- 10 ȝ$ VDS = 520 V, TC = 125 -- -- 100 ȝ$ VGS = ρ30 V, VDS = 0 V -- -- ρ100 nA -- 290 -- pF -- 37 -- pF -- 4.5 -- pF -- 16 -- ns -- 17 -- ns -- 28 -- ns -- 20 -- ns -- 6.5 -- nC -- 1.5 -- nC -- 2.2 -- nC Off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSS Gate-Body Leakage Current Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time VDS = 325 V, ID = 2 A, RG = 25 (Note 4,5) tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDS = 520 V, ID = 2 A, VGS = 10 V (Note 4,5) Gate-Drain Charge Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 2 ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 8 VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2 A -- -- 1.4 V trr Reverse Recovery Time -- 200 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A diF/dt = 100 A/ȝV -- 0.7 -- ȝ& A Notes : 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L=50mH, IAS=2A, VDD=50V, RG=25:, Starting TJ =25qC 3. ISD$GLGW$ȝV9DD%9DSS , Starting TJ =25 qC 4. Pulse Test : Pulse Width ȝV'XW\&\FOH 5. Essentially Independent of Operating Temperature క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ HFU2N65F_HFD2N65F Electrical Characteristics HFU2N65F_HFD2N65F Typical Characteristics 101 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V ID, Drain Current [A] ID, Drain Current [A] Top : 100 25oC 1 150oC -25oC * Notes : 1. 300us Pulse Test 2. TC = 25oC 10-1 100 * Notes : 1. VDS= 30V 2. 300us Pulse Test 0.1 101 2 3 4 5 6 7 8 9 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On Region Characteristics Figure 2. Transfer Characteristics IDR, Reverse Drain Current [A] RDS(ON)[:], Drain-Source On-Resistance 12 9 VGS = 10V 6 3 VGS = 20V 1 150oC 25oC * Notes : 1. VGS= 0V 2. 300us Pulse Test * Note : TJ = 25oC 0 0 1 2 3 4 0.1 0.2 5 0.4 ID, Drain Current[A] Ciss 300 Coss Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 200 * Note ; 1. VGS = 0 V 2. f = 1 MHz Crss 100 1.0 1.2 1.4 1.6 1.8 12 VGS, Gate-Source Voltage [V] Capacitances [pF] 400 0.8 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Figure 3. On Resistance Variation vs Drain Current and Gate Voltage 500 0.6 VSD, Source-Drain Voltage [V] 10 VDS = 130V VDS = 325V VDS = 520V 8 6 4 2 * Note : ID = 2.0A 0 10-1 0 100 101 0 1 2 3 4 5 6 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 7 క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ (continued) 2.5 RDS(ON), (Normalized) Drain-Source On-Resistance 1.2 BVDSS, (Normalized) Drain-Source Breakdown Voltage HFU2N65F_HFD2N65F Typical Characteristics 1.1 1.0 0.9 Note : 1. VGS = 0 V 2. ID = 250PA 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 Note : 1. VGS = 10 V 2. ID = 1 A 0.5 0.0 -100 200 -50 0 50 100 150 200 TJ, Junction Temperature [oC] TJ, Junction Temperature [oC] Figure 8. On-Resistance Variation vs Temperature Figure 7. Breakdown Voltage Variation vs Temperature 2.0 Operation in This Area is Limited by R DS(on) 1 10 10 Ps ID, Drain Current [A] 1 ms 10 ms 100 ms 100 DC * Notes : 1. TC = 25 oC 1.0 0.5 2. TJ = 150 oC 3. Single Pulse 10-1 100 101 102 0.0 25 103 50 75 100 125 150 TC, Case Temperature [oC] VDS, Drain-Source Voltage [V] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature D=0.5 ZTJC(t), Thermal Response ID, Drain Current [A] 1.5 100 Ps 100 * Notes : 1. ZTJC(t) = 2.98 oC/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZTJC(t) 0.2 0.1 0.05 10-1 0.02 0.01 PDM single pulse t1 -2 10 10-5 10-4 10-3 10-2 10-1 t2 100 101 t1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ HFU2N65F_HFD2N65F Fig 12. Gate Charge Test Circuit & Waveform .ȍ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% tr td(on) td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD L VDS VDD ID BVDSS IAS RG 10V ID (t) DUT VDS (t) VDD tp Time క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ HFU2N65F_HFD2N65F Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ pTwhrG O{vTY\XPG 2.3±0.1 6.6±0.2 5.35±0.15 0.75±0.15 0.8±0.15 0.6±0.1 2.3typ 7±0.2 ^U_ ±0.3 7.5·WU[G 5.6±0.2 0.5±0.05 0.5+0.1 -0.05 1.2±0.3 2.3typ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡ HFU2N65F_HFD2N65F Package Dimension HFU2N65F_HFD2N65F Package Dimension kTwhrG O{vTY\YPG 2.3±0.1 6.6±0.2 1.2±0.3 9.7+0.5 -0.3 2.7±0.3 0.5±0.05 5.6±0.2 1±0.2 5.35±0.15 1.2±0.3 0.05+0.1 -0.05 0.8±0.2 0.6±0.2 0.5+0.1 -0.05 2.3typ 2.3typ క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͡͝ΔΥΠΓΖΣ͑ͣͧ͑͢͡