STMicroelectronics L2G3IS Two-axis digital output gyroscope for optical image stabilization Datasheet

L2G3IS
MEMS motion sensor:
two-axis digital output gyroscope for optical image stabilization
Datasheet - production data
Description
The L2G3IS is a two-axis MEMS gyroscope for
optical image stabilization applications.
It includes a sensing element and an IC interface
capable of providing the measured angular rate to
the external world through an SPI digital interface.
LGA-16 (3x3.5x1 mm)
The unique sensing element is manufactured
using a dedicated micromachining process
developed by STMicroelectronics to produce
inertial sensors and actuators on silicon wafers.
Features
The IC interface is manufactured using a CMOS
process that allows a high level of integration to
design a dedicated circuit which is trimmed to
better match the sensing element characteristics.
 ±65 dps / ±130 dps full-scale range
 SPI digital interface
 Embedded temperature sensor
 Integrated low- and high-pass filters with userselectable bandwidth
 Wide supply voltage range: 2.4 V to 3.6 V
The L2G3IS is available in a plastic land grid
array (LGA) package and can operate over a
temperature range of -40 °C to +85 °C.
 Low-voltage compatible IOs (1.8 V)
 Power-down and sleep modes for smart power
saving
 ECOPACK®, RoHS and “Green” compliant
Applications
 Optical image stabilization
Table 1. Device summary
Order code
Temperature range (°C)
Package
Packing
L2G3IS
-40 to +85
LGA-16 (3x3.5x1)
Tray
L2G3ISTR
-40 to +85
LGA-16 (3x3.5x1)
Tape and reel
December 2013
This is information on a product in full production.
DocID024950 Rev 3
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www.st.com
Contents
L2G3IS
Contents
1
2
3
Block diagrams and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Digital block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Terminology & functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Zero-rate level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Synchronous reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Mechanical and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1
Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4
SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1
SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.1
SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.2
SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6
Output register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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7.1
OUT_X_L (03h), OUT_X_H (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.2
OUT_Y_L (05h), OUT_Y_H (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.3
STATUS_REG (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.4
CTRL_REG1 (0Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.5
CTRL_REG2 (0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6
CTRL_REG3 (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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Contents
7.7
ORIENT_CONFIG (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.8
CTRL_REG4 (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.9
CTRL_REG5 (1Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.10
CTRL_TEMP (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.11
OUT_TEMP (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8
Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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List of tables
L2G3IS
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 14.
Table 13.
Table 15.
Table 16.
Table 17.
Table 19.
Table 18.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
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Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SPI slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
External components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STATUS_REG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
STATUS_REG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CTRL_REG1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CTRL_REG1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CTRL_REG2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CTRL_REG2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CTRL_REG3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Low-pass filter cutoff frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CTRL_REG3 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ORIENT_CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ORIENT_CONFIG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Directional orientation selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CTRL_REG4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CTRL_REG4 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CTRL_REG5 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CTRL_REG5 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High-pass filter cutoff frequency selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CTRL_TEMP register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CTRL_TEMP description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
OUT_TEMP register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
OUT_TEMP description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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L2G3IS
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Digital block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
L2G3IS electrical connections and external component values . . . . . . . . . . . . . . . . . . . . . 14
SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Multiple byte SPI write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
LGA-16: mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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Block diagrams and pin description
1
L2G3IS
Block diagrams and pin description
Figure 1. Block diagram
MUX
MEMS SENSOR
Actuation Interface
SPI
C- V
converter
SC filter
ADC
BW Selection
FS Selection
1.1
Digital
filters
Digital block diagram
Figure 2. Digital block diagram
0
DataReg
ADC
LPF
HPF
1
HPF
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SPI
L2G3IS
1.2
Block diagrams and pin description
Pin description
Figure 3. Pin connections
CS
+Ω Y
1
SCL
Res
9
Res
4
8
GND
5
Res
Res
DRDY
Res
(TOP VIEW)
DIRECTIONS OF THE
DETECTABLE
ANGULAR RATES
Vdd_IO
Res
BOTTOM
VIEW
SDI/SDO
+Ω X
Vdd
Vdd
Cap
Reg
16
13
12
Table 2. Pin description
Pin#
Name
Function
1
Vdd_IO
2
Res
Connect to GND
3
Res
Connect to GND
4
GND
0 V power supply
5
Res
Leave unconnected
6
Res
Connect to GND
7
DRDY
8
Res
Leave unconnected
9
Res
Leave unconnected
10
SDI/SDO
Data-in, data-out line
11
SCL
Clock line for SPI interface
12
CS
SPI chip-select line
13
Reg
Capacitance connection pin for internal regulator
14
Cap
Capacitance connection pin for internal charge pump
15
Vdd
Power supply
16
Vdd
Power supply
Power supply for I/O pins
Data ready signal (open-drain pad)
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Terminology & functionality
L2G3IS
2
Terminology & functionality
2.1
Sensitivity
An angular rate gyroscope is a device that produces a positive-going digital output for
counterclockwise rotation around the sensitive axis considered. Sensitivity describes the
gain of the sensor and can be determined by applying a defined angular velocity to it. This
value changes very little over temperature and time.
2.2
Zero-rate level
The zero-rate level describes the actual output signal if there is no angular rate present. The
zero-rate level of highly accurate MEMS sensors is, to some extent, a result of stress to the
sensor and therefore the zero-rate level can slightly change after mounting the sensor on a
printed circuit board or after exposing it to extensive mechanical stress. This value changes
very little over temperature and time.
2.3
Synchronous reading
On the L2G3IS the angular rate data can be retrieved using a synchronous read. This
functionality is recommended to improve the sensor performance.
To perform a synchronous read when using the SPI interface, the REG_EN bit in
CTRL_REG1 (0Bh) has to be set to ‘1’. Then the DRDY_EN bit in CTRL_REG4 (15h) has to
be set to '1' in order to enable the data ready interrupt on the DRDY pin (refer to Figure 5).
To properly perform a synchronous read, the angular rate data have to be read every time
the DRDY pin goes low.
2.4
Temperature sensor
To retrieve the temperature data, the gyroscope has to be in sleep mode (PW<1:0> bit in
CTRL_REG1 (0Bh) set to ‘10’), the REG_EN bit in CTRL_REG1 (0Bh) has to be set to ‘1’
and the temperature sensor can be enabled by setting the TEMP_EN bit to ‘1’ in
CTRL_TEMP (20h).
The temperature data can be retrieved from the OUT_TEMP (26h) register, as two’s
complement data in 8-bit format left-justified. The output of the temperature sensor is 0 at
25 °C.
Once the temperature data have been acquired, the temperature sensor has to be turned off
to restart the acquisition of the angular rate data. The TEMP_EN bit in CTRL_TEMP (20h)
has to be set to ‘0’ and the gyroscope operative mode has to be changed to normal mode
(PW<1:0> bit in CTRL_REG1 (0Bh) set to ‘11’).
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L2G3IS
Mechanical and electrical characteristics
3
Mechanical and electrical characteristics
3.1
Mechanical characteristics
Vdd = 3.3 V and T = 25 °C unless otherwise noted(a).
Table 3. Mechanical characteristics
Symbol
Parameter
FS
Measurement range
So
Sensitivity
SoDr
Sensitivity change vs.
temperature
DVoff
OffDr
Test condition
Min.
Typ.(1)
Max.
±65
Unit
dps
±130
FS = ±65 dps
225
FS = ±130 dps
112.5
LSb/dps
±3
%
Digital zero-rate level
±5
dps
Zero-rate level change
From -40 °C to +85 °C
vs. temperature
±9
dps
From -40 °C to +85 °C
NL
Non-linearity(2)
Best-fit straight line
±0.1
% FS
Rn
Rate noise density(2)
0 - 20 Hz bandwidth
0.006
dps   Hz 
BW
Internal bandwidth
LPF set to ‘1’
370
Hz
PhDl
Phase delay
At 20 Hz (370 Hz BW selected)
4.5
deg
ODR
Digital output data rate
9.5
kHz
Top
Operating temperature
range
-40
+85
°C
1. Typical specifications are not guaranteed.
2. Guaranteed by design.
a. The product is factory calibrated at 3.3 V. The operational power supply range is specified in Table 4.
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Mechanical and electrical characteristics
3.2
L2G3IS
Electrical characteristics
@ Vdd = 3.3 V, T = 25 °C unless otherwise noted(b).
Table 4. Electrical characteristics
Symbol
Parameter
Test condition
Min.
Typ.(1)
Max.
Unit
3.3
3.6
V
Vdd+0.1
V
Vdd
Supply voltage
2.42
Vdd_IO
I/O pins supply
voltage(2)
1.71
Idd
Supply current in
normal mode
6.4
mA
IddSL
Supply current in
sleep mode(3)
2.5
mA
IddPdn
Supply current in
power-down mode
20
μA
VIH
Digital high-level
input voltage
VIL
Digital low-level
input voltage
Top
Operating
temperature range
0.8*Vdd_IO
-40
V
0.2*Vdd_IO
V
+85
°C
1. Typical specifications are not guaranteed.
2. It is possible to remove Vdd maintaining Vdd_IO without blocking the communication busses, in this condition the
measurement chain is powered off.
3. Sleep mode introduces a faster turn-on time relative to power-down mode.
b. The product is factory calibrated at 3.3 V.
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L2G3IS
3.3
Mechanical and electrical characteristics
Temperature sensor characteristics
@ AVdd = 3.3 V, T = 25 °C unless otherwise noted(c).
Table 5. Temperature sensor characteristics
Symbol
Parameter
Test condition
Min.
Typ.(1)
Max.
Unit
TSDr
Temperature sensor
output change vs.
temperature
1
°C/digit
TODR
Temperature refresh rate
1
Hz
TACC
Temperature absolute
accuracy(2)
±4
°C
Top
Operating temperature
range
-40
+85
°C
1. Typical specifications are not guaranteed.
2. The output of the temperature sensor is 0 at 25 °C. Refer to Section 2.4: Temperature sensor on how to enable and read
the temperature sensor output data.
c. The product is factory calibrated at 3.3 V.
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Mechanical and electrical characteristics
3.4
L2G3IS
SPI - serial peripheral interface
Subject to general operating conditions for Vdd and Top.
Table 6. SPI slave timing values
Value(1)
Symbol
Parameter
Unit
Min
tc(SPC)
SPI clock cycle
fc(SPC)
SPI clock frequency
tsu(CS)
CS setup time
5
th(CS)
CS hold time
8
tsu(SI)
SDI input setup time
5
th(SI)
SDI input hold time
15
tv(SO)
SDO valid output time
th(SO)
SDO output hold time
tdis(SO)
SDO output disable time
Max
100
ns
10
MHz
ns
50
6
50
1. Values are guaranteed at 10 MHz clock frequency for SPI, based on characterization results, not tested in production.
Figure 4. SPI slave timing diagram
CS
(3)
tc(S PC)
tsu(CS)
t h(CS)
SPC
(3)
tsu(S I)
SDI/SDO
th(SI)
tv(SO)
SDI/SDO
Note:
12/26
(3)
LSB IN
MSB IN
tdis(SO)
th (SO)
MSB OUT
LSB OUT
(3)
Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output
ports.
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L2G3IS
3.5
Mechanical and electrical characteristics
Absolute maximum ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage
to the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Absolute maximum ratings
Symbol
Maximum value
Unit
AVdd
Supply voltage
-0.3 to 4.8
V
HAVdd
Supply voltage
-0.3 to 4.8
V
Vdd_IO
Vdd IO
-0.3 to Vdd
V
-0.3 to Vdd_IO +0.1
V
-40 to +125
°C
10,000
g
2 (HBM)
kV
Vin
TSTG
Sg
ESD
Note:
Ratings
Input voltage on:
(CS, SDI/SDO, SCL)
Storage temperature range
Acceleration g for 0.1 ms
Electrostatic discharge protection
Supply voltage on any pin should never exceed 4.8 V.
This device is sensitive to mechanical shock, improper handling can cause
permanent damage to the part.
This device is sensitive to electrostatic discharge (ESD), improper handling can
cause permanent damage to the part.
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Application hints
4
L2G3IS
Application hints
Figure 5. L2G3IS electrical connections and external component values
AVdd
GND
C3
GND
C2
C1
16
Vdd_IO
+Ω X
GND
13
1
CS
12
TOP
VIEW
Res
(TOP VIEW)
DIRECTIONS OF THE
DETECTABLE
ANGULAR RATES
14
Reg
Cap
+Ω Y
Vdd
Vdd
C4
SCL
SDI/SDO
Res
GND
9
4
1
Res
8
Res1 Res
DRDY
5
Res1
In case of synchronous reading for output data
Vdd_IO
Rpu= 10kOhm
DRDY
1. This pin must be left unconnected
Table 7. External components
Type description
Value
Purpose
C1
1 μF
Decoupling
C2
100 pF
Decoupling
10 nF (16 V class)
Charge pump
220 nF (5 V class)
Internal regulator
(1)
C3
C4
1. This value must guarantee a minimum of 1 nF value under 12 V bias condition.
Power supply decoupling capacitors (100 pF + 1 μF) should be placed as near as possible
to the device (common design practice). A pull-up resistor must be added to the DRDY line
(open-drain pad).
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5
Digital interfaces
Digital interfaces
The registers embedded inside the L2G3IS may be accessed through the SPI serial
interfaces.
Table 8. Serial interface pin description
Pin name
CS
Chip-select line
SCL
SPI serial port clock
SDI/SDO
5.1
Pin description
SPI serial data input/output
SPI bus interface
The SPI is a bus slave. The SPI allows to write and read the registers of the device.
The serial interface interacts with the outside world with 3 wires: CS, SCL, SDI/SDO.
CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of
the transmission and goes back high at the end. SCL is the serial port clock and it is
controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI/SDO
is the serial port data input and output. This line is driven at the falling edge of SCL and
should be captured at the rising edge of SCL.
Both the read register and write register commands are completed in 16 clock pulses or in
multiples of 8 in case of multiple read/write bytes. Bit duration is the time between two falling
edges of SCL. The first bit (bit 0) starts at the first falling edge of SCL after the falling edge
of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SCL just before the
rising edge of CS.
5.1.1
SPI write
Figure 6. SPI write protocol
CS
SCL
SDI/SDO
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
RW
MS AD5 AD4 AD3 AD2 AD1 AD0
The SPI write command is performed with 16 clock pulses. A multiple byte write command
is performed by adding blocks of 8 clock pulses to the previous one.
bit 0: WRITE bit. The value is 0.
bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in
multiple writes.
bit 2 -7: address AD(5:0). This is the address field of the indexed register.
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Digital interfaces
L2G3IS
bit 8-15: data DI(7:0) (write mode). This is the data that will be written inside the device
(MSb first).
bit 16-... : data DI(...-8). Further data in multiple byte writes.
Figure 7. Multiple byte SPI write protocol (2-byte example)
CS
SCL
SDI/SDO
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
RW
MS AD5 AD4 AD3 AD2 AD1 AD0
5.1.2
SPI read
Figure 8. SPI read protocol
CS
SCL
SDI/SDO
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
RW
MS AD5 AD4 AD3 AD2 AD1 AD0
The SPI read command is performed with 16 clock pulses:
bit 0: READ bit. The value is 1.
bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in
multiple reads.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb
first).
A multiple read command is also available.
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6
Output register mapping
Output register mapping
The table given below provides a listing of the 8-bit registers embedded in the device and
the related addresses.
Table 9. Register address map
Name
Type
Register
address
[Hex]
Default
[Hex]
Reserved
--
00-02
--
OUT_X_L
r
03
output
OUT_X_H
r
04
output
OUT_Y_L
r
05
output
OUT_Y_H
r
06
output
Reserved
r
07-08
--
STATUS_REG
r
09
output
Reserved
--
0A
--
CTRL_REG1
rw
0B
01
CTRL_REG2
rw
0C
00
CTRL_REG3
rw
0D
00
ORIENT_CONFIG
rw
10
00
Reserved
--
11-14
--
CTRL_REG4
rw
15
00
Reserved
--
16-1E
--
CTRL_REG5
rw
1F
00
CTRL_TEMP
rw
20
04
Reserved
--
21-25
--
OUT_TEMP
r
26
output
Comment
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Registers marked as Reserved must not be changed. Writing to those registers may cause
permanent damage to the device.
To guarantee proper behavior of the device, all register addresses not listed in the above
table must not be accessed and the content stored in those registers must not be changed.
The content of the registers that are loaded at boot should not be changed. They contain the
factory calibration values. Their content is automatically restored when the device is
powered up.
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Register description
7
L2G3IS
Register description
The device contains a set of registers which are used to control its behavior and to retrieve
angular rate data. The register address, consisting of 7 bits, is used to identify them and to
write the data through the serial interface.
7.1
OUT_X_L (03h), OUT_X_H (04h)
X-axis angular rate data. The value is expressed as two’s complement.
7.2
OUT_Y_L (05h), OUT_Y_H (06h)
Y-axis angular rate data. The value is expressed as two’s complement.
7.3
STATUS_REG (09h)
Table 10. STATUS_REG register
YXOR
XOR
YOR
0
YXDA
XDA
YDA
0
Table 11. STATUS_REG description
7.4
YXOR
X, Y-axis data overrun. Default value: 0
(0: no overrun has occurred; 1: new data has overwritten the previous data before it was
read)
XOR
X-axis data overrun. Default value: 0
(0: no overrun has occurred; 1: new data for the X-axis has overwritten the previous data)
YOR
Y-axis data overrun. Default value: 0
(0: no overrun has occurred; 1: new data for the Y-axis has overwritten the previous data)
YXDA
X, Y-axis new data available. Default value: 0
(0: a new set of data is not yet available; 1: a new set of data is available)
XDA
X-axis new data available. Default value: 0
(0: new data for the X-axis is not yet available; 1: new data for the X-axis is available)
YDA
Y-axis new data available. Default value: 0
(0: new data for the Y-axis is not yet available;1: new data for the Y-axis is available)
CTRL_REG1 (0Bh)
Table 12. CTRL_REG1 register
0(1)
0(1)
0(1)
0(1)
BDU
1. These bits must be set to ‘0’ for proper operation of the device.
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REG_EN
PW1
PW0
L2G3IS
Register description
Table 13. CTRL_REG1 description
BDU
Block data update. Default value: 0.
(0: output registers not updated until MSB and LSB have been read;
1: output registers updated continuously)
REG_EN
Enables writing to CTRL_REG4 (15h), CTRL_REG5 (1Fh) and CTRL_TEMP
(20h). Default value: 0
(1: enable write values in CTRL_REG4 (15h), CTRL_REG5 (1Fh)) and CTRL_TEMP (20h))
PW[1:0]
Operating mode selection. Default: 01.
Refer to Table 14: Operating mode selection.
Table 14. Operating mode selection
7.5
PW1
PW0
Operating mode selection
0
0
Power-down
0
1
Power-down
1
0
Sleep mode
1
1
Normal mode
CTRL_REG2 (0Ch)
Table 15. CTRL_REG2 register
0(1)
0(1)
0(1)
HPFreset0 HPFreset1
0(1)
SWreset
HPF
1. These bits must be set to ‘0’ for proper operation of the device.
Table 16. CTRL_REG2 description
7.6
HPFreset0
High-pass filter reset. Default: 0
To reset the HPF, HPFreset1 or HPFreset0 has to be set to 1.
(1: HPF reset on X-axis and Y-axis)
HPFreset1
High-pass filter reset. Default: 0
To reset the HPF, HPFreset1 or HPFreset0 has to be set to 1.
(1: HPF reset on X-axis and Y-axis)
SWreset
Software reset. Default: 0.
(1: all control and output register values are restored to default values).
HPF
High-pass filter enable. Default: 0.
(0: high-pass filter is disabled; 1: high-pass filter is enabled)
CTRL_REG3 (0Dh)
Table 17. CTRL_REG3 register
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
0(1)
LPF
1. These bits must be set to ‘0’ for proper operation of the device.
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Register description
L2G3IS
Table 18. CTRL_REG3 description
Low-pass filter cutoff frequency selection. Default value 0. (0: 120 Hz; 1: 370 Hz).
If LPF2 in CTRL_REG5 (1Fh) is set to ‘1’, the cutoff frequency is set to 240 Hz,
independently of the value of LPF.
LPF
Table 19. Low-pass filter cutoff frequency
7.7
LPF
LPF2 (CTRL_REG5 (1Fh))
Low-pass filter cutoff frequency selection
0
0
120 Hz
1
0
370 Hz
0
1
240 Hz
1
1
240 Hz
ORIENT_CONFIG (10h)
Table 20. ORIENT_CONFIG register
0(1)
0(1)
Sign_x
0(1)
Sign_y
Orient_2
Orient_1
Orient_0
1. These bits must be set to ‘0’ for proper operation of the device.
Table 21. ORIENT_CONFIG description
Sign_x
X-axis angular rate sign. Default 0.
(0: sign unvaried; 1: sign inverted)
Sign_y
Y-axis angular rate sign. Default 0.
(0: sign unvaried; 1: sign inverted)
Directional orientation selection. Default 000.
Refer to Table 22: Directional orientation selection.
Orient[2:0]
Table 22. Directional orientation selection
7.8
Orient_2
Orient_1
Orient_0
Directional orientation selection
0
0
0
x-axis - y-axis
0
1
0
y-axis - x-axis
CTRL_REG4 (15h)
To enable writing to the CTRL_REG4 (15h) register, the REG_EN bit in CTRL_REG1 (0Bh)
has to be set to ‘1’.
Table 23. CTRL_REG4 register
0(1)
0(1)
0(1)
0(1)
0(1)
1. These bits must be set to ‘0’ for proper operation of the device
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0(1)
0(1)
DRDY_EN
L2G3IS
Register description
Table 24. CTRL_REG4 description
DRDY_EN
7.9
Data ready enable on DRDY pin. Default 0.
(1: DRDY on pin). Refer to Section 2.3: Synchronous reading.
CTRL_REG5 (1Fh)
To enable writing to the CTRL_REG5 (1Fh) register, the REG_EN bit in CTRL_REG1 (0Bh)
has to be set to ‘1’.
Table 25. CTRL_REG5 register
--
--
--
--
FS
LPF2
HPF_BW1
HPF_BW0
Table 26. CTRL_REG5 description
FS
Full-scale selection. Default value: 0
(0: ±65 dps; 1: ±130 dps)
LPF2
Enable low-pass filter 240 Hz. Default 0.
If LPF2 is enabled, the cutoff frequency is set to 240 Hz, independently of the
value of the LPF bit in CTRL_REG3 (0Dh).
Refer to Table 19: Low-pass filter cutoff frequency.
HPF_BW[1:0]
Digital high-pass filter cutoff frequency selection. Default value 00.
Refer to Table 27: High-pass filter cutoff frequency selection
Table 27. High-pass filter cutoff frequency selection
HPF_BW1
HPF_BW0
HP cutoff frequency selection
0
0
0.02 Hz
0
1
0.08 Hz
1
0
4.85 Hz
1
1
39.6 Hz
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Register description
7.10
L2G3IS
CTRL_TEMP (20h)
To enable writing to the CTRL_TEMP (20h) register, the REG_EN bit in CTRL_REG1 (0Bh)
has to be set to ‘1’.
Table 28. CTRL_TEMP register
(1)
0
0
(1)
0
(1)
0(1)
TEMP_EN 1(2)
0(1)
0(1)
1. These bits must be set to ‘0’ for proper operation of the device.
2. This bit must be left at ‘1’ for proper operation of the device.
Table 29. CTRL_TEMP description
TEMP_EN
7.11
Temperature sensor enable. Default 0
(0: temperature sensor is disabled; 1: temperature sensor is enabled).
Refer to: Section 2.4: Temperature sensor on how to enable and read the
temperature sensor output data.
OUT_TEMP (26h)
Table 30. OUT_TEMP register
Temp7
Temp6
Temp5
Temp4
Temp3
Temp2
Temp1
Temp0
Table 31. OUT_TEMP description
Temp7-Temp0
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Temperature data. The value is expressed as two’s complement left-justified.
The output of the temperature sensor is 0 at 25 °C.
Refer to: Section 2.4: Temperature sensor on how to enable and read the
temperature sensor output data.
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8
Soldering information
Soldering information
The LGA package is compliant with the ECOPACK®, RoHS and “Green” standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at www.st.com/mems.
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Package information
9
L2G3IS
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Figure 9. LGA-16: mechanical data and package dimensions
Dimensions (mm)
Ref.
Min.
Typ.
A1
1
A2
0.785
A3
0.200
D1
Max.
2.850
3.000
E1
3.500
L
1.750
N
0.500
3.150
M
0.040
0.100
0.160
M1
0.290
0.350
0.410
P
1.200
T1
0.290
0.350
0.410
T2
0.190
0.250
0.310
d
0.150
k
0.050
8409170_A
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Revision history
Revision history
Table 32. Document revision history
Date
Revision
Changes
16-Jul-2013
1
Initial release
28-Aug-2013
2
Updated Figure 5: L2G3IS electrical connections and external
component values
Moved Figure 2: Digital block diagram
05-Dec-2013
3
Document status promoted from preliminary data to production data;
updated Table 15: CTRL_REG2 register and Table 16: CTRL_REG2
description
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L2G3IS
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