NCP511 150 mA CMOS Low Iq Low−Dropout Voltage Regulator The NCP511 series of fixed output low dropout linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent current. The NCP511 series features an ultra−low quiescent current of 40 A. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. The NCP511 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 1.0 F. The device is housed in the micro−miniature TSOP−5 surface mount package. Standard voltage versions are 1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V, 3.3 V, and 5.0 V. Other voltages are available in 100 mV steps. 5 1 TSOP−5 (SOT23−5, SC59−5) SN SUFFIX CASE 483 PIN CONNECTIONS AND MARKING DIAGRAM Features Low Quiescent Current of 40 A Typical Low Dropout Voltage of 100 mV at 100 mA Excellent Line and Load Regulation Maximum Operating Voltage of 6.0 V Low Output Voltage Option High Accuracy Output Voltage of 2.0% Industrial Temperature Range of −40°C to 85°C Pb−Free Packages are Available Vin 1 GND 2 Enable 3 5 Vout 4 N/C xxxYW • • • • • • • • http://onsemi.com xxx = Version Y = Year W = Work Week Typical Applications • • • • (Top View) Cellular Phones Battery Powered Instruments Hand−Held Instruments Camcorders and Cameras ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Vin Vout 1 5 Thermal Shutdown Driver w/ Current Limit Enable ON 3 OFF GND 2 This device contains 82 active transistors Figure 1. Representative Block Diagram Semiconductor Components Industries, LLC, 2004 March, 2004 − Rev. 9 1 Publication Order Number: NCP511/D NCP511 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION Pin No. Pin Name Description 1 Vin 2 GND 3 Enable 4 N/C No internal connection. 5 Vout Regulated output voltage. Positive power supply input voltage. Power supply ground. This input is used to place the device into low−power standby. When this input is pulled low, the device is disabled. If this function is not used, Enable should be connected to Vin. MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Rating Symbol Value Unit Vin 0 to 6.0 V Enable Voltage Enable −0.3 to Vin +0.3 V Output Voltage Vout −0.3 to Vin +0.3 V Power Dissipation and Thermal Characteristics Power Dissipation Thermal Resistance, Junction to Ambient PD RJA Internally Limited 250 W °C/W Operating Junction Temperature TJ +125 °C Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Tstg −55 to +150 °C Input Voltage 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V 2. Latch up capability (85°C) 100 mA DC with trigger voltage. http://onsemi.com 2 NCP511 ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.) + 1.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.) Characteristic Symbol Output Voltage (TA = 25°C, Iout = 1.0 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.3 V 5.0 V Vout Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.3 V 5.0 V Vout Line Regulation (Iout = 10 mA) 1.5 V−4.4 V (Vin = Vout(nom.) + 1.0 V to 6.0 V) 4.5 V−5.0 V (Vin = 5.5 V to 6.0 V) Regline Load Regulation (Iout = 1.0 mA to 150 mA) Regload Output Current (Vout = (Vout at Iout = 150 mA) −3%) 1.5 V−1.8 V (Vin = 4.0 V) 1.9 V−3.0 V (Vin = 5.0 V) 3.1 V−5.0 V (Vin = 6.0 V) Iout(nom.) Dropout Voltage (Iout = 100 mA, Measured at Vout −3.0%) 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 3.0 V 3.3 V 5.0 V Vin−Vout Quiescent Current (Enable Input = 0 V) (Enable Input = Vin, Iout = 1.0 mA to Io(nom.)) IQ Output Voltage Temperature Coefficient TC Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Min Typ Max 1.455 1.746 2.425 2.646 2.744 2.94 3.234 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.3 5.0 1.545 1.854 2.575 2.754 2.856 3.06 3.366 5.100 1.455 1.746 2.425 2.619 2.716 2.910 3.201 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.3 5.0 1.545 1.854 2.575 2.781 2.884 3.09 3.399 5.100 − − 1.0 1.0 3.5 3.5 − 0.3 0.8 150 150 150 − − − − − − − − − − − − − − 245 160 110 100 100 100 90 75 350 200 200 200 200 200 200 200 − − 0.1 40 1.0 100 − 100 − 1.3 − − − − 0.3 200 200 200 400 400 400 800 800 800 V V mV/V mV/mA mA mV A Vth(en) Output Short Circuit Current (Vout = 0 V) 1.5 V−1.8 V (Vin = 4.0 V) 1.9 V−3.0 V (Vin = 5.0 V) 3.1 V−5.0 V (Vin = 6.0 V) Unit ppm/°C V Iout(max) mA Ripple Rejection (f = 1.0 kHz, Io = 60 mA) RR − 50 − dB Output Noise Voltage (f = 20 Hz to 100 kHz, Iout = 60 mA) Vn − 110 − Vrms 3. Maximum package power dissipation limits must be observed. T TA PD J(max) RJA 4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. http://onsemi.com 3 NCP511 3.5 200 DROPOUT VOLTAGE (mV) 180 Vout, OUTPUT VOLTAGE (V) Vout(nom.) = 3.0 V Iout = 150 mA 160 140 120 Iout = 100 mA 100 80 Iout = 50 mA 60 40 Iout = 1 mA Iout = 10 mA 20 0 −60 −40 −20 2.5 2.0 20 40 60 80 Vout(nom.) = 3.0 V IO = 0 mA Cin = 1.0 F Cout = 1.0 F TA = 25°C Venable = Vin 1.5 1.0 0.5 0 0 100 120 140 0 1 2 4 5 6 Vin, INPUT VOLTAGE (V) Figure 2. Dropout Voltage vs. Temperature Figure 3. Output Voltage vs. Input Voltage 7 GROUND PIN CURRENT (A) 45 45 40 35 30 Vin = Vout(nom.) + 0.5 V Vout(nom.) = 3.0 V IO = 0 mA 25 20 −50 43 41 39 37 35 33 31 Vout(nom.) = 3.0 V Vin = 5.0 V TA = 25°C 29 27 25 −25 0 25 50 75 100 0 125 25 Figure 4. Quiescent Current vs. Temperature 450 400 35 350 CURRENT LIMIT (mA) 45 30 25 20 15 Vout(nom.) = 3.0 V Iout = 50 mA TA = 25°C 5 75 100 125 150 Figure 5. Ground Pin Current vs. Output Current 40 10 50 Iout, OUTPUT CURRENT (mA) TEMPERATURE (°C) GROUND PIN CURRENT (A) 3 TEMPERATURE (°C) 50 IQ, QUIESCENT CURRENT (A) 3.0 300 250 200 150 100 Vout(nom.) = 3.0 V Cin = 1.0 F 50 0 0 0 1 2 3 4 5 6 0 1 2 3 4 5 Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 6. Ground Pin Current vs. Input Voltage Figure 7. Current Limit vs. Input Voltage http://onsemi.com 4 6 NCP511 Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) 5 4 3 4 3 100 Vin = 3.5 V to 4.5 V Vout = 3.0 V Cout = 1 F Iout = 1 mA 40 20 OUTPUT VOLTAGE DEVIATION (mV) OUTPUT VOLTAGE DEVIATION (mV) 60 5 0 −20 −40 50 0 −50 −100 20 100 200 300 400 500 600 700 800 900 40 60 100 120 140 160 180 Figure 9. Line Transient Response Figure 8. Line Transient Response Vin, INPUT VOLTAGE (V) 80 TIME (s) TIME (s) 5 4 3 150 Cout = 1 F Iout = 150 mA 100 OUTPUT VOLTAGE DEVIATION (mV) Cout = 1 F Iout = 100 mA Vin = 3.5 V to 4.5 V Vout = 3.0 V 50 0 −50 −100 Vin = 3.5 V to 4.5 V Vout = 3.0 V −150 −200 20 40 60 80 100 120 140 160 180 TIME (s) Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 10. Line Transient Response 150 Vin = 3.5 V Vout = 3.0 V Cin = 1 F Cout = 10 F Iout = 1 mA to 150 mA Vin = 3.5 V Vout = 3.0 V 0 OUTPUT VOLTAGE DEVIATION (mV) 0 OUTPUT VOLTAGE DEVIATION (mV) 150 20 10 0 −10 200 400 600 800 1000 1200 1400 1600 1800 200 100 Cin = 1 F Cout = 1 F IO = 1 mA to 150 mA 0 −100 −200 200 400 600 800 1000 1200 1400 1600 1800 TIME (s) TIME (s) Figure 11. Load Transient Response Figure 12. Load Transient Response http://onsemi.com 5 ENABLE VOLTAGE (V) NCP511 2 1 0 Vin = 3.5 V Vout = 3.0 V TA = 25°C Iout = 1 mA Cin = 1 F Vout, OUTPUT VOLTAGE (V) 4 3 Cout = 10 F Cout = 1 F 2 1 0 20 40 60 80 100 120 140 160 180 TIME (s) Figure 13. Turn−On Response 70 Vout = 1.5 V Vin = 2.5 V Iout = 60 mA Cout = 2.2 F 1.4 1.2 RR, RIPPLE REJECTION (dB) OUTPUT NOISE DENSITY (V/HZ) 1.6 1.0 0.8 0.6 0.4 0.2 0 0.01 0.1 1.0 10 100 1000 Vout = 3.0 V Vin = 3.5 VDC 0.25 V Iout = 60 mA Cout = 1.0 F 60 50 40 30 20 10 0 100 1k 10 k 100 k f, FREQUENCY (kHz) f, FREQUENCY (Hz) Figure 14. Output Noise Density Figure 15. Ripple Rejection vs. Frequency http://onsemi.com 6 1M NCP511 DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 3.0% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Maximum Power Dissipation The maximum total dissipation for which the regulator will operate within its specifications. Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. Maximum Package Power Dissipation The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current. http://onsemi.com 7 NCP511 APPLICATIONS INFORMATION Thermal A typical application circuit for the NCP511 series is shown in Figure 16. As power across the NCP511 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material and also the ambient temperature effect the rate of temperature rise for the part. This is stating that when the NCP511 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. The maximum dissipation the package can handle is given by: Input Decoupling (C1) A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP511 package. Higher values and lower ESR will improve the overall line transient response. Output Decoupling (C2) The NCP511 is a stable Regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 3.0 can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. T TA PD J(max) RJA If junction temperature is not allowed above the maximum 125°C, then the NCP511 can dissipate up to 400 mW @ 25°C. The power dissipated by the NCP511 can be calculated from the following equation: Enable Operation Ptot [Vin * Ignd (Iout)] [Vin Vout] * Iout The enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to Vin. or P Vout * Iout VinMAX tot Ignd Iout Hints If a 150 mA output current is needed then the ground current from the data sheet is 40 A. For an NCP511SN30T1 (3.0 V), the maximum input voltage will then be 5.6 V. Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads a short as possible. Battery or Unregulated Voltage C1 + 1 Vout 5 + 2 ON 3 ESR, OUTPUT CAPACITOR () 100 C2 UNSTABLE 10 0.1 0.01 4 Cout = 1 F to 10 F TA = 25°C to 125°C Vin = up to 6.0 V 1 STABLE 0 OFF 25 50 75 100 125 150 IO, OUTPUT CURRENT (mA) Figure 16. Typical Application Circuit Figure 17. Output Capacitor vs. Output Current http://onsemi.com 8 NCP511 APPLICATION CIRCUITS Input R1 Input Q1 Q1 R2 R Output R3 1.0 F 3 1.0 F 3 Figure 18. Current Boost Regulator Short circuit current limit is essentially set by the VBE of Q2 and R1. ISC = ((VBEQ2 − ib * R2) / R1) + IO(max) Regulator Enable Voltage (V) Input Output 5 1.0 F 1.0 F 2 Enable 4 3 1 Vout, Output Voltage (V) Output 5 1 1.0 F 2 3 4 C TA = 25°C Vin = 3.5 V Vout = 3.0 V 2 4 1.0 F 4 Figure 19. Current Boost Regulator with Short Circuit Limit The NCP511 series can be current boosted with a PNP transistor. Resistor R in conjunction with VBE of the PNP determines when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by VBE of the pass resistor. 3 1.0 F 2 4 1 5 1 2 R Output 5 1 1.0 F Q2 0 3 R = 1.0 mW M C = 0.1 F 1 0 R = 1.0 M C = 1.0 F No Delay 2 0 20 40 60 80 100 120 140 160 Time (ms) Figure 20. Delayed Turn−on Figure 21. Delayed Turn−on The graph shows the delay between the enable signal and output turn−on for various resistor and capacitor values. If a delayed turn−on is needed during power up of several voltages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn−on of the bottom regulator. A few values were chosen and the resulting delay can be seen in Figure 21. Input Output Q1 R 1 1.0 F 5 1.0 F 2 3 4 5.6 V Figure 22. Input Voltages Greater than 6.0 V A regulated output can be achieved with input voltages that exceed the 6.0 V maximum rating of the NCP511 series with the addition of a simple pre−regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (Vout) is shorted to GND. http://onsemi.com 9 NCP511 ORDERING INFORMATION Device NCP511SN15T1 NCP511SN15T1G NCP511SN18T1 NCP511SN18T1G NCP511SN25T1 NCP511SN25T1G NCP511SN27T1 NCP511SN27T1G NCP511SN28T1 NCP511SN28T1G NCP511SN30T1 NCP511SN30T1G NCP511SN33T1 NCP511SN33T1G NCP511SN50T1 NCP511SN50T1G Nominal Output Voltage Marking Package Shipping† 1.5 1.5 1.8 1.8 2.5 2.5 2.7 2.7 2.8 2.8 3.0 3.0 3.3 3.3 5.0 5.0 LBU LBU LBV LBV LBW LBW LBX LBX LBY LBY LBZ LBZ LCA LCA LCB LCB TSOP 5 TSOP−5 3000 Units/ 7″ Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. NOTE: Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative. http://onsemi.com 10 NCP511 PACKAGE DIMENSIONS TSOP−5/SOT23−5/ SC59−5 SN SUFFIX PLASTIC PACKAGE CASE 483−02 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L G A MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 J C 0.05 (0.002) H M K SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches TSOP−5/THIN SOT23−5/SC59−5 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NCP511 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 12 For additional information, please contact your local Sales Representative. NCP511/D