Order Now Product Folder Technical Documents Support & Community Tools & Software MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 MCP629x 10-MHz, Rail-to-Rail Operational Amplifier 1 Features 3 Description • • • • • • • • • • The MCP6291 (single), MCP6292 (dual), and MCP6294 (quad) devices comprise a family of general-purpose, low-power operational amplifiers. Features such as rail-to-rail input and output swings, low quiescent current (600 μA/ch typical) combined with a wide bandwidth of 10 MHz, and very-low noise (8.7 nV/√Hz at 10 kHz) make this family attractive for a variety of applications that require a good balance between cost and performance. Its low input bias current enables the family to be used in applications with high-source impedances. 1 Gain Bandwidth Product: 10 MHz Typical Operating Supply Voltage: 2.4 V to 5.5 V Rail-to-Rail Input/Output Low Input Bias Current: 1 pA Low Quiescent Current: 0.6 mA Input Voltage Noise: 8.7 nV/√Hz at f = 10 kHz Internal RF and EMI Filter Extended Temperature Range: –40°C to +125°C Unity-Gain Stable Easier to Stabilize with Higher Capacitive Load Due to Resistive Open-Loop Output Impedance 2 Applications • • • • • • • • • • • • Power Modules Smoke Detectors HVAC: Heating, Ventilating, and Air Conditioning Battery-Powered Applications Sensor Signal Conditioning Photodiode Amplifier Analog Filters Medical Instrumentation Notebooks and PDAs Barcode Scanners Audio Receiver Automotive Infotainment The robust design of the MCP629x provides ease-ofuse to the circuit designer—a unity-gain stable, integrated RFI/EMI rejection filter, no phase reversal in overdrive condition, and high electrostatic discharge (ESD) protection (4-kV HBM). The MCP629x family operates over the Extended Temperature Range of –40°C to +125°C. It also has a power supply range of 2.4 V to 5.5 V. Device Information(1) PART NUMBER PACKAGE MCP6291 (preview) MCP6292 MCP6294 (preview) BODY SIZE (NOM) SOT-23 (5) 1.60 mm × 2.90 mm SC70 (5) 1.25 mm × 2.00 mm SOT553 (5) 1.65 mm x 1.20 mm SOIC (8) 3.91 mm × 4.90 mm SOIC (8) 3.91 mm × 4.90 mm WSON (8) 2.00 mm x 2.00 mm VSSOP (8) 3.00 mm × 3.00 mm VSSOP (10) 3.00 mm × 3.00 mm SOIC(14) 8.65 mm × 3.91 mm TSSOP (14) 4.40 mm × 5.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Small-Signal Overshoot vs Load Capacitance Low-Side Motor Control 60 Vbus Zload 5V + VOUT MCP629x VSHUNT Rshunt 0.1 RF 165k Overshoot (%) Iload 50 40 30 20 10 Overshoot+ Overshoot- 0 RG 3.4k 0 50 100 150 200 Capacitive Load (pF) 250 300 C025 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 8.4 Device Functional Modes........................................ 16 1 1 1 2 3 4 7 9 9.1 Application Information............................................ 17 9.2 Typical Application .................................................. 17 10 Power Supply Recommendations ..................... 19 10.1 Input and ESD Protection ..................................... 19 11 Layout................................................................... 20 11.1 Layout Guidelines ................................................. 20 11.2 Layout Example .................................................... 20 7.1 7.2 7.3 7.4 7.5 Absolute Maximum Ratings ...................................... 7 ESD Ratings.............................................................. 7 Recommended Operating Conditions....................... 7 Thermal Information .................................................. 7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 2.4 V to 5.5 V ....................................... 8 7.6 Typical Characteristics .............................................. 9 8 Application and Implementation ........................ 17 12 Device and Documentation Support ................. 21 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Detailed Description ............................................ 15 8.1 Overview ................................................................. 15 8.2 Functional Block Diagram ....................................... 15 8.3 Feature Description................................................. 16 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 21 21 21 21 21 21 13 Mechanical, Packaging, and Orderable Information ........................................................... 21 4 Revision History 2 DATE REVISION NOTES July 2017 * Initial release. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 5 Device Comparison Table DEVICE NO. OF CHANNEL S PACKAGE-LEADS DBV (1) DCK (1) DRL (1) D DSG (1) DGK (1) PW (1) RTE (1) 8 — — — — MCP6291 (2) 1 5 5 5 MCP6292 2 — — — 8 8 8 — — MCP6294 (2) 4 — — — 14 — — 14 16 (1) (2) Package preview Device preview Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 3 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com 6 Pin Configuration and Functions MCP6291 DBV(2) and DRL(2) Package 5-Pin SOT-23 and SOT553 Top View OUT 1 V- 2 +IN 3 5 4 MCP6291 DCK(2) Package 5-Pin SC70 Top View V+ +IN 1 V- 2 -IN 3 -IN 5 V+ 4 OUT MCP6291 D(2) Package 8-Pin SOIC Top View (1) NC - No internal connection (2) Package preview NC(1) 1 8 NC(1) -IN 2 7 V+ +IN 3 6 OUT V- 4 5 NC(1) Pin Functions: MCP6291 PIN NAME I/O DESCRIPTION DBV, DRL DCK D –IN 4 3 2 I Inverting input +IN 3 1 3 I Noninverting input OUT 1 4 6 O Output — No internal connection 1 NC — — 5 V– 2 2 4 — Negative (lowest) supply or ground (for single-supply operation) V+ 5 5 7 — Positive (highest) supply 8 4 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 MCP6292 D, DGK(1) Packages 8-Pin SOIC, VSSOP Top View MCP6292 DSG(1) Package 8-Pin WSON Top View OUT A 1 8 V+ -IN A 2 7 OUT B OUT A 1 +IN A 3 6 -IN B -IN A 2 V- 4 5 +IN B +IN A 3 V- 4 Exposed Thermal Die Pad on Underside(2) 8 V+ 7 OUT B 6 -IN B 5 +IN B MCP6292 DGS(1) Package 10-Pin VSSOP Top View OUT A 1 –IN A 2 10 V+ 9 OUT B 8 –IN B A +IN A 3 B (1) V– 4 7 +IN B SHDN A 5 6 SHDN B Package Preview Pin Functions: MCP6292 PIN I/O DESCRIPTION NAME D, DGK, DSG DGS –IN A 2 2 I Inverting input, channel A +IN A 3 3 I Noninverting input, channel A –IN B 6 8 I Inverting input, channel B +IN B 5 7 I Noninverting input, channel B OUT A 1 1 O Output, channel A OUT B 7 9 O Output, channel B SHDN A — 5 — Shutdown (logic low), enable (logic high), channel A SHDN B — 6 — Shutdown (logic low), enable (logic high), channel B V– 4 4 — Negative (lowest) supply or ground (for single-supply operation) V+ 8 10 — Positive (highest) supply Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 5 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com MCP6294 D(1), PW(1) Packages 14-Pin SOIC, TSSOP Top View (1) 14 OUT D 13 -IN D 3 12 +IN D V+ 4 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C OUT A 1 -IN A 2 +IN A A B D C Package preview Pin Functions: MCP6294 PIN I/O DESCRIPTION NAME D, PW –IN A 2 I Inverting input, channel A +IN A 3 I Noninverting input, channel A –IN B 6 I Inverting input, channel B +IN B 5 I Noninverting input, channel B –IN C 9 I Inverting input, channel C +IN C 10 I Noninverting input, channel C –IN D 13 I Inverting input, channel D +IN D 12 I Noninverting input, channel D OUT A 1 O Output, channel A OUT B 7 O Output, channel B OUT C 8 O Output, channel C OUT D 14 O Output, channel D V– 11 — Negative (lowest) supply or ground (for single-supply operation) V+ 4 — Positive (highest) supply 6 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature (unless otherwise noted) (1) MIN Supply voltage Output short-circuit Temperature Common-mode Voltage (2) Signal input pins (2) (3) UNIT 6 V (V+) + 0.5 Differential V (V+) – (V–) + 0.2 Current (2) –10 Specified, TA –40 (3) 10 mA Continuous mA 125 Junction, TJ 150 Storage, Tstg (1) (V–) – 0.5 MAX –65 °C 150 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Input pins are diode-clamped to the power-supply rails. Current limit input signals that can swing more than 0.5 V beyond the supply rails to 10 mA or less. Short-circuit to ground, one amplifier per package. 7.2 ESD Ratings over operating free-air temperature range (unless otherwise noted) VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±4000 Charged device model (CDM), per JEDEC specification JESD22-C101 (2) ±1500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VS MAX UNIT Supply voltage 2.4 5.5 V Specified temperature –40 125 °C 7.4 Thermal Information MCP6292 THERMAL METRIC (1) D (SOIC) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 157.6 °C/W RθJC(top) Junction-to-case(top) thermal resistance 104.6 °C/W RθJB Junction-to-board thermal resistance 99.7 °C/W ψJT Junction-to-top characterization parameter 55.6 °C/W ψJB Junction-to-board characterization parameter 99.2 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 7 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com 7.5 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 2.4 V to 5.5 V at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted); PARAMETER TEST CONDITIONS MIN TYP MAX ±0.3 ±3 UNIT OFFSET VOLTAGE VS = 5 V VOS Input offset voltage dVOS/dT Drift VS = 5 V, TA = –40°C to +125°C PSRR Power-supply rejection ratio VS = 2.4 V – 5.5 V, VCM = (V–) Channel separation, dc At dc VS = 5 V, TA = –40°C to +125°C ±5 mV ±1.1 µV/°C ±7 µV/V 100 dB INPUT VOLTAGE RANGE VCM Common-mode voltage range CMRR Common-mode rejection ratio VS = 2.4 V to 5.5 V (V–) – 0.1 (V+) + 0.1 VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C 80 103 VS = 5.5 V, VCM = –0.1 V to 5.6 V, TA = –40°C to +125°C 57 87 V dB VS = 2.4 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to +125°C 88 VS = 2.4 V, VCM = –0.1 V to 1.9 V, TA = –40°C to +125°C 81 INPUT BIAS CURRENT IB Input bias current IOS Input offset current ±1.0 pA ±0.05 pA NOISE En Input voltage noise (peak-to-peak) en Input voltage noise density in Input current noise density VS = 5 V, f = 0.1 Hz to 10 Hz 4.77 µVPP VS = 5 V, f = 10 kHz, RL = 10 kΩ 8.7 nV/√Hz VS = 5 V, f = 1 kHz, RL = 10 kΩ 16 nV/√Hz f = 1 kHz 10 fA/√Hz INPUT CAPACITANCE CID Differential 2 pF CIC Common-mode 4 pF OPEN-LOOP GAIN VS = 2.4 V, (V–) + 0.04 V < VO < (V+) – 0.04 V, RL = 10 kΩ AOL Open-loop voltage gain 100 VS = 5.5 V, (V–) + 0.05 V < VO < (V+) – 0.05 V, RL = 10 kΩ 104 130 dB VS = 2.4 V, (V–) + 0.06 V < VO < (V+) – 0.06 V, RL = 2 kΩ 100 VS = 5.5 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩ 130 FREQUENCY RESPONSE GBP Gain bandwidth product VS = 5 V, G = +1 10 MHz φm Phase margin SR Slew rate VS = 5 V, G = +1 55 Degrees VS = 5 V, G = +1 6.5 V/µs To 0.1%, VS = 5 V, 2-V step , G = +1, CL = 100 pF 0.5 tS Settling time tOR Overload recovery time VS = 5 V, VIN × gain > VS THD + N Total harmonic distortion + noise (1) VS = 5 V, VO = 1 VRMS, G = +1, f = 1 kHz VO Voltage output swing from supply rails VS = 5.5 V, RL = 10 kΩ, 15 VS = 5.5 V, RL = 2 kΩ, 50 ISC Short-circuit current VS = 5 V ±50 mA ZO Open-loop output impedance VS = 5 V, f = 10 MHz 100 Ω VS = 5.5 V, IO = 0 mA, 600 To 0.01%, VS = 5 V, 2-V step , G = +1, CL = 100 pF µs 1 0.2 µs 0.0008% OUTPUT mV POWER SUPPLY IQ (1) 8 Quiescent current per amplifier 1300 µA Third-order filter; bandwidth = 80 kHz at –3 dB. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 7.6 Typical Characteristics 500 2500 400 2000 300 1500 Offset Voltage (µV) Offset Voltage (µV) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) 200 100 0 ±100 ±200 1000 500 0 ±500 ±1000 ±300 ±1500 ±400 ±2000 ±500 ±2500 ±50 0 ±25 25 50 75 100 125 Temperature (ƒC) 150 -4 -3 -2 -1 0 1 2 3 4 Input Common Mode Voltage (V) C003 C005 V+ = 2.75 V, V– = –2.75 V Figure 2. Offset Voltage vs Common-Mode Voltage 120 Open Loop Voltage Gain (dB) Offset Voltage (µV) 500 0 ±500 ±1000 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Supply Voltage (V) 5.5 100 210 Gain Phase 180 80 150 60 120 40 90 20 60 0 30 -20 100 0 1k 10k 100k Frequency (Hz) C004 Input Bias Current and offset current (pA) Closed Loop Voltage Gain (dB) 30 20 10 0 -10 -20 G = +1 G = +10 G = -1 10k 100k Frequency (Hz) 10M C006 Figure 4. Open-Loop Gain and Phase vs Frequency Figure 3. Offset Voltage vs Power Supply 40 -40 1k 1M CL = 10 pF VS = 2.4 V to 5.5 V -30 Phase Margin (q) Figure 1. Offset Voltage vs Temperature 1000 1M IBN 200 IBP IOS 150 100 50 0 ±50 ±50 10M Figure 5. Closed-Loop Gain vs Frequency 250 ±25 0 25 50 75 100 Temperature (ƒC) C007 125 C008 Figure 6. Input Bias Current vs Temperature Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 9 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com Typical Characteristics (continued) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) 3 120 PSRRPSRR+ CMRR 100 125ƒC 1 -40ƒC 85ƒC PSRR and CMRR (dB) Output Voltage (V) 2 25ƒC 0 25ƒC 85ƒC ±1 -40ƒC 125ƒC ±2 80 60 40 20 ±3 10 20 30 40 50 60 Output Current (mA) 0 1k C009 10k 100k Frequency (Hz) V+ = 2.75 V, V– = –2.75 V 1M 10M C011 Figure 8. CMRR and PSRR vs Frequency (Referred to Input) Figure 7. Output Voltage Swing vs Output Current 10 55 9 8 CMRR (µV/V) CMRR (µV/V) 50 45 40 7 6 5 4 3 35 2 1 30 ±50 ±25 0 25 50 75 100 Temperature (ƒC) 125 ±50 ±25 0 25 50 75 100 125 Temperature (ƒC) C012 150 C016 VS = 5.5 V, VCM = (V-) –0.1 V to (V+) –1.4 V TA= –40°C to +125°C, RL= 10 kΩ VS = 5.5 V, VCM = (V-) –0.1 V to (V+) +0.1 V TA= –40°C to +125°C, RL= 10 kΩ Figure 10. CMRR vs Temperature Figure 9. CMRR vs Temperature 10 Voltage (1µV/div) PSRR (µV/V) 9 8 7 6 5 ±50 ±25 0 25 50 75 Temperature (ƒC) VS = 2.4 V to 5.5 V Figure 11. PSRR vs Temperature 10 Submit Documentation Feedback 100 Time (1s/div) 125 C014 C013 VS = 2.4 V to 5.5 V Figure 12. 0.1-Hz to 10-Hz Input Voltage Noise Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 Typical Characteristics (continued) 120 -90 100 -95 80 -100 THD + N (dB) Input Voltage Noise Spectral Density (nV/—Hz) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) 60 40 -105 -110 -115 20 0 10 100 1k Frequency (Hz) 10k 100k -120 100 1k Frequency (Hz) C015 10k C017 VS = 5.5 V, VCM = 2.5 V, RL = 2 kΩ, G = +1, BW = 80kHz VOUT = 0.5 VRMS Figure 14. THD + N vs Frequency ±40 ±40 ±60 ±60 THD + N (dB) THD + N (dB) Figure 13. Input Voltage Noise Spectral Density vs Frequency ±80 ±80 ±100 ±100 ±120 0.001 0.01 0.1 ±120 0.001 1 Output Voltage Amplitude (VRMS) 0.01 0.1 1 Output Voltage Amplitude (VRMS) C018 C019 VS = 5.5 V, VCM = 2.5 V, RL = 2 kΩ, G = –1 BW = 80 kHz, f = 1 kHz VS = 5.5 V, VCM = 2.5 V, RL = 2 kΩ, G = +1 BW = 80kHz, f = 1 kHz Figure 16. THD + N vs Amplitude Figure 15. THD + N vs Amplitude 800 600 Quiescent Current (µA) Quiescent current (µA) 700 580 560 540 520 600 500 400 300 200 100 0 500 1.5 2 2.5 3 3.5 4 Supply Voltage (V) 4.5 5 5.5 ±50 ±25 Figure 17. Quiescent Current vs Supply Voltage 0 25 50 75 100 Temperature (ƒC) C020 125 C021 Figure 18. Quiescent Current vs Temperature Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 11 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com Typical Characteristics (continued) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) 60 50 160 Overshoot (%) Open Loop Output Impedance (:) 200 120 80 40 40 30 20 10 Overshoot+ Overshoot- 0 0 10k 100k 1M Frequency (Hz) 10M 0 50 100 150 200 250 Capacitive Load (pF) C024 300 C025 V+ = 2.75 V, V– = –2.75 V , G = +1 V/V, RL = 10 kΩ VOUT step = 100 mVp-p Figure 19. Open-Loop Output Impedance vs Frequency Figure 20. Small-Signal Overshoot vs Load Capacitance 60 Voltage (1V/div) Overshoot (%) 50 40 30 20 10 Input Overshoot(+) Output Overshoot(-) 0 0 50 100 150 200 250 Time (200 µs/div) 300 Capacitive Load (pF) C026 C036 V+ = 2.75 V, V– = –2.75 V , G = -1 V/V, RL = 10 kΩ VOUT step = 100 mVp-p V+ = 2.75 V, V– = –2.75 V Figure 21. Small-Signal Overshoot vs Load Capacitance Figure 22. No Phase Reversal Input Voltage (2 V/V) Voltage (20 mV/div) Output INPUT OUTPUT Time (1 µs/div) Time (0.1µs/div) C028 V+ = 2.75 V, V– = –2.75 V , G = –10 V/V Figure 23. Overload Recovery 12 Submit Documentation Feedback C030 V+ = 2.75 V, V– = –2.75 V, G = 1 V/V Figure 24. Small-Signal Step Response Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 Typical Characteristics (continued) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) Voltage (1 V/div) Short Circuit Current Limit (mA) 80 Input 60 40 20 Sinking 0 Sourcing ±20 ±40 ±60 Output ±80 Time (1 µs/div) ±50 0 ±25 25 50 75 100 125 Temperature (ƒC) C031 C034 V+ = 2.75 V, V– = –2.75 V, CL = 100 pF, G = 1 V/V Figure 25. Large-Signal Step Response Figure 26. Short-Circuit Current vs Temperature 0 120 -20 Channel Seperation (dB) 140 EMIRR (dB) 100 80 60 40 20 -40 -60 -80 -100 -120 0 10M 100M 1G Frequency (Hz) C041 -140 100 1k 10k 100k Frequency (Hz) PRF = –10 dBm 1M 10M C038 V+ = 2.75 V, V– = –2.75 V Figure 27. Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency Figure 28. Channel Separation vs Frequency 200 Open Loop Voltage Gain (dB) 90 Phase Margin (degrees) 75 60 45 30 15 160 120 80 40 0 0 0 10 20 30 40 50 60 70 80 90 Capacitive Load (pF) 100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Output Voltage (V) C037 VS = 5.5 V 5.5 C023 VS = 5.5 V Figure 29. Phase Margin vs Capacitive Load Figure 30. Open Loop Voltage Gain vs Output Voltage Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 13 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com Typical Characteristics (continued) 100 100 75 75 50 50 Output voltage (mV) Output Voltage (mV) at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted) 25 0 ±25 ±50 0 -25 -50 -75 -100 ±75 -125 -150 ±100 0 0.3 0.6 Figure 31. Large Signal Settling Time (Positive) Submit Documentation Feedback 0 0.9 Settling time (µs) 14 25 0.3 0.6 0.9 1.2 Settling time (µs) C032 1.5 C033 Figure 32. Large Signal Settling Time (Negative) Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 8 Detailed Description 8.1 Overview The MCP629x series is a family of low-power, rail-to-rail input and output op amps. These devices operate from 2.4 V to 5.5 V, are unity-gain stable, and are suitable for a wide range of general-purpose applications. The input common-mode voltage range includes both rails and allows the MCP629x series to be used in virtually any single-supply application. Rail-to-rail input and output swing significantly increases dynamic range, especially in low-supply applications, and makes them suitable for driving sampling analog-to-digital converters (ADCs). 8.2 Functional Block Diagram V+ Reference Current VIN– VIN+ VBIAS1 Class AB Control Circuitry VO VBIAS2 V– (Ground) Copyright © 2017, Texas Instruments Incorporated Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 15 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com 8.3 Feature Description 8.3.1 Rail-to-Rail Input The input common-mode voltage range of the MCP629x family extends 100 mV beyond the supply rails for the full supply voltage range of 2.4 V to 5.5 V. This performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a P-channel differential pair, as shown in the Functional Block Diagram. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.4 V to 100 mV above the positive supply, whereas the P-channel pair is active for inputs from 100 mV below the negative supply to approximately (V+) – 1.4 V. There is a small transition region, typically (V+) – 1.2 V to (V+) – 1 V, in which both pairs are on. This 200-mV transition region can vary up to 200 mV with process variation. Thus, the transition region (with both stages on) can range from (V+) – 1.4 V to (V+) – 1.2 V on the low end, and up to (V+) – 1 V to (V+) – 0.8 V on the high end. Within this transition region, PSRR, CMRR, offset voltage, offset drift, and THD can degrade compared to device operation outside this region. 8.3.2 Rail-to-Rail Output Designed as a low-power, low-voltage operational amplifier, the MCP629x series delivers a robust output drive capability. A class AB output stage with common-source transistors achieves full rail-to-rail output swing capability. For resistive loads of 10-kΩ, the output swings to within 15 mV of either supply rail, regardless of the applied power-supply voltage. Different load conditions change the ability of the amplifier to swing close to the rails. 8.3.3 Overload Recovery Overload recovery is defined as the time required for the operational amplifier output to recover from a saturated state to a linear state. The output devices of the operational amplifier enter a saturation region when the output voltage exceeds the rated operating voltage, because of the high input voltage or the high gain. After the device enters the saturation region, the charge carriers in the output devices require time to return to the linear state. After the charge carriers return to the linear state, the device begins to slew at the specified slew rate. Therefore, the propagation delay (in case of an overload condition) is the sum of the overload recovery time and the slew time. The overload recovery time for the MCP629x series is approximately 200 ns. 8.4 Device Functional Modes The MCP629x family has a single functional mode. These devices are powered on as long as the power-supply voltage is between 2.4 V (±1.2 V) and 5.5 V (±2.75 V). 16 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The MCP629x series features 10-MHz bandwidth and 6.5-V/µs slew rate with only 600-µA of supply current per channel, providing good ac performance at very-low-power consumption. DC applications are well served with a very-low input noise voltage of 8.7 nV / √Hz at 10 kHz, low input bias current, and a typical input offset voltage of 0.3 mV. 9.2 Typical Application Figure 33 shows the MCP629x configured in a low-side, motor-control application. Vbus Iload Zload 5V + VOUT MCP629x VSHUNT Rshunt 0.1 RF 165k RG 3.4k Figure 33. MCP629x in a Low-Side, Motor-Control Application 9.2.1 Design Requirements The design requirements for this design are: • Load current: 0 A to 1 A • Output voltage: 4.95 V • Maximum shunt voltage: 100 mV Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 17 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com Typical Application (continued) 9.2.2 Detailed Design Procedure The transfer function of the circuit in Figure 33 is given in Equation 1 VOUT ILOAD u RSHUNT u Gain (1) The load current (ILOAD) produces a voltage drop across the shunt resistor (RSHUNT). The load current is set from 0 A to 1 A. To keep the shunt voltage below 100 mV at maximum load current, the largest shunt resistor is defined using Equation 2. VSHUNT _ MAX 100mV RSHUNT 100m: ILOAD _ MAX 1A (2) Using Equation 2, RSHUNT is calculated to be 100 mΩ. The voltage drop produced by ILOAD and RSHUNT is amplified by the MCP629x to produce an output voltage of roughly 0 V to 4.95 V. The gain needed by the MCP629x to produce the necessary output voltage is calculated using Equation 3: Gain VOUT _ MAX VIN _ MAX VOUT _ MIN VIN _ MIN (3) Using Equation 3, the required gain is calculated to be 49.5 V/V, which is set with resistors RF and RG. Equation 4 is used to size the resistors, RF and RG, to set the gain of the MCP629x to 49.5 V/V. RF Gain 1 RG (4) Choosing RF as 165 kΩ and RG as 3.4 kΩ provides a combination that equals roughly 49.5 V/V. Figure 34 shows the measured transfer function of the circuit shown in Figure 33. 9.2.3 Application Curve 5 Output (V) 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1 ILOAD (A) C219 Figure 34. Low-Side, Current-Sense, Transfer Function 18 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 10 Power Supply Recommendations The MCP629x series is specified for operation from 2.4 V to 5.5 V (±1.2 V to ±2.75 V); many specifications apply from –40°C to +125°C. The Typical Characteristics section presents parameters that can exhibit significant variance with regard to operating voltage or temperature. CAUTION Supply voltages larger than 6 V can permanently damage the device; see the Absolute Maximum Ratings table. Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement, see the section. 10.1 Input and ESD Protection The MCP629x series incorporates internal ESD protection circuits on all pins. For input and output pins, this protection primarily consists of current-steering diodes connected between the input and power-supply pins. These ESD protection diodes provide in-circuit, input overdrive protection, as long as the current is limited to 10mA, as stated in the Absolute Maximum Ratings table. Figure 35 shows how a series input resistor can be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and the value must be kept to a minimum in noise-sensitive applications. V+ IOVERLOAD 10-mA maximum Device VOUT VIN 5 kW Figure 35. Input Current Protection Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 19 MCP6291, MCP6292, MCP6294 SBOS879 – JULY 2017 www.ti.com 11 Layout 11.1 Layout Guidelines For best operational performance of the device, use good printed-circuit board (PCB) layout practices, including: • Noise can propagate into analog circuitry through the power pins of the circuit as a whole and of op amp itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information refer to, see Circuit Board Layout Techniques. • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. As illustrated in Figure 37, keeping RF and RG close to the inverting input minimizes parasitic capacitance on the inverting input. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. • Cleaning the PCB following board assembly is recommended for best performance. • Any precision integrated circuit can experience performance shifts resulting from moisture ingress into the plastic package. Following any aqueous PCB cleaning process, baking the PCB assembly is recommended to remove moisture introduced into the device packaging during the cleaning process. A low-temperature, post-cleaning bake at 85°C for 30 minutes is sufficient for most circumstances. 11.2 Layout Example + VIN A + VIN B VOUT A RG VOUT B RG RF RF Figure 36. Schematic Representation for Figure 37 Place components close to device and to each other to reduce parasitic errors. OUT A VS+ OUT A V+ -IN A OUT B +IN A -IN B Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. GND RF OUT B GND RF RG VIN A GND RG V± Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. GND VS± +IN B VIN B Keep input traces short and run the input traces as far away from the supply lines as possible. Ground (GND) plane on another layer Figure 37. Layout Example 20 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 MCP6291, MCP6292, MCP6294 www.ti.com SBOS879 – JULY 2017 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: Circuit Board Layout Techniques, (SLOA089) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 1. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY MCP6291 Click here Click here Click here Click here Click here MCP6292 Click here Click here Click here Click here Click here MCP6294 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2017, Texas Instruments Incorporated Product Folder Links: MCP6291 MCP6292 MCP6294 Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 3-Aug-2017 PACKAGING INFORMATION Orderable Device Status (1) MCP6292IDR ACTIVE Package Type Package Pins Package Drawing Qty SOIC D 8 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR Op Temp (°C) Device Marking (4/5) -40 to 85 MC6292 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device MCP6292IDR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 15.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MCP6292IDR SOIC D 8 2500 333.2 345.9 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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