M74HC181 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR . . . . . . . . HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS181 DESCRIPTION The 74HC181 is a high speed CMOS ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR fabricated with silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in tables 1 and 2. These operations are selected by the four function-select lines (S0, S1, S2, S3) and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries must be enabled by applying a low-level voltage to the mode control input (M). A full carry look-ahead scheme is made available in these devices for fast, simultaneous carry generation by means of two cascade-outputs (pins 15 and 17) for the four bits in the package. When used in conjunction with the M54HC182 or M74HC182, full carry look-ahead circuits, high-speed arithmetic operations can be performed. These circuits will accomodate active-high or active-low data, if the pin designations are interpreted as shown below. Subtraction is accomplished by 1,s complement addition where the 1’s complement of the subtrahend is generated internally. The resultant output is 1–B–1, which requires an endaround or forced carry to produce A–B. The 181 can also be utilized as a comparator. The A = B output is internally decoded from the function outputs (F0, F1, F2, F3) so that when two words of equal magnitude are applied at the A and B inputs, it will assume a high level to indicated equality (A = B). The ALU should be October 1993 B1R (Plastic Package) M1R (Micro Package) ORDER CODES : M74HC181M1R M74HC181B1R PIN CONNECTIONS (top view) * Open drain Output Structure 1/13 M74HC181 DESCRIPTION (continued) in the subtract mode with Cn = H when performing this comparison. The A = B output is open-drain so that it can be wire-AND connected to give a comparison for more that four bits. The carry output (Cn + 4) can also be used to supply relative magnitude information. Again, the ALU should be placed in the subtract mode by placing the function select inputs S3, S2, S1, S0 at L, H, H, L, respectively. These circuits have been designed to not only incorporate all of the designer’s re- quirements for arithmetic operations, but also to provide 16 possible functions of two Boolean variables without the use of external circuitry. These logic functions are selected by use of the four function-select inputs (S0, S1, S2, S3) with the mode-control input (M) at a high level to disable the internal carry. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUITS ONLY OUTPUT A = B PIN DESCRIPTION IEC LOGIC SYMBOLS PIN No 2, 23, 21, 19 PIN NUMBER ACTIVE LOW DATA (Table 1) SYMBOL A0 to A3 NAME AND FUNCTION Word A Inputs 1, 22, 20, 18 B0 to B3 Word B Inputs 6, 5, 4, 3 7 S0 to S3 Cn Function Select Inputs Inv. Carry Input 8 M Mode Control Input 9, 10, 11, 13 14 F0 to F3 A=B Function Outputs Comparator Output 15 P Carry Propagate Output 16 17 Cn + 4 G Inv. Carry Output Carry Generate Output 12 GND Ground (0V) 24 VCC Positive Supply Voltage 2 A0 1 B0 23 A1 22 B1 21 A2 20 B2 19 A3 18 B3 9 F0 10 F1 11 F2 13 F3 7 Cn 16 Cn + 4 15 P 17 G ACTIVE HIGH DATA (Table 1) A0 B0 A1 B1 A2 B2 A3 B3 F0 F1 F2 F3 Cn Cn + 4 X Y 2/13 Input Cn Output Cn + 4 Active LOW Data (Figure 1) Active HIGH Data (Figure 2) H H H L A≥B A<B A≤B A>B L H A>B A<B L L A≤B A≥B M74HC181 TRUTH TABLE 1 Selection S3 L L L L L L L L H H H H H H H H S2 L L L L H H H H L L L L H H H H S1 L L H H L L H H L L H H L L H H S0 L H L H L H L H L H L H L H L H M = H Logic Functions F F F F F F F F F F F F F F F F =A = AB =A+B =1 =A+B =B =A⊕B =A+B = AB =A⊕B =B =A+B =0 = AB = AB =A F F F F F F F F F F F F F F F F ACTIVE LOW DATA M = L: Arithmetic Cn = L (no carry) = A Minus 1 F = AB Minus 1 F = AB Minus 1 F = Minus 1 (2’s Compl) F = A Plus (A + B) F = AB Plus (A + B) F = A Minus B Minus 1 F =A+B F = A Plus (A + B) F = A Plus B F = AB Plus (A + B) F =A+B F = A Plus A * F = AB Plus A F = AB Plus A F =A F Operations Cn = H (with carry) =A = AB = (AB) = Zero = A Plus (A + B) Plus 1 = AB Plus (A + B) Plus 1 = A Minus B = (A + B) Plus 1 = A Plus (A + B) Plus 1 = A Plus B Plus 1 = AB Plus (A + B) Plus 1 = (A + B) Plus 1 = A Plus A Plus 1 = AB Plus A Plus 1 = AB Plus A Plus 1 = A Plus 1 * Each bit is shifted to the next more significant position. FIGURE 1 3/13 M74HC181 TRUTH TABLE 2 Selection S3 L L L L L L L L H H H H H H H H S2 L L L L H H H H L L L L H H H H S1 L L H H L L H H L L H H L L H H S0 L H L H L H L H L H L H L H L H M = H Logic Functions F F F F F F F F F F F F F F F F =A =A+B = AB =0 = AB =B =A⊕B = AB =A+B =A⊕B =B = AB =1 =A+B =A+B =A * Each bit is shifted to the next more significant position. FIGURE 2 4/13 F F F F F F F F F F F F F F F F ACTIVE HIGH DATA M = L: Arithmetic Cn = H (no carry) =A F =A+B F =A+B F = Minus 1 (2’s Compl) F = A Plus (AB) F = (A + B) Plus AB F = A Minus B Minus 1 F = AB Minus 1 F = A Plus AB F = A Plus B F = (A + B) Plus AB F = AB Minus 1 F = A Plus A * F = (A + B) Plus A F = (A + B) Plus A F = A Minus 1 F Operations Cn = L (with carry) = A Plus 1 = (A + B) Plus 1 = (A + B) Plus 1 = Zero = A Plus AB Plus 1 = (A + B) Plus (AB) Plus 1 = A Minus B = AB = A Plus AB Plus 1 = A Plus B Plus 1 = (A + B) Plus AB Plus 1 = AB = A Plus A Plus 1 = (A + B) Plus A Plus 1 = (A + B) Plus A Plus 1 =A M74HC181 LOGIC DIAGRAM 5/13 M74HC181 ABSOLUTE MAXIMUM RATINGS Symbol Value Unit VCC VI Supply Voltage DC Input Voltage -0.5 to +7 -0.5 to VCC + 0.5 V V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK IOK DC Input Diode Current DC Output Diode Current ± 20 ± 20 mA mA IO DC Output Source Sink Current Per Output Pin ± 25 mA DC VCC or Ground Current ± 50 mA 500 (*) mW ICC or IGND Parameter PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec) -65 to +150 300 o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Top Output Voltage Operating Temperature tr, tf Input Rise and Fall Time 6/13 Value 2 to 6 Unit V 0 to VCC V 0 to VCC -40 to +85 o V C VCC = 2 V 0 to 1000 ns VCC = 4.5 V VCC = 6 V 0 to 500 0 to 400 M74HC181 DC SPECIFICATIONS Test Conditions Symbol VIH V IL V OH Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage (except A = B output) 1.5 1.5 4.5 6.0 3.15 4.2 3.15 4.2 0.5 0.5 4.5 1.35 1.35 6.0 1.8 1.8 2.0 4.5 2.0 4.5 VI = IO= 20 µA VIH or V IL IO= 4.0 mA Input Leakage Current 6.0 6.0 IO= 5.2 mA VI = VCC or GND Quiescent Supply Current 6.0 VI = VCC or GND 4.5 6.0 II ICC VI = IO=-20 µA VIH or V IL IO=-4.0 mA IO=-5.2 mA 1.9 4.4 2.0 4.5 1.9 4.4 5.9 6.0 5.9 4.18 5.68 4.31 5.8 4.13 5.63 Unit V 2.0 4.5 6.0 Low Level Output Voltage -40 to 85 oC Min. Max. 2.0 6.0 VOL Value TA = 25 oC Min. Typ. Max. VCC (V) V V 0.0 0.1 0.1 0.0 0.0 0.1 0.1 0.1 0.1 0.17 0.26 0.33 0.18 0.26 ±0.1 0.33 ±1 µA 4 40 µA V 7/13 M74HC181 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (1) tPLH tPHL Propagation Delay Time (2) tPLH tPHL Propagation Delay Time (3) tPLH tPHL Propagation Delay Time (4) tPLH tPHL Propagation Delay Time (5) tPLH tPHL Propagation Delay Time (6) tPLH tPHL Propagation Delay Time (7) tPLH tPHL Propagation Delay Time (8) tPLH tPHL Propagation Delay Time (9) tPLH tPHL Propagation Delay Time (10) tPLH tPHL Propagation Delay Time (11) tPLZ tPZL Propagation Delay Time (12) CIN CPD (*) Input Capacitance Power Dissipation Capacitance VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 RL = 1kΩ Value -40 to 85 oC TA = 25 oC 54HC and 74HC 74HC Min. Typ. Max. Min. Max. 30 75 95 8 15 19 7 13 16 54 120 150 16 24 30 13 20 26 90 215 270 26 43 54 20 37 46 97 215 270 27 43 54 21 37 46 80 180 225 23 36 45 18 31 38 81 190 240 24 38 48 19 32 41 80 180 225 23 36 45 18 31 38 80 170 215 23 34 43 18 29 37 80 170 215 23 34 43 18 29 37 95 220 275 27 44 55 21 37 47 95 220 275 27 44 55 21 37 47 86 200 250 24 40 50 18 34 43 92 210 265 27 42 53 27 36 45 5 10 10 195 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns pF pF (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC 8/13 M74HC181 PROPAGATION DELAY TIME TEST CONDITIONS Test No INPUT OUTPUT Test Conditions (1) (2) Cn Any A or B Cn + 4 Cn + 4 M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) (3) Any A or B Cn + 4 M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) (4) (5) Cn Any A or B Any F G M = GND (SUM or DIFF mode) M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) (6) Any A or B G M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) (7) Any A or B F M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) (8) Any A or B F M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) (9) (10) Ai or Bi Ai or Bi Fi Fi M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) M = VCC (Logic mode) (11) Ai or Bi Fi (12) Any A or B A=B M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) SWITCHING CHARACTERISTICS TEST WAVEFORM 9/13 M74HC181 TEST CIRCUIT ICC (Opr.) Input Condition : A0, A1, A2, A3, S0, S3, Cn = VDD B1, B2, B3, S1, S2, M = GND INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST. 10/13 M74HC181 Plastic DIP24 (0.25) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. a1 0.63 0.025 b 0.45 0.018 b1 0.23 b2 0.31 1.27 D E 0.009 0.012 0.050 32.2 15.2 16.68 1.268 0.598 0.657 e 2.54 0.100 e3 27.94 1.100 F MAX. 14.1 0.555 I 4.445 0.175 L 3.3 0.130 P043A 11/13 M74HC181 SO24 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A a1 MIN. TYP. MAX. 2.65 0.10 0.104 0.20 a2 0.004 0.007 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45° (typ.) D 15.20 15.60 0.598 0.614 E 10.00 10.65 0.393 0.420 e 1.27 0.05 e3 13.97 0.55 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 S 8° (max.) L s e3 E D 13 1 12 F 24 12/13 b1 e a1 b A a2 C c1 M74HC181 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13