IRF540NS
IRF540NL
l
l
l
l
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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D2 Pak
IRF540NS
TO-262
IRF540NL
Description
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF540NL) is available for lowprofile applications.
D
VDSS = 100V
RDS(on) = 44mΩ
G
ID = 33A
S
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
IAR
EAR
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Units
33
23
110
130
0.87
± 20
16
13
7.0
-55 to + 175
A
W
W/°C
V
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
2014-8-26
Junction-to-Case
Junction-to-Ambient (PCB mount)**
1
Typ.
Max.
Units
–––
–––
1.15
40
°C/W
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IRF540NS/IRF540NL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
∆V(BR)DSS/∆TJ
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
EAS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
IGSS
Min. Typ. Max. Units
Conditions
100 ––– –––
V
VGS = 0V, ID = 250µA
––– 0.12 ––– V/°C Reference to 25°C, I D = 1mA
––– ––– 44
mΩ VGS = 10V, ID = 16A
2.0
––– 4.0
V
VDS = VGS , ID = 250µA
21
––– –––
S
VDS = 50V, ID = 16A
––– ––– 25
VDS = 100V, VGS = 0V
µA
––– ––– 250
VDS = 80V, VGS = 0V, TJ = 150°C
––– ––– 100
VGS = 20V
nA
––– ––– -100
VGS = -20V
––– ––– 71
ID = 16A
––– ––– 14
nC
VDS = 80V
––– –––
21
VGS = 10V, See Fig. 6 and 13
–––
11 –––
VDD = 50V
–––
35 –––
ID = 16A
ns
–––
39 –––
RG = 5.1Ω
–––
35 –––
VGS = 10V, See Fig. 10
D
Between lead,
4.5 –––
–––
6mm (0.25in.)
nH
G
from package
–––
7.5 –––
and center of die contact
S
––– 1960 –––
VGS = 0V
––– 250 –––
VDS = 25V
–––
40 –––
pF
ƒ = 1.0MHz, See Fig. 5
––– 700 185 mJ IAS = 16A, L = 1.5mH
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
33
––– –––
showing the
A
G
integral reverse
––– ––– 110
S
p-n junction diode.
––– ––– 1.2
V
TJ = 25°C, IS = 16A, VGS = 0V
––– 115 170
ns
TJ = 25°C, IF = 16A
––– 505 760
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L =1.5mH
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2014-8-26
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175°C .
Uses IRF540N data and test conditions.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application
note #AN-994
2
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IRF540NS/IRF540NL
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
100
4.5V
10
20µs PULSE WIDTH
T = 25 C
1
4.5V
10
10
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.5
TJ = 25 ° C
100
TJ = 175 ° C
V DS = 50V
20µs PULSE WIDTH
7.0
8.0
9.0
100
ID = 33A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
VGS , Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 3. Typical Transfer Characteristics
2014-8-26
10
Fig 2. Typical Output Characteristics
1000
6.0
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
5.0
°
J
1
0.1
VDS , Drain-to-Source Voltage (V)
10
4.0
20µs PULSE WIDTH
T = 175 C
°
J
1
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
3
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IRF540NS/IRF540NL
3000
VGS , Gate-to-Source Voltage (V)
2500
C, Capacitance (pF)
20
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
2000
1500
1000
C
oss
500
ID = 16A
V DS = 80V
V DS = 50V
V DS = 20V
16
12
8
4
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
1
10
0
100
60
80
1000
ID, Drain-to-Source Current (A)
1000
ISD , Reverse Drain Current (A)
40
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100
TJ = 175 ° C
10
TJ = 25 ° C
1
0.1
0.2
20
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
V GS = 0 V
0.6
1.0
1.4
100µsec
10
1msec
1
T A = 25°C
10msec
T J = 175°C
Single Pulse
0.1
1.8
1
VSD ,Source-to-Drain Voltage (V)
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
2014-8-26
4
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IRF540NS/IRF540NL
35
RD
VDS
I D , Drain Current (A)
30
VGS
D.U.T.
RG
25
+
-VDD
20
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC)
10
1
D = 0.50
0.20
P DM
0.10
0.1
0.05
0.02
0.01
0.01
0.00001
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-26
5
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IRF540NS/IRF540NL
400
ID
6.5A
11.3A
BOTTOM 16A
L
VD S
D R IV E R
D .U .T
RG
+
- VD D
IA S
20V
A
0 .01 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
TOP
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( ° C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
12V
QG
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
2014-8-26
ID
Current Sampling Resistors
10
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IRF540NS/IRF540NL
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
2014-8-26
7
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IRF540NS/IRF540NL
D2Pak Package Outline
1 0.54 (.415 )
1 0.29 (.405 )
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
10 .1 6 (.4 00 )
R E F.
-B-
4 .6 9 (.18 5)
4 .2 0 (.16 5)
6.47 (.2 55 )
6.18 (.2 43 )
1 5.49 (.6 10)
1 4.73 (.5 80)
3
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5.28 (.2 08 )
4.78 (.1 88 )
3X
1.40 (.0 55)
1.14 (.0 45)
3X
5 .08 (.20 0)
0.55 (.0 22)
0.46 (.0 18)
0.9 3 (.0 37 )
0.6 9 (.0 27 )
0.25 (.0 10 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 55 )
1.1 4 (.0 45 )
B A M
M IN IM U M R EC O M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
LE AD AS SIG N M E N TS
1 - G ATE
2 - D RA IN
3 - SO U R C E
NO TE S:
1 D IM EN S IO N S A FTER SO LD E R D IP .
2 D IM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 19 82 .
3 C O N TRO L LIN G D IM EN S IO N : IN C H.
4 H E ATSINK & L EA D D IM E N SIO N S DO N O T IN C LU D E B U R RS .
8 .89 (.35 0)
17 .78 (.70 0)
3.81 (.1 5 0)
2.0 8 (.08 2)
2X
2.5 4 (.100 )
2X
D2Pak Part Marking Information
A
PART NUM BER
LO G O
F530S
9 24 6
9B
1M
A S S E M B LY
LO T C O D E
2014-8-26
8
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
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IRF540NS/IRF540NL
TO-262 Package Outline
TO-262 Part Marking Information
2014-8-26
9
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IRF540NS/IRF540NL
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 ( .1 6 1 )
3 .9 0 ( .1 5 3 )
F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 )
0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )
1 1.6 0 (.4 57 )
1 1.4 0 (.4 49 )
1 .6 5 ( .0 6 5 )
1 5 .42 (.60 9 )
1 5 .22 (.60 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TRL
1 .75 (.06 9 )
1 .25 (.04 9 )
1 0.9 0 (.4 2 9)
1 0.7 0 (.4 2 1)
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .1 0 (.63 4 )
15 .9 0 (.62 6 )
F E E D D IR E C T IO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079 )
2 3.9 0 (.9 41)
4
3 30 .00
( 14.1 73 )
MAX.
6 0.0 0 (2.36 2)
M IN .
N O TE S :
1 . CO M F OR M S TO E IA -418 .
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER .
3 . DIM E NS IO N M EA S UR E D @ H U B.
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
2014-8-26
26 .40 (1 .03 9)
24 .40 (.9 61 )
3
10
30.4 0 (1.19 7)
M A X.
4
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