MC10E150, MC100E150 5VECL 6-Bit D Latch Description The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low. The 100 Series contains temperature compensation. http://onsemi.com Features • 800 ps Max. Propagation Delay • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V • • • • • • • • with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V Internal Input 50 kW Pulldown Resistors ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V Charged Device Model; > 2 kV Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 173 devices Pb−Free Packages are Available* PLCC−28 FN SUFFIX CASE 776 MARKING DIAGRAM* 1 MCxxxE150FNG AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 10 1 Publication Order Number: MC10E150/D MC10E150, MC100E150 MR LEN2 LEN1 NC VCCO Q5 Q5 25 20 19 24 23 22 21 D0 Q0 D R D5 26 18 Q4 D4 27 17 Q4 D1 Q1 D R D3 VEE 28 Pinout: 28-Lead PLCC (Top View) 1 16 VCC 15 Q3 D2 2 14 Q3 D1 3 13 Q2 D0 4 12 Q2 D3 6 D4 7 8 9 10 11 Q0 Q0 Q1 Q1 VCCO D5 * All VCC and VCCO pins are tied together on the die. D LEN1 LEN2 Figure 1. 28−Lead Pinout MR Figure 2. Logic Diagram Table 1. PIN DESCRIPTION PIN D0 − D5 LEN1, LEN2 MR Q0 − Q5, Q0 − Q5 VCC, VCCO VEE NC FUNCTION ECL Data Inputs ECL Latch Enables ECL Master Reset ECL Differential Outputs Positive Supply Negative Supply No Connect http://onsemi.com 2 Q4 Q5 R Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Q3 Q4 D R NC VCCO Q2 Q3 D R 5 Q1 Q2 D R D2 Q0 Q5 MC10E150, MC100E150 Table 2. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 Condition 2 8 V VEE NECL Mode Power Supply VCC = 0 V −8 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA TA Operating Temperature Range 0 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm PLCC−28 PLCC−28 63.5 43.5 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board PLCC−28 22 to 26 °C/W VEE PECL Operating Range NECL Operating Range 4.2 to 5.7 −5.7 to −4.2 V V Tsol Wave Solder 265 265 °C VI v VCC VI w VEE Pb Pb−Free Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. 10E SERIES PECL DC CHARACTERISTICS VCC = 5.0 V, VEE = 0.0 V (Note 1) 0°C Symbol Typ Max 52 62 3980 4070 4160 3050 3210 3370 Input HIGH Voltage 3830 3995 Input LOW Voltage 3050 3285 Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Note 2) VOL Output LOW Voltage (Note 2) VIH VIL IIH Input HIGH Current Min D LEN, MR IIL 25°C Input LOW Current Min Typ Max 52 62 4020 4105 4190 3050 3210 3370 4160 3870 4030 4190 3520 3050 3285 3520 200 150 0.5 85°C 0.3 Min Typ Max Unit 52 62 mA 4090 4185 4280 mV 3050 3227 3405 mV 3940 4110 4280 mV 3050 3302 3555 mV 200 150 mA mA 200 150 0.5 0.25 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. http://onsemi.com 3 MC10E150, MC100E150 Table 4. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 3) 0°C Symbol Characteristic Min 25°C Typ Max 52 62 Min 85°C Typ Max 52 62 Min Typ Max Unit 52 62 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 4) −1020 −930 −840 −980 −895 −810 −910 −815 −720 mV VOL Output LOW Voltage (Note 4) −1950 −1790 −1630 −1950 −1790 −1630 −1950 −1773 −1595 mV VIH Input HIGH Voltage −1170 −1005 −840 −1130 −970 −810 −1060 −890 −720 mV VIL Input LOW Voltage −1950 −1715 −1480 −1950 −1715 −1480 −1950 −1698 −1445 mV IIH Input HIGH Current 200 150 mA mA 200 150 D LEN, MR IIL Input LOW Current 0.5 0.3 200 150 0.5 0.065 0.3 mA 0.2 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 4. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. Table 5. 100E SERIES PECL DC CHARACTERISTICS VCC = 5.0 V, VEE = 0.0 V (Note 5) 0°C Symbol Characteristic Typ Max 52 62 3975 4050 4120 Output LOW Voltage (Note 6) 3190 3295 Input HIGH Voltage 3835 3975 VIL Input LOW Voltage 3190 3355 IIH Input HIGH Current IEE Power Supply Current VOH Output HIGH Voltage (Note 6) VOL VIH Min 25°C D LEN, MR IIL Input LOW Current Min Typ Max 52 62 3975 4050 4120 3380 3190 3255 4120 3835 3975 3525 3190 3355 200 150 0.5 85°C 0.3 Min Typ Max Unit 60 72 mA 3975 4050 4120 mV 3380 3190 3260 3380 mV 4120 3835 3975 4120 mV 3525 3190 3355 3525 mV 200 150 mA mA 200 150 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 6. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. http://onsemi.com 4 MC10E150, MC100E150 Table 6. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 7) 0°C Symbol Characteristic Min 25°C Typ Max 52 62 Min 85°C Typ Max 52 62 Min Typ Max Unit 60 72 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 8) −1025 −950 −880 −1025 −950 −880 −1025 −950 −880 mV VOL Output LOW Voltage (Note 8) −1810 −1705 −1620 −1810 −1745 −1620 −1810 −1740 −1620 mV VIH Input HIGH Voltage −1165 −1025 −880 −1165 −1025 −880 −1165 −1025 −880 mV VIL Input LOW Voltage −1810 −1645 −1475 −1810 −1645 −1475 −1810 −1645 −1475 mV IIH Input HIGH Current 200 150 mA mA 200 150 D LEN, MR IIL Input LOW Current 0.5 0.3 200 150 0.5 0.25 0.5 mA 0.2 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 8. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. Table 7. AC CHARACTERISTICS VCCx= 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 9) 0°C Characteristic Min Typ fMAX Maximum Toggle Frequency 900 1100 tPLH tPHL Propagation Delay to Output D LEN MR 250 375 450 375 500 625 ts Setup Time D 200 Min Typ 900 1100 250 375 450 375 500 625 50 200 D 200 −50 tRR tPW Reset Recovery Time 750 650 Minimum Pulse Width MR 400 Symbol th 25°C Max 85°C Max Min Typ 900 1100 250 375 450 375 500 625 50 200 50 200 −50 200 −50 750 650 750 650 Max Unit MHz ps 550 800 750 550 800 750 550 800 750 ps Hold Time ps ps ps 400 400 tSKEW Within-Device Skew (Note 10) 50 50 50 ps tJITTER Random Clock Jitter (RMS) <1 <1 <1 ps tr tf Rise/Fall Time (20 - 80%) ps 300 450 650 300 450 650 300 450 650 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 V / +0.8 V. 10. Within-device skew is defined as identical transitions on similar paths through a device. http://onsemi.com 5 MC10E150, MC100E150 Q Zo = 50 W D Receiver Device Driver Device Q Zo = 50 W D 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Package Shipping † MC10E150FN PLCC−28 37 Units / Rail MC10E150FNG PLCC−28 (Pb−Free) 37 Units / Rail MC10E150FNR2 PLCC−28 500 / Tape & Reel MC10E150FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel MC100E150FN PLCC−28 37 Units / Rail MC100E150FNG PLCC−28 (Pb−Free) 37 Units / Rail MC100E150FNR2 PLCC−28 500 / Tape & Reel MC100E150FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 6 MC10E150, MC100E150 PACKAGE DIMENSIONS PLCC−28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776−02 ISSUE E 0.007 (0.180) B Y BRK −N− T L−M M 0.007 (0.180) U M N S T L−M S S N S D Z −M− −L− W 28 D X 0.010 (0.250) G1 V 1 T L−M S N S S VIEW D−D A 0.007 (0.180) R 0.007 (0.180) Z C M M T L−M T L−M S S N S N S 0.007 (0.180) H J 0.010 (0.250) S 0.004 (0.100) −T− SEATING T L−M S N S N S K PLANE F VIEW S G1 T L−M K1 E G M S VIEW S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10_ 0.410 0.430 0.040 −−− http://onsemi.com 7 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10_ 10.42 10.92 1.02 −−− 0.007 (0.180) M T L−M S N S MC10E150, MC100E150 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10E150/D