Ordering number : ENA0911
LA73076V
Monolithic Linear IC
Video Driver for DVC/DSC,
Cell Phone
http://onsemi.com
Overview
The LA73076V is a low voltage drive (2.7V to 3.6V) video driver developed for portable appliances including digital
video cameras, digital still cameras and cell phones. It incorporates a minus-voltage generator that allows the
LA73076V to generate its output with the pedestal voltage set to 0V, so that no output coupling capacitor is required.
This enables substantial reduction in mounting space without concerned about V-sag.
Features
• Output coupling capacity not required
• Low-voltage drive (VCC = 2.7V to 3.6V)
• Νο V-sag
• Sextic LPF incorporated (fc = 10MHz)
• 6dB amplifier
• Current drain of 0μA in the standby mode
• Output drive capable of covering maximum 75Ω output, one channel
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Symbol
Conditions
VCC max
Pd max
Ta ≤ 80°C, *Mounted on a specified board
Ratings
Unit
4.0
V
220
mW
Operating temperature
Topr
-20 to +80
°C
Storage temperature
Tstg
-55 to +150
°C
*: Mounted on a specified board: 114.3mm×76.1mm×1.6mm, glass epoxy
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
July, 2013
90507 TI IM B8-8590 No.A0911-1/7
LA73076V
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended Operating supply voltage
VCCSTD
Operating supply voltage range
Conditions
Ratings
VCCRANGE
Unit
3.1
V
2.7 to 3.6
V
Electrical Characteristics at Ta = 25°C, VCC = 3.1V
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
Current dissipation part
Current dissipation 1 (Non-signal active mode)
ICC
2pin = Low, Input = White50%
Current dissipation 2 (Non-signal active mode)
ICC2
2pin = Low, Input = No signal
Current dissipation 3 (Standby mode)
ICC-STBY
25
37
44
mA
10.0
14
17.5
mA
0
5.0
μA
VCC-0.5
VCC
V
GND
0.5
V
2.2
VCC
V
1.5
1.7
V
GND
0.5
V
VCC-0.5
VCC
V
GND
0.5
V
2pin = High
Control terminal part
Stand-by control pin H voltage
VTH-STBY-H
2 pin voltage range at which
ICC ≤ 5μA
(SET = STANDBY MODE)
Stand-by control pin L voltage
VTH-STBY-L
2 pin voltage range at which
ICC ≥ 5μA
(SET = ACTIVE MODE)
Output control pin H voltage range
VOUT_M
(SET=MIX_OUT)
Voltage in which only output of
MIX is selected
Output control pin M voltage range
VOUT_YC
(SET=Y,C_OUT)
Voltage in which output of Y and C
is selected
Output control pin L voltage range
VOUT_ALL
(SET=ALL_OUT)
Voltage in which all outputs are
selected
SW, MUTE control pin voltage range
VSW_MUTE
(SET=MUTE MODE)
As for this voltage, SW selects
MUTE
SW, through control pin voltage range
VSW_THR
(SET=through MODE)
As for this voltage, SW selects
through
Y-in
Voltage gain
VGainY
100% white VYIN = 1Vp-p
Freq. characteristics
Vf7.2Y
f = 100kHz/7.2MHz
Vf20Y
Allowable sync input level
VIN-Sync
5.7
6.2
6.7
dB
-1.0
0
+1.0
dB
-30
dB
f = 100kHz/20MHz
VYIN = Black burst, Output R conditions
Mix_out: 150Ω, Y_out: 150Ω
200
5.7
mVp-p
C-in
Voltage gain
Vgainc
VCIN = 350mVp-p
Freq. characteristics
Vf20C
f = 4MHz/20MHz
6.2
6.7
dB
-25
dB
Package Dimensions
unit : mm (typ)
3178B
5.2
0.5
6.4
9
4.4
16
1
8
0.65
0.15
(1.3)
1.5max
0.22
0.1
(0.33)
SANYO : SSOP16(225mil)
No.A0911-2/7
LA73076V
Pin Assignment, Pin Function Diagram and Block Diagram
Control
PIN2
L
OUT
PIN1
MIX Y C
Active
(Input signal)
Signal → ON
No signal → OFF
Standby → OFF
L(GND) { { {
M(OPEN) × { {
H
{ × ×
*
H(OPEN)
×
×
VCC
×
(Note 1)
The wiring from MIX-OUT(13Pin),
Y_OUT(Pin15) to 75Ω must be as
shortened as possible.
S-CTL
1
16
A-GND
2
TDK
C1608 JB 1C 104k
75Ω 0.1μF
DR
DR
DR
C(PIN3)
6dB
6dB
6dB
L(OPEN) through
H
MUTE
TDK
C1608 JB 1C 104k
from DAC
14
C-OUT
VCC
13
4
C-MUTE-CTL
0.1μF
6
RIP-FIL
1μF
LPF
7
VCC_NVG
SW
MUTE
DC
TDK
C1608 JB 1C 475k
11
-VCC 4.7μF
LPF
Negative
Voltage
Generator
8
(Note 5)
Use the input capacity value within a range of
0.1μF to 1μF while checking the sag
condition of the output waveform.
REG
(Note 2)
Position the decoupling
capacitor of VCC-GND
as near as possible to
this IC.
TDK
C1608 JB OJ 475k
10
CLAMP
TDK
C1608 JB 1C
105k
GND
← 0V
12
Y-IN
from DAC
(Note 3)
The wiring from C-OUT
(3Pin), C-IN(5Pin), Y-IN
(7Pin) to 75Ω must be as
shortened as possible.
75Ω
MIX-OUT
5
1μF
VCC
VCC_A
C-IN
TDK
C1608 JB 1C 105k
← 0V
Y-OUT 75Ω
3
PIN4
15
4.7μF
P-SAV-CTL
ND
9
CLK-OUT
2.2μF
(Note 4)
For these two capacities;
TDK
C1608 JB 1C 225k Temperature
characteristic B rank
(±10%)
Electrostatic tolerance
K rank(±10%)
and Withstand voltage
of 6.3V or more are
recommended.
(Note 6)
As the minus power supply in this IC generates the clock for charge pump power supply by extracting the sink component
of the input video signal (synchronous isolation) and by detecting its fall, the portion around the V-syncrhonization of this IC
output may be reduced when the pseudo V signal without cut-in pulse is inserted as in the case of certain analog VCR
special play (search). On the contrary, there is no problem when the pseudo V signal has the cut-in pulse. Pay due attention
on this fact during use.
No.A0911-3/7
LA73076V
Pin Functions
Pin
No
1
Symbol
Voltage
S-CTL
VCC
or
OPEN
or
Description
Equivalent Circuit
Output select pin
14
OUT
Control of Pin1
0V
MIX
Y
C
L(GND)
0V to 0.5V
⇒
{
{
{
M(OPEN)
OPEN
or
1.6V±0.1V
⇒
×
{
{
H(VCC)
2.2V to
VCC
5kΩ
40kΩ
1
S-CTL
P-SAVCTL
VCC
or
0V
REF
1.6V
1.6V
BUF
⇒
{
×
×
2.4V
16
2
VCC_A
A-GND
Power save mode select pin
Control of Pin2
14
Mode
L(GND)
0V to 0.5V
⇒
Active
H(VCC)
OPEN
or
VCC±0.5V
⇒
Standby
VCC_A
50kΩ
50kΩ
50kΩ
4kΩ
2
P-SAV-CTL
16
3
C-OUT
1.55V
A-GND
Video output terminal
(Push-pull output low-impedance)
14
VCC_A
50kΩ
700mVp-p
1.55V
250Ω
3
C-OUT
+
-
49kΩ
50kΩ
16
4
C-MUTECTL
VCC
or
0V
A_GND
Mute select pin
Control of Pin
OUT
L(GND)
0V to 0.5V
or
OPEN
⇒
H(VCC)
VCC±0.5V
⇒
14
VCC_A
through
Pin4:
H→MUTE
4
C-MUTE-CTL
10kΩ
40kΩ
16
1.2V
A-GND
Continued on next page.
No.A0911-4/7
LA73076V
Continued from preceding page.
Pin
No
5
Symbol
Voltage
C-IN
1.55V
Description
Equivalent Circuit
Video input terminal
14
(Input high-impedance)
1.55V
VCC_A
700mVp-p
10kΩ
5
10kΩ
C-IN
1.55V
16
6
RIP-FIL
1.2V
14
6
16
7
Y-IN
A-GND
1.1V
VCC_A
RIP-FIL
8kΩ
1kΩ
A-GND
Video input terminal
14
(Sync-chip clamp
(Input high-impedance))
VCC_A
1kΩ
1kΩ
1Vp-p
200Ω
1.1V
7
16
8
GND
Y-IN
200Ω
2kΩ
Power On
Reset
A-GND
0V
Continued on next page.
No.A0911-5/7
LA73076V
Continued from preceding page.
Pin
No
9
Symbol
Voltage
CLK-OUT
VCC
Description
Equivalent Circuit
Pin 9: Clock output terminal
↑↓
12
V CC =3.1V
0V
VCC_NVG
3V
2V
9
9pin
CLK-OUT
1V
50kΩ
50kΩ
0V
2.4V
-1V
10pin
11pin
50kΩ
-2V
8
-3V
10
ND
+0.5V
GND
Pin 10: The terminal which transmits
an electric charge
↑↓
12
-2.5V
(-VCC)
VCC_NVG
8
GND
Pin 11: -VCC
11
-VCC
11
-VCC
0V
↑↓
-2.2V
(-VCC)
50kΩ
10
12
VCC_NVG
13
MIX-OUT
15
Y-OUT
ND
2.7V to
3.6V
0V
Video output terminal
(Push-pull output low-impedance)
14
1.4V
VCC_A
50kΩ
2Vp-p
250Ω
0V
--0.6V
(MIX-OUT: burst be absent)
13Pin: MIX-OUT
15Pin: Y-OUT
16
11
14
VCC_A
2.7V to
A_GND
+
-
49Ω
50kΩ
-VCC
Analog VCC
3.6V
16
A-GND
0V
Analog GND
No.A0911-6/7
LA73076V
Test Circuit Diagram
VM
VM
VM
4.7μF
IM
C-MUTE-CTL
S-CTL
P-SAV-CTL
4
2
1
VCC_NVG
12
VM
VCC
VCC_A
14
Y-IN
75Ω
7
1μF
SG
6dB
LPF
(7MHz)
Clamp
DR
15
Y-OUT
M
75Ω
6dB
MIX
DR
75Ω
MIX-OUT
13
M
C-IN
5
0.1μF
SG
75Ω
C-OUT
LPF
(7MHz)
MUTE
DC
DR
9
1μF
75Ω
0.1μF
10
ND
CLK-OUT
2.2μF
11
-VCC
4.7μF
8
GND
75Ω
3
Minus Voltage
Generator
6
RIP-FIL
6dB
75Ω
16
A_GND
M
75Ω
Active
(Input signal)
Signal → ON
No signal → OFF
Standby → OFF
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PS No.A0911-7/7