MCNIX MX29LV128DTT2I-90Q 128m-bit [16m x 8/8m x 16] single voltage 3v only flash memory Datasheet

MX29LV128D T/B
128M-BIT [16M x 8/8M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
• 16,777,216 x 8 / 8,388,608 x 16 switchable
• Sector Structure
- 8KB(4KW) x 8 and 64KB(32KW) x 255
• Extra 128-word sector for security
- Features factory locked and identifiable, and customer lockable
• Sector Groups Protection / Chip Unprotect
- Provides sector group protect function to prevent program or erase operation in the protected sector group
- Provides chip unprotect function to allow code changing
- Provides temporary sector group unprotect function for code changing in previously protected sector groups
• Single Power Supply Operation
- 3.0 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to 1.5xVcc
• Low Vcc write inhibit : Vcc <= VLKO
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
PERFORMANCE
• High Performance
- Fast access time: 90ns
- Fast program time: 11us/word (typical)
- Fast erase time: 1s/sector (typical)
• Low Power Consumption
- Low active read current: 20mA (typical) at 5MHz
- Low standby current: 8uA (typical)
• Typical 100,000 erase/program cycle
• 10 years data retention
SOFTWARE FEATURES
• Erase Suspend/ Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being erased
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
• WP#/ACC input pin
- Hardware write protect pin/Provides accelerated program capability
PACKAGE
• 48-Pin TSOP
• 56-Pin TSOP
• 70-Pin SSOP
• All Pb-free devices are RoHS Compliant
P/N:PM1327
REV. 1.0, SEP. 22, 2008
1
MX29LV128D T/B
PIN CONFIGURATION
48 TSOP
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RESET#
A21
WP#/ACC
A22
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC
A22
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RESET#
A21
WP#/ACC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
Q11
Q3
Q10
Q2
Q9
Q1
Q8
Q0
OE#
GND
CE#
A0
56 TSOP
P/N:PM1327
NC
NC
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
Q11
Q3
Q10
Q2
Q9
Q1
Q8
Q0
OE#
GND
CE#
A0
NC
VCC
REV. 1.0, SEP. 22, 2008
2
MX29LV128D T/B
70 SSOP
PIN DESCRIPTION
A20
A21
A18
A17
OE#
A6
A5
A4
A3
A2
A1
A0
BYTE#
NC
NC
NC
NC
NC
NC
NC
NC
NC
CE#
GND
GND
A7
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
NC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
A19
A8
A15
A10
A11
A12
A13
A14
A9
A16
WE#
NC
A22
NC
NC
NC
NC
WP#/ACC
NC
NC
NC
NC
RESET#
GND
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
VCC
SYMBOL
PIN NAME
A0~A22
Address Input
Q0~Q14
Data Inputs/Outputs
Q15/A-1
Q15(Word Mode)/LSB addr(Byte Mode)
CE#
Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
RESET#
Hardware Reset Pin, Active Low
WP#/ACC Hardware Write Protect/Programming
Acceleration input
P/N:PM1327
RY/BY#
Read/Busy Output
BYTE#
Selects 8 bits or 16 bits mode
VCC
+3.0V single power supply
GND
Device Ground
NC
Pin Not Connected Internally
REV. 1.0, SEP. 22, 2008
3
MX29LV128D T/B
LOGIC SYMBOL
23
16 or 8
A0-A22
Q0-Q15
(A-1)
CE#
OE#
WE#
RESET#
RY/BY#
WP#/ACC
BYTE#
P/N:PM1327
REV. 1.0, SEP. 22, 2008
4
MX29LV128D T/B
BLOCK DIAGRAM
CE#
OE#
WE#
RESET#
BYTE#
WP#/ACC
WRITE
CONTROL
STATE
INPUT
LOGIC
HIGH VOLTAGE
MACHINE
(WSM)
LATCH
BUFFER
STATE
FLASH
REGISTER
ARRAY
ARRAY
Y-DECODER
AND
X-DECODER
ADDRESS
A0-AM
PROGRAM/ERASE
Y-PASS GATE
SOURCE
HV
COMMAND
DATA
DECODER
SENSE
AMPLIFIER
PGM
DATA
HV
COMMAND
DATA LATCH
PROGRAM
DATA LATCH
Q0-Q15/A-1
I/O BUFFER
AM: MSB address
P/N:PM1327
REV. 1.0, SEP. 22, 2008
5
MX29LV128D T/B
BLOCK DIAGRAM DESCRIPTION
The block diagram on Page 4 illustrates a simplified architecture of MX29LV128D T/B. Each block in the block diagram
represents one or more circuit modules in the real chip used to access, erase, program, and read the memory array.
The "CONTROL INPUT LOGIC" block receives input pins CE#, OE#, WE#, RESET#, BYTE#, and WP#/ACC. It
creates internal timing control signals according to the input pins and outputs to the "ADDRESS LATCH AND BUFFER"
to latch the external address pins A0-AM(A22). The internal addresses are output from this block to the main array and
decoders composed of "X-DECODER", "Y-DECODER", "Y-PASS GATE", AND "FLASH ARRAY". The X-DECODER
decodes the word-lines of the flash array, while the Y-DECODER decodes the bit-lines of the flash array. The bit lines
are electrically connected to the "SENSE AMPLIFIER" and "PGM DATA HV" selectively through the Y-PASS GATES.
SENSE AMPLIFIERS are used to read out the contents of the flash memory, while the "PGM DATA HV" block is used
to selectively deliver high power to bit-lines during programming. The "I/O BUFFER" controls the input and output on
the Q0-Q15/A-1 pads. During read operation, the I/O BUFFER receives data from SENSE AMPLIFIERS and drives
the output pads accordingly. In the last cycle of program command, the I/O BUFFER transmits the data on Q0-Q15/A1 to "PROGRAM DATA LATCH", which controls the high power drivers in "PGM DATA HV" to selectively program the
bits in a word or byte according to the user input pattern.
The "PROGRAM/ERASE HIGH VOLTAGE" block comprises the circuits to generate and deliver the necessary high
voltage to the X-DECODER, FLASH ARRAY, and "PGM DATA HV" blocks. The logic control module comprises of the
"WRITE STATE MACHINE, WSM", "STATE REGISTER", "COMMAND DATA DECODER", and "COMMAND DATA
LATCH". When the user issues a command by toggling WE#, the command on Q0-A15/A-1 is latched in the COMMAND DATA LATCH and is decoded by the COMMAND DATA DECODER. The STATE REGISTER receives the
command and records the current state of the device. The WSM implements the internal algorithms for program or
erase according to the current command state by controlling each block in the block diagram.
ARRAY ARCHITECTURE
The main flash memory array can be organized as 16M Bytes x 8 or as 8M Words x 16. The details of the address
ranges and the corresponding sector addresses are shown in Table 1. Table 1.a shows the sector group architecture for
the Top Boot part, whereas Table 1.b shows the sector group architecture for the Bottom Boot part. The specific
security sector addresses are shown at the bottom off each of these tables.
P/N:PM1327
REV. 1.0, SEP. 22, 2008
6
MX29LV128D T/B
BLOCK STRUCTURE
Table 1. a: MX29LV128DT SECTOR GROUP ARCHITECTURE
Sector
Group
1
1
1
1
2
2
2
2
3
3
3
3
4
4
4
4
5
5
5
5
6
6
6
6
7
7
7
7
8
8
8
8
9
9
9
9
10
10
10
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
SA35
SA36
SA37
SA38
00000000xxx
00000001xxx
00000010xxx
00000011xxx
00000100xxx
00000101xxx
00000110xxx
00000111xxx
00001000xxx
00001001xxx
00001010xxx
00001011xxx
00001100xxx
00001101xxx
00001110xxx
00001111xxx
00010000xxx
00010001xxx
00010010xxx
00010011xxx
00010100xxx
00010101xxx
00010110xxx
00010111xxx
00011000xxx
00011001xxx
00011010xxx
00011011xxx
00011100xxx
00011101xxx
00011110xxx
00011111xxx
00100000xxx
00100001xxx
00100010xxx
00100011xxx
00100100xxx
00100101xxx
00100110xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
000000-0FFFF
010000-1FFFF
020000-2FFFF
030000-3FFFF
040000-4FFFF
050000-5FFFF
060000-6FFFF
070000-7FFFF
080000-8FFFF
090000-9FFFF
0A0000-AFFFF
0B0000-BFFFF
0C0000-CFFFF
0D0000-DFFFF
0E0000-EFFFF
0F0000-FFFFF
100000-10FFFF
110000-11FFFF
120000-12FFFF
130000-13FFFF
140000-14FFFF
150000-15FFFF
160000-16FFFF
170000-17FFFF
180000-18FFFF
190000-19FFFF
1A0000-1AFFFF
1B0000-1BFFFF
1C0000-1CFFFF
1D0000-1DFFFF
1E0000-1EFFFF
1F0000-1FFFFF
200000-20FFFF
210000-21FFFF
220000-22FFFF
230000-23FFFF
240000-24FFFF
250000-25FFFF
260000-26FFFF
000000-007FFF
008000-00FFFF
010000-017FFF
018000-01FFFF
020000-027FFF
028000-02FFFF
030000-037FFF
038000-03FFFF
040000-047FFF
048000-04FFFF
050000-057FFF
058000-05FFFF
060000-067FFF
068000-06FFFF
070000-077FFF
078000-07FFFF
080000-087FFF
088000-08FFFF
090000-097FFF
098000-09FFFF
0A0000-0A7FFF
0A8000-0AFFFF
0B0000-0B7FFF
0B8000-0BFFFF
0C0000-0C7FFF
0C8000-0CFFFF
0D0000-0D7FFF
0D8000-0DFFFF
0E0000-0E7FFF
0E8000-0EFFFF
0F0000-0F7FFF
0F8000-0FFFFF
100000-107FFF
108000-10FFFF
110000-117FFF
118000-11FFFF
120000-127FFF
128000-12FFFF
130000-137FFF
REV. 1.0, SEP. 22, 2008
7
MX29LV128D T/B
Sector
Group
10
11
11
11
11
12
12
12
12
13
13
13
13
14
14
14
14
15
15
15
15
16
16
16
16
17
17
17
17
18
18
18
18
19
19
19
19
20
20
20
20
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
SA71
SA72
SA73
SA74
SA75
SA76
SA77
SA78
SA79
00100111xxx
00101000xxx
00101001xxx
00101010xxx
00101011xxx
00101100xxx
00101101xxx
00101110xxx
00101111xxx
00110000xxx
00110001xxx
00110010xxx
00110011xxx
00110100xxx
00110101xxx
00110110xxx
00110111xxx
00111000xxx
00111001xxx
00111010xxx
00111011xxx
00111100xxx
00111101xxx
00111110xxx
00111111xxx
01000000xxx
01000001xxx
01000010xxx
01000011xxx
01000100xxx
01000101xxx
01000110xxx
01000111xxx
01001000xxx
01001001xxx
01001010xxx
01001011xxx
01001100xxx
01001101xxx
01001110xxx
01001111xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
270000-27FFFF
280000-28FFFF
290000-29FFFF
2A0000-2AFFFF
2B0000-2BFFFF
2C0000-2CFFFF
2D0000-2DFFFF
2E0000-2EFFFF
2F0000-2FFFFF
300000-30FFFF
310000-31FFFF
320000-32FFFF
330000-33FFFF
340000-34FFFF
350000-35FFFF
360000-36FFFF
370000-37FFFF
380000-38FFFF
390000-39FFFF
3A0000-3AFFFF
3B0000-3BFFFF
3C0000-3CFFFF
3D0000-3DFFFF
3E0000-3EFFFF
3F0000-3FFFFF
400000-40FFFF
410000-41FFFF
420000-42FFFF
430000-43FFFF
440000-44FFFF
450000-45FFFF
460000-46FFFF
470000-47FFFF
480000-48FFFF
490000-49FFFF
4A0000-4AFFFF
4B0000-4BFFFF
4C0000-4CFFFF
4D0000-4DFFFF
4E0000-4EFFFF
4F0000-4FFFFF
138000-13FFFF
140000-147FFF
148000-14FFFF
150000-157FFF
158000-15FFFF
160000-167FFF
168000-16FFFF
170000-177FFF
178000-17FFFF
180000-187FFF
188000-18FFFF
190000-197FFF
198000-19FFFF
1A0000-1A7FFF
1A8000-1AFFFF
1B0000-1B7FFF
1B8000-1BFFFF
1C0000-1C7FFF
1C8000-1CFFFF
1D0000-1D7FFF
1D8000-1DFFFF
1E0000-1E7FFF
1E8000-1EFFFF
1F0000-1F7FFF
1F8000-1FFFFF
200000-207FFF
208000-20FFFF
210000-217FFF
218000-21FFFF
220000-227FFF
228000-22FFFF
230000-237FFF
238000-23FFFF
240000-247FFF
248000-24FFFF
250000-257FFF
258000-25FFFF
260000-267FFF
268000-26FFFF
270000-277FFF
278000-27FFFF
REV. 1.0, SEP. 22, 2008
8
MX29LV128D T/B
Sector
Group
21
21
21
21
22
22
22
22
23
23
23
23
24
24
24
24
25
25
25
25
26
26
26
26
27
27
27
27
28
28
28
28
29
29
29
29
30
30
30
30
31
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA80
SA81
SA82
SA83
SA84
SA85
SA86
SA87
SA88
SA89
SA90
SA91
SA92
SA93
SA94
SA95
SA96
SA97
SA98
SA99
SA100
SA101
SA102
SA103
SA104
SA105
SA106
SA107
SA108
SA109
SA110
SA111
SA112
SA113
SA114
SA115
SA116
SA117
SA118
SA119
SA120
01010000xxx
01010001xxx
01010010xxx
01010011xxx
01010100xxx
01010101xxx
01010110xxx
01010111xxx
01011000xxx
01011001xxx
01011010xxx
01011011xxx
01011100xxx
01011101xxx
01011110xxx
01011111xxx
01100000xxx
01100001xxx
01100010xxx
01100011xxx
01100100xxx
01100101xxx
01100110xxx
01100111xxx
01101000xxx
01101001xxx
01101010xxx
01101011xxx
01101100xxx
01101101xxx
01101110xxx
01101111xxx
01110000xxx
01110001xxx
01110010xxx
01110011xxx
01110100xxx
01110101xxx
01110110xxx
01110111xxx
01111000xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
500000-50FFFF
510000-51FFFF
520000-52FFFF
530000-53FFFF
540000-54FFFF
550000-55FFFF
560000-56FFFF
570000-57FFFF
580000-58FFFF
590000-59FFFF
5A0000-5AFFFF
5B0000-5BFFFF
5C0000-5CFFFF
5D0000-5DFFFF
5E0000-5EFFFF
5F0000-5FFFFF
600000-60FFFF
610000-61FFFF
620000-62FFFF
630000-63FFFF
640000-64FFFF
650000-65FFFF
660000-66FFFF
670000-67FFFF
680000-68FFFF
690000-69FFFF
6A0000-6AFFFF
6B0000-6BFFFF
6C0000-6CFFFF
6D0000-6DFFFF
6E0000-6EFFFF
6F0000-6FFFFF
700000-70FFFF
710000-71FFFF
720000-72FFFF
730000-73FFFF
740000-74FFFF
750000-75FFFF
760000-76FFFF
770000-77FFFF
780000-78FFFF
280000-287FFF
288000-28FFFF
290000-297FFF
298000-29FFFF
2A0000-2A7FFF
2A8000-2AFFFF
2B0000-2B7FFF
2B8000-2BFFFF
2C0000-2C7FFF
2C8000-2CFFFF
2D0000-2D7FFF
2D8000-2DFFFF
2E0000-2E7FFF
2E8000-2EFFFF
2F0000-2F7FFF
2F8000-2FFFFF
300000-307FFF
308000-30FFFF
310000-317FFF
318000-31FFFF
320000-327FFF
328000-32FFFF
330000-337FFF
338000-33FFFF
340000-347FFF
348000-34FFFF
350000-357FFF
358000-35FFFF
360000-367FFF
368000-36FFFF
370000-377FFF
378000-37FFFF
380000-387FFF
388000-38FFFF
390000-397FFF
398000-39FFFF
3A0000-3A7FFF
3A8000-3AFFFF
3B0000-3B7FFF
3B8000-3BFFFF
3C0000-3C7FFF
REV. 1.0, SEP. 22, 2008
9
MX29LV128D T/B
Sector
Group
31
31
31
32
32
32
32
33
33
33
33
34
34
34
34
35
35
35
35
36
36
36
36
37
37
37
37
38
38
38
38
39
39
39
39
40
40
40
40
41
41
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA121
SA122
SA123
SA124
SA125
SA126
SA127
SA128
SA129
SA130
SA131
SA132
SA133
SA134
SA135
SA136
SA137
SA138
SA139
SA140
SA141
SA142
SA143
SA144
SA145
SA146
SA147
SA148
SA149
SA150
SA151
SA152
SA153
SA154
SA155
SA156
SA157
SA158
SA159
SA160
SA161
01111001xxx
01111010xxx
01111011xxx
01111100xxx
01111101xxx
01111110xxx
01111111xxx
10000000xxx
10000001xxx
10000010xxx
10000011xxx
10000100xxx
10000101xxx
10000110xxx
10000111xxx
10001000xxx
10001001xxx
10001010xxx
10001011xxx
10001100xxx
10001101xxx
10001110xxx
10001111xxx
10010000xxx
10010001xxx
10010010xxx
10010011xxx
10010100xxx
10010101xxx
10010110xxx
10010111xxx
10011000xxx
10011001xxx
10011010xxx
10011011xxx
10011100xxx
10011101xxx
10011110xxx
10011111xxx
10100000xxx
10100001xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
790000-79FFFF
7A0000-7AFFFF
7B0000-7BFFFF
7C0000-7CFFFF
7D0000-7DFFFF
7E0000-7EFFFF
7F0000-7FFFFF
800000-80FFFF
810000-81FFFF
820000-82FFFF
830000-83FFFF
840000-84FFFF
850000-85FFFF
860000-86FFFF
870000-87FFFF
880000-88FFFF
890000-89FFFF
8A0000-8AFFFF
8B0000-8BFFFF
8C0000-8CFFFF
8D0000-8DFFFF
8E0000-8EFFFF
8F0000-8FFFFF
900000-90FFFF
910000-91FFFF
920000-92FFFF
930000-93FFFF
940000-94FFFF
950000-95FFFF
960000-96FFFF
970000-97FFFF
980000-98FFFF
990000-99FFFF
9A0000-9AFFFF
9B0000-9BFFFF
9C0000-9CFFFF
9D0000-9DFFFF
9E0000-9EFFFF
9F0000-9FFFFF
A00000-A0FFFF
A10000-A1FFFF
3C8000-3CFFFF
3D0000-3D7FFF
3D8000-3DFFFF
3E0000-3E7FFF
3E8000-3EFFFF
3F0000-3F7FFF
3F8000-3FFFFF
400000-407FFF
408000-40FFFF
410000-417FFF
418000-41FFFF
420000-427FFF
428000-42FFFF
430000-437FFF
438000-43FFFF
440000-447FFF
448000-44FFFF
450000-457FFF
458000-45FFFF
460000-467FFF
468000-46FFFF
470000-477FFF
478000-47FFFF
480000-487FFF
488000-48FFFF
490000-497FFF
498000-49FFFF
4A0000-4A7FFF
4A8000-4AFFFF
4B0000-4B7FFF
4B8000-4BFFFF
4C0000-4C7FFF
4C8000-4CFFFF
4D0000-4D7FFF
4D8000-4DFFFF
4E0000-4E7FFF
4E8000-4EFFFF
4F0000-4F7FFF
4F8000-4FFFFF
500000-507FFF
508000-50FFFF
REV. 1.0, SEP. 22, 2008
10
MX29LV128D T/B
Sector
Group
41
41
42
42
42
42
43
43
43
43
44
44
44
44
45
45
45
45
46
46
46
46
47
47
47
47
48
48
48
48
49
49
49
49
50
50
50
50
51
51
51
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA162
SA163
SA164
SA165
SA166
SA167
SA168
SA169
SA170
SA171
SA172
SA173
SA174
SA175
SA176
SA177
SA178
SA179
SA180
SA181
SA182
SA183
SA184
SA185
SA186
SA187
SA188
SA189
SA190
SA191
SA192
SA193
SA194
SA195
SA196
SA197
SA198
SA199
SA200
SA201
SA202
10100010xxx
10100011xxx
10100100xxx
10100101xxx
10100110xxx
10100111xxx
10101000xxx
10101001xxx
10101010xxx
10101011xxx
10101100xxx
10101101xxx
10101110xxx
10101111xxx
10110000xxx
10110001xxx
10110010xxx
10110011xxx
10110100xxx
10110101xxx
10110110xxx
10110111xxx
10111000xxx
10111001xxx
10111010xxx
10111011xxx
10111100xxx
10111101xxx
10111110xxx
10111111xxx
11000000xxx
11000001xxx
11000010xxx
11000011xxx
11000100xxx
11000101xxx
11000110xxx
11000111xxx
11001000xxx
11001001xxx
11001010xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
A20000-A2FFFF
A30000-A3FFFF
A40000-A4FFFF
A50000-A5FFFF
A60000-A6FFFF
A70000-A7FFFF
A80000-A8FFFF
A90000-A9FFFF
AA0000-AAFFFF
AB0000-ABFFFF
AC0000-ACFFFF
AD0000-ADFFFF
AE0000-AEFFFF
AF0000-AFFFFF
B00000-B0FFFF
B10000-B1FFFF
B20000-B2FFFF
B30000-B3FFFF
B40000-B4FFFF
B50000-B5FFFF
B60000-B6FFFF
B70000-B7FFFF
B80000-B8FFFF
B90000-B9FFFF
BA0000-BAFFFF
BB0000-BBFFFF
BC0000-BCFFFF
BD0000-BDFFFF
BE0000-BEFFFF
BF0000-BFFFFF
C00000-C0FFFF
C10000-C1FFFF
C20000-C2FFFF
C30000-C3FFFF
C40000-C4FFFF
C50000-C5FFFF
C60000-C6FFFF
C70000-C7FFFF
C80000-C8FFFF
C90000-C9FFFF
CA0000-CAFFFF
510000-517FFF
518000-51FFFF
520000-527FFF
528000-52FFFF
530000-537FFF
538000-53FFFF
540000-547FFF
548000-54FFFF
550000-557FFF
558000-55FFFF
560000-567FFF
568000-56FFFF
570000-577FFF
578000-57FFFF
580000-587FFF
588000-58FFFF
590000-597FFF
598000-59FFFF
5A0000-5A7FFF
5A8000-5AFFFF
5B0000-5B7FFF
5B8000-5BFFFF
5C0000-5C7FFF
5C8000-5CFFFF
5D0000-5D7FFF
5D8000-5DFFFF
5E0000-5E7FFF
5E8000-5EFFFF
5F0000-5F7FFF
5F8000-5FFFFF
600000-607FFF
608000-60FFFF
610000-617FFF
618000-61FFFF
620000-627FFF
628000-62FFFF
630000-637FFF
638000-63FFFF
640000-647FFF
648000-64FFFF
650000-657FFF
REV. 1.0, SEP. 22, 2008
11
MX29LV128D T/B
Sector
Group
51
52
52
52
52
53
53
53
53
54
54
54
54
55
55
55
55
56
56
56
56
57
57
57
57
58
58
58
58
59
59
59
59
60
60
60
60
61
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA203
SA204
SA205
SA206
SA207
SA208
SA209
SA210
SA211
SA212
SA213
SA214
SA215
SA216
SA217
SA218
SA219
SA220
SA221
SA222
SA223
SA224
SA225
SA226
SA227
SA228
SA229
SA230
SA231
SA232
SA233
SA234
SA235
SA236
SA237
SA238
SA239
SA240
11001011xxx
11001100xxx
11001101xxx
11001110xxx
11001111xxx
11010000xxx
11010001xxx
11010010xxx
11010011xxx
11010100xxx
11010101xxx
11010110xxx
11010111xxx
11011000xxx
11011001xxx
11011010xxx
11011011xxx
11011100xxx
11011101xxx
11011110xxx
11011111xxx
11100000xxx
11100001xxx
11100010xxx
11100011xxx
11100100xxx
11100101xxx
11100110xxx
11100111xxx
11101000xxx
11101001xxx
11101010xxx
11101011xxx
11101100xxx
11101101xxx
11101110xxx
11101111xxx
11110000xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
CB0000-CBFFFF
CC0000-CCFFFF
CD0000-CDFFFF
CE0000-CEFFFF
CF0000-CFFFFF
D00000-D0FFFF
D10000-D1FFFF
D20000-D2FFFF
D30000-D3FFFF
D40000-D4FFFF
D50000-D5FFFF
D60000-D6FFFF
D70000-D7FFFF
D80000-D8FFFF
D90000-D9FFFF
DA0000-DAFFFF
DB0000-DBFFFF
DC0000-DCFFFF
DD0000-DDFFFF
DE0000-DEFFFF
DF0000-DFFFFF
E00000-E0FFFF
E10000-E1FFFF
E20000-E2FFFF
E30000-E3FFFF
E40000-E4FFFF
E50000-E5FFFF
E60000-E6FFFF
E70000-E7FFFF
E80000-E8FFFF
E90000-E9FFFF
EA0000-EAFFFF
EB0000-EBFFFF
EC0000-ECFFFF
ED0000-EDFFFF
EE0000-EEFFFF
EF0000-EFFFFF
F00000-FFFFFF
658000-65FFFF
660000-667FFF
668000-66FFFF
670000-677FFF
678000-67FFFF
680000-687FFF
688000-68FFFF
690000-697FFF
698000-69FFFF
6A0000-6A7FFF
6A8000-6AFFFF
6B0000-6B7FFF
6B8000-6BFFFF
6C0000-6C7FFF
6C8000-6CFFFF
6D0000-6D7FFF
6D8000-6DFFFF
6E0000-6E7FFF
6E8000-6EFFFF
6F0000-6F7FFF
6F8000-6FFFFF
700000-707FFF
708000-70FFFF
710000-717FFF
718000-71FFFF
720000-727FFF
728000-72FFFF
730000-737FFF
738000-73FFFF
740000-747FFF
748000-74FFFF
750000-757FFF
758000-75FFFF
760000-767FFF
768000-76FFFF
770000-777FFF
778000-77FFFF
780000-787FFF
REV. 1.0, SEP. 22, 2008
12
MX29LV128D T/B
Sector
Group
61
61
61
62
62
62
62
63
63
63
63
64
64
64
65
66
67
68
69
70
71
72
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
8
4
8
4
8
4
8
4
8
4
8
4
8
4
8
4
Sector
Sector Address
A22-A12
SA241
SA242
SA243
SA244
SA245
SA246
SA247
SA248
SA249
SA250
SA251
SA252
SA253
SA254
SA255
SA256
SA257
SA258
SA259
SA260
SA261
SA262
11110001xxx
11110010xxx
11110011xxx
11110100xxx
11110101xxx
11110110xxx
11110111xxx
11111000xxx
11111001xxx
11111010xxx
11111011xxx
11111100xxx
11111101xxx
11111110xxx
11111111000
11111111001
11111111010
11111111011
11111111100
11111111101
11111111110
11111111111
Address Range
Byte Mode (x8)
Word Mode (x16)
F10000-F1FFFF
F20000-F2FFFF
F30000-F3FFFF
F40000-F4FFFF
F50000-F5FFFF
F60000-F6FFFF
F70000-F7FFFF
F80000-F8FFFF
F90000-F9FFFF
FA0000-FAFFFF
FB0000-FBFFFF
FC0000-FCFFFF
FD0000-FDFFFF
FE0000-FEFFFF
FF0000-FF1FFF
FF2000-FF3FFF
FF4000-FF5FFF
FF6000-FF7FFF
FF8000-FF9FFF
FFA000-FFBFFF
FFC000-FFDFFF
FFE000-FFFFFF
788000-78FFFF
790000-797FFF
798000-79FFFF
7A0000-7A7FFF
7A8000-7AFFFF
7B0000-7B7FFF
7B8000-7BFFFF
7C0000-7C7FFF
7C8000-7CFFFF
7D0000-7D7FFF
7D8000-7DFFFF
7E0000-7E7FFF
7E8000-7EFFFF
7F0000-7F7FFF
7F8000-7F8FFF
7F9000-7F9FFF
7FA000-7FAFFF
7FB000-7FBFFF
7FC000-7FCFFF
7FD000-7FDFFF
7FE000-7FEFFF
7FF000-7FFFFF
Top Boot Security Sector Addresses
Sector Size
Byte Mode
Word Mode
(bytes)
(words)
256
128
Sector Address
A21~A12
Address Range
Byte Mode (x8)
Word Mode (x16)
1111111111
FFFF00h-FFFFFFh
P/N:PM1327
7FFF80h-7FFFFFh
REV. 1.0, SEP. 22, 2008
13
MX29LV128D T/B
Table 1. b: MX29LV128DB SECTOR GROUP ARCHITECTURE
Sector
Group
1
2
3
4
5
6
7
8
9
9
9
10
10
10
10
11
11
11
11
12
12
12
12
13
13
13
13
14
14
14
14
15
15
15
15
16
16
16
16
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
8
4
8
4
8
4
8
4
8
4
8
4
8
4
8
4
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
SA35
SA36
SA37
SA38
00000000000
00000000001
00000000010
00000000011
00000000100
00000000101
00000000110
00000000111
00000001xxx
00000010xxx
00000011xxx
00000100xxx
00000101xxx
00000110xxx
00000111xxx
00001000xxx
00001001xxx
00001010xxx
00001011xxx
00001100xxx
00001101xxx
00001110xxx
00001111xxx
00010000xxx
00010001xxx
00010010xxx
00010011xxx
00010100xxx
00010101xxx
00010110xxx
00010111xxx
00011000xxx
00011001xxx
00011010xxx
00011011xxx
00011100xxx
00011101xxx
00011110xxx
00011111xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
000000-001FFF
002000-003FFF
004000-005FFF
006000-007FFF
008000-009FFF
00A000-00BFFF
00C000-00DFFF
00E000-00FFFF
010000-01FFFF
020000-02FFFF
030000-03FFFF
040000-04FFFF
050000-05FFFF
060000-06FFFF
070000-07FFFF
080000-08FFFF
090000-09FFFF
0A0000-0AFFFF
0B0000-0BFFFF
0C0000-0CFFFF
0D0000-0DFFFF
0E0000-0EFFFF
0F0000-0FFFFF
100000-10FFFF
110000-11FFFF
120000-12FFFF
130000-13FFFF
140000-14FFFF
150000-15FFFF
160000-16FFFF
170000-17FFFF
180000-18FFFF
190000-19FFFF
1A0000-1AFFFF
1B0000-1BFFFF
1C0000-1CFFFF
1D0000-1DFFFF
1E0000-1EFFFF
1F0000-1FFFFF
000000-000FFF
001000-001FFF
002000-002FFF
003000-003FFF
004000-004FFF
005000-005FFF
006000-006FFF
007000-007FFF
008000-00FFFF
010000-017FFF
018000-01FFFF
020000-027FFF
028000-02FFFF
030000-037FFF
038000-03FFFF
040000-047FFF
048000-04FFFF
050000-057FFF
058000-05FFFF
060000-067FFF
068000-06FFFF
070000-077FFF
078000-07FFFF
080000-087FFF
088000-08FFFF
090000-097FFF
098000-09FFFF
0A0000-0A7FFF
0A8000-0AFFFF
0B0000-0B7FFF
0B8000-0BFFFF
0C0000-0C7FFF
0C8000-0CFFFF
0D0000-0D7FFF
0D8000-0DFFFF
0E0000-0E7FFF
0E8000-0EFFFF
0F0000-0F7FFF
0F8000-0FFFFF
REV. 1.0, SEP. 22, 2008
14
MX29LV128D T/B
Sector
Group
17
17
17
17
18
18
18
18
19
19
19
19
20
20
20
20
21
21
21
21
22
22
22
22
23
23
23
23
24
24
24
24
25
25
25
25
26
26
26
26
27
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
SA71
SA72
SA73
SA74
SA75
SA76
SA77
SA78
SA79
00100000xxx
00100001xxx
00100010xxx
00100011xxx
00100100xxx
00100101xxx
00100110xxx
00100111xxx
00101000xxx
00101001xxx
00101010xxx
00101011xxx
00101100xxx
00101101xxx
00101110xxx
00101111xxx
00110000xxx
00110001xxx
00110010xxx
00110011xxx
00110100xxx
00110101xxx
00110110xxx
00110111xxx
00111000xxx
00111001xxx
00111010xxx
00111011xxx
00111100xxx
00111101xxx
00111110xxx
00111111xxx
01000000xxx
01000001xxx
01000010xxx
01000011xxx
01000100xxx
01000101xxx
01000110xxx
01000111xxx
01001000xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
200000-20FFFF
210000-21FFFF
220000-22FFFF
230000-23FFFF
240000-24FFFF
250000-25FFFF
260000-26FFFF
270000-27FFFF
280000-28FFFF
290000-29FFFF
2A0000-2AFFFF
2B0000-2BFFFF
2C0000-2CFFFF
2D0000-2DFFFF
2E0000-2EFFFF
2F0000-2FFFFF
300000-30FFFF
310000-31FFFF
320000-32FFFF
330000-33FFFF
340000-34FFFF
350000-35FFFF
360000-36FFFF
370000-37FFFF
380000-38FFFF
390000-39FFFF
3A0000-3AFFFF
3B0000-3BFFFF
3C0000-3CFFFF
3D0000-3DFFFF
3E0000-3EFFFF
3F0000-3FFFFF
400000-40FFFF
410000-41FFFF
420000-42FFFF
430000-43FFFF
440000-44FFFF
450000-45FFFF
460000-46FFFF
470000-47FFFF
480000-48FFFF
100000-107FFF
108000-10FFFF
110000-117FFF
118000-11FFFF
120000-127FFF
128000-12FFFF
130000-137FFF
138000-13FFFF
140000-147FFF
148000-14FFFF
150000-157FFF
158000-15FFFF
160000-167FFF
168000-16FFFF
170000-177FFF
178000-17FFFF
180000-187FFF
188000-18FFFF
190000-197FFF
198000-19FFFF
1A0000-1A7FFF
1A8000-1AFFFF
1B0000-1B7FFF
1B8000-1BFFFF
1C0000-1C7FFF
1C8000-1CFFFF
1D0000-1D7FFF
1D8000-1DFFFF
1E0000-1E7FFF
1E8000-1EFFFF
1F0000-1F7FFF
1F8000-1FFFFF
200000-207FFF
208000-20FFFF
210000-217FFF
218000-21FFFF
220000-227FFF
228000-22FFFF
230000-237FFF
238000-23FFFF
240000-247FFF
REV. 1.0, SEP. 22, 2008
15
MX29LV128D T/B
Sector
Group
27
27
27
28
28
28
28
29
29
29
29
30
30
30
30
31
31
31
31
32
32
32
32
33
33
33
33
34
34
34
34
35
35
35
35
36
36
36
36
37
37
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA80
SA81
SA82
SA83
SA84
SA85
SA86
SA87
SA88
SA89
SA90
SA91
SA92
SA93
SA94
SA95
SA96
SA97
SA98
SA99
SA100
SA101
SA102
SA103
SA104
SA105
SA106
SA107
SA108
SA109
SA110
SA111
SA112
SA113
SA114
SA115
SA116
SA117
SA118
SA119
SA120
01001001xxx
01001010xxx
01001011xxx
01001100xxx
01001101xxx
01001110xxx
01001111xxx
01010000xxx
01010001xxx
01010010xxx
01010011xxx
01010100xxx
01010101xxx
01010110xxx
01010111xxx
01011000xxx
01011001xxx
01011010xxx
01011011xxx
01011100xxx
01011101xxx
01011110xxx
01011111xxx
01100000xxx
01100001xxx
01100010xxx
01100011xxx
01100100xxx
01100101xxx
01100110xxx
01100111xxx
01101000xxx
01101001xxx
01101010xxx
01101011xxx
01101100xxx
01101101xxx
01101110xxx
01101111xxx
01110000xxx
01110001xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
490000-49FFFF
4A0000-4AFFFF
4B0000-4BFFFF
4C0000-4CFFFF
4D0000-4DFFFF
4E0000-4EFFFF
4F0000-4FFFFF
500000-50FFFF
510000-51FFFF
520000-52FFFF
530000-53FFFF
540000-54FFFF
550000-55FFFF
560000-56FFFF
570000-57FFFF
580000-58FFFF
590000-59FFFF
5A0000-5AFFFF
5B0000-5BFFFF
5C0000-5CFFFF
5D0000-5DFFFF
5E0000-5EFFFF
5F0000-5FFFFF
600000-60FFFF
610000-61FFFF
620000-62FFFF
630000-63FFFF
640000-64FFFF
650000-65FFFF
660000-66FFFF
670000-67FFFF
680000-68FFFF
690000-69FFFF
6A0000-6AFFFF
6B0000-6BFFFF
6C0000-6CFFFF
6D0000-6DFFFF
6E0000-6EFFFF
6F0000-6FFFFF
700000-70FFFF
710000-71FFFF
248000-24FFFF
250000-257FFF
258000-25FFFF
260000-267FFF
268000-26FFFF
270000-277FFF
278000-27FFFF
280000-287FFF
288000-28FFFF
290000-297FFF
298000-29FFFF
2A0000-2A7FFF
2A8000-2AFFFF
2B0000-2B7FFF
2B8000-2BFFFF
2C0000-2C7FFF
2C8000-2CFFFF
2D0000-2D7FFF
2D8000-2DFFFF
2E0000-2E7FFF
2E8000-2EFFFF
2F0000-2F7FFF
2F8000-2FFFFF
300000-307FFF
308000-30FFFF
310000-317FFF
318000-31FFFF
320000-327FFF
328000-32FFFF
330000-337FFF
338000-33FFFF
340000-347FFF
348000-34FFFF
350000-357FFF
358000-35FFFF
360000-367FFF
368000-36FFFF
370000-377FFF
378000-37FFFF
380000-387FFF
388000-38FFFF
REV. 1.0, SEP. 22, 2008
16
MX29LV128D T/B
Sector
Group
37
37
38
38
38
38
39
39
39
39
40
40
40
40
41
41
41
41
42
42
42
42
43
43
43
43
44
44
44
44
45
45
45
45
46
46
46
46
47
47
47
47
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA121
SA122
SA123
SA124
SA125
SA126
SA127
SA128
SA129
SA130
SA131
SA132
SA133
SA134
SA135
SA136
SA137
SA138
SA139
SA140
SA141
SA142
SA143
SA144
SA145
SA146
SA147
SA148
SA149
SA150
SA151
SA152
SA153
SA154
SA155
SA156
SA157
SA158
SA159
SA160
SA161
SA162
01110010xxx
01110011xxx
01110100xxx
01110101xxx
01110110xxx
01110111xxx
01111000xxx
01111001xxx
01111010xxx
01111011xxx
01111100xxx
01111101xxx
01111110xxx
01111111xxx
10000000xxx
10000001xxx
10000010xxx
10000011xxx
10000100xxx
10000101xxx
10000110xxx
10000111xxx
10001000xxx
10001001xxx
10001010xxx
10001011xxx
10001100xxx
10001101xxx
10001110xxx
10001111xxx
10010000xxx
10010001xxx
10010010xxx
10010011xxx
10010100xxx
10010101xxx
10010110xxx
10010111xxx
10011000xxx
10011001xxx
10011010xxx
10011011xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
720000-72FFFF
730000-73FFFF
740000-74FFFF
750000-75FFFF
760000-76FFFF
770000-77FFFF
780000-78FFFF
790000-79FFFF
7A0000-7AFFFF
7B0000-7BFFFF
7C0000-7CFFFF
7D0000-7DFFFF
7E0000-7EFFFF
7F0000-7FFFFF
800000-80FFFF
810000-81FFFF
820000-82FFFF
830000-83FFFF
840000-84FFFF
850000-85FFFF
860000-86FFFF
870000-87FFFF
880000-88FFFF
890000-89FFFF
8A0000-8AFFFF
8B0000-8BFFFF
8C0000-8CFFFF
8D0000-8DFFFF
8E0000-8EFFFF
8F0000-8FFFFF
900000-90FFFF
910000-91FFFF
920000-92FFFF
930000-93FFFF
940000-94FFFF
950000-95FFFF
960000-96FFFF
970000-97FFFF
980000-98FFFF
990000-99FFFF
9A0000-9AFFFF
9B0000-9BFFFF
390000-397FFF
398000-39FFFF
3A0000-3A7FFF
3A8000-3AFFFF
3B0000-3B7FFF
3B8000-3BFFFF
3C0000-3C7FFF
3C8000-3CFFFF
3D0000-3D7FFF
3D8000-3DFFFF
3E0000-3E7FFF
3E8000-3EFFFF
3F0000-3F7FFF
3F8000-3FFFFF
400000-407FFF
408000-40FFFF
410000-417FFF
418000-41FFFF
420000-427FFF
428000-42FFFF
430000-437FFF
438000-43FFFF
440000-447FFF
448000-44FFFF
450000-457FFF
458000-45FFFF
460000-467FFF
468000-46FFFF
470000-477FFF
478000-47FFFF
480000-487FFF
488000-48FFFF
490000-497FFF
498000-49FFFF
4A0000-4A7FFF
4A8000-4AFFFF
4B0000-4B7FFF
4B8000-4BFFFF
4C0000-4C7FFF
4C8000-4CFFFF
4D0000-4D7FFF
4D8000-4DFFFF
REV. 1.0, SEP. 22, 2008
17
MX29LV128D T/B
Sector
Group
48
48
48
48
49
49
49
49
50
50
50
50
51
51
51
51
52
52
52
52
53
53
53
53
54
54
54
54
55
55
55
55
56
56
56
56
57
57
57
57
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA163
SA164
SA165
SA166
SA167
SA168
SA169
SA170
SA171
SA172
SA173
SA174
SA175
SA176
SA177
SA178
SA179
SA180
SA181
SA182
SA183
SA184
SA185
SA186
SA187
SA188
SA189
SA190
SA191
SA192
SA193
SA194
SA195
SA196
SA197
SA198
SA199
SA200
SA201
SA202
10011100xxx
10011101xxx
10011110xxx
10011111xxx
10100000xxx
10100001xxx
10100010xxx
10100011xxx
10100100xxx
10100101xxx
10100110xxx
10100111xxx
10101000xxx
10101001xxx
10101010xxx
10101011xxx
10101100xxx
10101101xxx
10101110xxx
10101111xxx
10110000xxx
10110001xxx
10110010xxx
10110011xxx
10110100xxx
10110101xxx
10110110xxx
10110111xxx
10111000xxx
10111001xxx
10111010xxx
10111011xxx
10111100xxx
10111101xxx
10111110xxx
10111111xxx
11000000xxx
11000001xxx
11000010xxx
11000011xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
9C0000-9CFFFF
9D0000-9DFFFF
9E0000-9EFFFF
9F0000-9FFFFF
A00000-A0FFFF
A10000-A1FFFF
A20000-A2FFFF
A30000-A3FFFF
A40000-A4FFFF
A50000-A5FFFF
A60000-A6FFFF
A70000-A7FFFF
A80000-A8FFFF
A90000-A9FFFF
AA0000-AAFFFF
AB0000-ABFFFF
AC0000-ACFFFF
AD0000-ADFFFF
AE0000-AEFFFF
AF0000-AFFFFF
B00000-B0FFFF
B10000-B1FFFF
B20000-B2FFFF
B30000-B3FFFF
B40000-B4FFFF
B50000-B5FFFF
B60000-B6FFFF
B70000-B7FFFF
B80000-B8FFFF
B90000-B9FFFF
BA0000-BAFFFF
BB0000-BBFFFF
BC0000-BCFFFF
BD0000-BDFFFF
BE0000-BEFFFF
BF0000-BFFFFF
C00000-C0FFFF
C10000-C1FFFF
C20000-C2FFFF
C30000-C3FFFF
4E0000-4E7FFF
4E8000-4EFFFF
4F0000-4F7FFF
4F8000-4FFFFF
500000-507FFF
508000-50FFFF
510000-517FFF
518000-51FFFF
520000-527FFF
528000-52FFFF
530000-537FFF
538000-53FFFF
540000-547FFF
548000-54FFFF
550000-557FFF
558000-55FFFF
560000-567FFF
568000-56FFFF
570000-577FFF
578000-57FFFF
580000-587FFF
588000-58FFFF
590000-597FFF
598000-59FFFF
5A0000-5A7FFF
5A8000-5AFFFF
5B0000-5B7FFF
5B8000-5BFFFF
5C0000-5C7FFF
5C8000-5CFFFF
5D0000-5D7FFF
5D8000-5DFFFF
5E0000-5E7FFF
5E8000-5EFFFF
5F0000-5F7FFF
5F8000-5FFFFF
600000-607FFF
608000-60FFFF
610000-617FFF
618000-61FFFF
REV. 1.0, SEP. 22, 2008
18
MX29LV128D T/B
Sector
Group
58
58
58
58
59
59
59
59
60
60
60
60
61
61
61
61
62
62
62
62
63
63
63
63
64
64
64
64
65
65
65
65
66
66
66
66
67
67
67
67
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA203
SA204
SA205
SA206
SA207
SA208
SA209
SA210
SA211
SA212
SA213
SA214
SA215
SA216
SA217
SA218
SA219
SA220
SA221
SA222
SA223
SA224
SA225
SA226
SA227
SA228
SA229
SA230
SA231
SA232
SA233
SA234
SA235
SA236
SA237
SA238
SA239
SA240
SA241
SA242
11000100xxx
11000101xxx
11000110xxx
11000111xxx
11001000xxx
11001001xxx
11001010xxx
11001011xxx
11001100xxx
11001101xxx
11001110xxx
11001111xxx
11010000xxx
11010001xxx
11010010xxx
11010011xxx
11010100xxx
11010101xxx
11010110xxx
11010111xxx
11011000xxx
11011001xxx
11011010xxx
11011011xxx
11011100xxx
11011101xxx
11011110xxx
11011111xxx
11100000xxx
11100001xxx
11100010xxx
11100011xxx
11100100xxx
11100101xxx
11100110xxx
11100111xxx
11101000xxx
11101001xxx
11101010xxx
11101011xxx
P/N:PM1327
Address Range
Byte Mode (x8)
Word Mode (x16)
C40000-C4FFFF
C50000-C5FFFF
C60000-C6FFFF
C70000-C7FFFF
C80000-C8FFFF
C90000-C9FFFF
CA0000-CAFFFF
CB0000-CBFFFF
CC0000-CCFFFF
CD0000-CDFFFF
CE0000-CEFFFF
CF0000-CFFFFF
D00000-D0FFFF
D10000-D1FFFF
D20000-D2FFFF
D30000-D3FFFF
D40000-D4FFFF
D50000-D5FFFF
D60000-D6FFFF
D70000-D7FFFF
D80000-D8FFFF
D90000-D9FFFF
DA0000-DAFFFF
DB0000-DBFFFF
DC0000-DCFFFF
DD0000-DDFFFF
DE0000-DEFFFF
DF0000-DFFFFF
E00000-E0FFFF
E10000-E1FFFF
E20000-E2FFFF
E30000-E3FFFF
E40000-E4FFFF
E50000-E5FFFF
E60000-E6FFFF
E70000-E7FFFF
E80000-E8FFFF
E90000-E9FFFF
EA0000-EAFFFF
EB0000-EBFFFF
620000-627FFF
628000-62FFFF
630000-637FFF
638000-63FFFF
640000-647FFF
648000-64FFFF
650000-657FFF
658000-65FFFF
660000-667FFF
668000-66FFFF
670000-677FFF
678000-67FFFF
680000-687FFF
688000-68FFFF
690000-697FFF
698000-69FFFF
6A0000-6A7FFF
6A8000-6AFFFF
6B0000-6B7FFF
6B8000-6BFFFF
6C0000-6C7FFF
6C8000-6CFFFF
6D0000-6D7FFF
6D8000-6DFFFF
6E0000-6E7FFF
6E8000-6EFFFF
6F0000-6F7FFF
6F8000-6FFFFF
700000-707FFF
708000-70FFFF
710000-717FFF
718000-71FFFF
720000-727FFF
728000-72FFFF
730000-737FFF
738000-73FFFF
740000-747FFF
748000-74FFFF
750000-757FFF
758000-75FFFF
REV. 1.0, SEP. 22, 2008
19
MX29LV128D T/B
Sector
Group
68
68
68
68
69
69
69
69
70
70
70
70
71
71
71
71
72
72
72
72
Sector Size
Byte Mode Word Mode
(Kbytes)
(Kwords)
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
64
32
Sector
Sector Address
A22-A12
SA243
SA244
SA245
SA246
SA247
SA248
SA249
SA250
SA251
SA252
SA253
SA254
SA255
SA256
SA257
SA258
SA259
SA260
SA261
SA262
11101100xxx
11101101xxx
11101110xxx
11101111xxx
11110000xxx
11110001xxx
11110010xxx
11110011xxx
11110100xxx
11110101xxx
11110110xxx
11110111xxx
11111000xxx
11111001xxx
11111010xxx
11111011xxx
11111100xxx
11111101xxx
11111110xxx
11111111xxx
Address Range
Byte Mode (x8)
Word Mode (x16)
EC0000-ECFFFF
ED0000-EDFFFF
EE0000-EEFFFF
EF0000-EFFFFF
F00000-F0FFFF
F10000-F1FFFF
F20000-F2FFFF
F30000-F3FFFF
F40000-F4FFFF
F50000-F5FFFF
F60000-F6FFFF
F70000-F7FFFF
F80000-F8FFFF
F90000-F9FFFF
FA0000-FAFFFF
FB0000-FBFFFF
FC0000-FCFFFF
FD0000-FDFFFF
FE0000-FEFFFF
FF0000-FFFFFF
760000-767FFF
768000-76FFFF
770000-777FFF
778000-77FFFF
780000-787FFF
788000-78FFFF
790000-797FFF
798000-79FFFF
7A0000-7A7FFF
7A8000-7AFFFF
7B0000-7B7FFF
7B8000-7BFFFF
7C0000-7C7FFF
7C8000-7CFFFF
7D0000-7D7FFF
7D8000-7DFFFF
7E0000-7E7FFF
7E8000-7EFFFF
7F0000-7F7FFF
7F8000-7FFFFF
Bottom Boot Security Sector Addresses
Sector Size
Word Mode
(words)
128
Byte Mode
(bytes)
256
Sector Address
A21~A12
Byte Mode (x8)
Address Range
Word Mode (x16)
0000000000
000000h-0000FFh
P/N:PM1327
000000h-00007Fh
REV. 1.0, SEP. 22, 2008
20
MX29LV128D T/B
FUNCTIONAL OPERATION DESCRIPTION
READ OPERATION
To perform a read operation, the system addresses the desired memory array or status register location by providing its
address on the address pins and simultaneously enabling the chip by driving CE# & OE# LOW, and WE# HIGH. After
the Tce and Toe timing requirements have been met, the system can read the contents of the addressed location by
reading the Data (I/O) pins. If either the CE# or OE# is held HIGH, the outputs will remain tri-stated and no data will
appear on the output pins.
WRITE OPERATION
To perform a write operation, the system provides the desired address on the address pins, enables the chip by
asserting CE# LOW, and disables the Data (I/O) pins by holding OE# HIGH. The system then places data to be
written on the Data (I/O) pins and pulses WE# LOW. The device captures the address information on the falling edge
of WE# and the data on the rising edge of WE#. To see an example, please refer to the timing diagram in Figure 1 on
Page 42. The system is not allowed to write invalid commands (commands not defined in this datasheet) to the
device. Writing an invalid command may put the device in an undefined state.
DEVICE RESET
Driving the RESET# pin LOW for a period of Trp or more will return the device to Read mode. If the device is in the
middle of a program or erase operation, the reset operation will take at most a period of Tready1 before the device
returns to Read mode. Until the device does returns to Read mode, the RY/BY# pin will remain Low (Busy Status).
When the RESET# pin is held at GND±0.3V, the device only consumes standby (Isbr) current. However, the device
draws larger current if the RESET# pin is held at a voltage greater than GND+0.3V and less than or equal to Vil.
It is recommended to tie the system reset signal to the RESET# pin of the flash memory. This allows the device to be
reset with the system and puts it in a state where the system can immediately begin reading boot code from it.
STANDBY MODE
The device enters Standby mode whenever the RESET# and CE# pins are both held High. While in this mode, WE#
and OE# will be ignored, all Data Output pins will be in a high impedance state, and the device will draw minimal (Isb)
current.
OUTPUT DISABLE
While in active mode (RESET# HIGH and CE# LOW), the OE# pin controls the state of the output pins. If OE# is held
HIGH, all Data (I/O) pins will remain tri-stated. If held LOW, the Byte or Word Data (I/O) pins will drive data.
BYTE/WORD SELECTION
The BYTE# input pin is used to select the organization of the array data and how the data is input/output on the Data
(I/O) pins. If the BYTE# pin is held HIGH, Word mode will be selected and all 16 data lines (Q0 to Q15) will be active.
P/N:PM1327
REV. 1.0, SEP. 22, 2008
21
MX29LV128D T/B
FUNCTIONAL OPERATION DESCRIPTION (cont'd)
If BYTE# is forced LOW, Byte mode will be active and only data lines Q0 to Q7 will be active. Data lines Q8 to Q14
will remain in a high impedance state and Q15 becomes the A-1 address input pin.
HARDWARE WRITE PROTECT
By driving the WP#/ACC pin LOW, the outermost two boot sectors are protected from all erase/program operations. If
WP#/ACC is held HIGH (Vih to VCC), these two outermost sectors revert to their previously protected/unprotected
status.
ACCELERATED PROGRAMMING OPERATION
By applying high voltage (Vhv) to the WP#/ACC pin, the device will enter the Accelerated Programming mode. This
mode permits the system to skip the normal command unlock sequences and program byte/word locations directly.
Typically, this mode provides a 30% reduction in overall programming times. During accelerated programming, the
current drawn from the WP#/ACC pin is no more than ICP1.
TEMPORARY SECTOR GROUP UNPROTECT OPERATION
The system can apply Vhv to the RESET# pin to place the device in Temporary Unprotect mode. In this mode,
previously protected sectors can be programmed/erased just as though they were unprotected. The device returns to
normal operation once Vhv is removed from the RESET# pin and previously protected sectors will once again be
protected.
SECTOR GROUP PROTECT OPERATION
The MX29LV128D T/B provides user programmable protection against program/erase operations for selected sectors.
Most sectors cannot protected individually. Instead, they are bound in groups of four or less called Sector-Groups.
Protection is available for individual Sector-Groups, which includes all member sectors. Boot sectors are the exception to this rule as they are assigned unique Sector-Group addresses and can be protected individually without protecting any adjacent sectors or Sector-Groups. The three sectors adjacent to the boot sectors form a non-standard SectorGroup. Please refer to Table 1a and Table 1b which show all Sector-Group assignments.
During the protection operation, the sector address of any sector within a Sector-Group may be used to specify the
Sector-Group being protected.
There are two methods available to protect Sector-Groups. The first and preferred method is activated by applying Vhv
on the RESET# pin and following the timing in Figure 13 and the algorithm shown in Figure 14-1. This is a command
operation that can be performed either on an external programmer or in-circuit by the system controller. The second
method is strictly a bus operation and is entered by asserting Vhv on A9 and OE# pins, with A6 and CE# at Vil. The
protection operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for more
details on this method.
P/N:PM1327
REV. 1.0, SEP. 22, 2008
22
MX29LV128D T/B
FUNCTIONAL OPERATION DESCRIPTION (cont'd)
CHIP UNPROTECT OPERATION
The Chip Unprotect operation unprotects all sectors within the device. It is standard procedure and highly recommended to protect all Sector-Groups prior using the Chip Unprotect operation. This will prevent possible damage to the
Sector-Group protection logic. All Sector Groups are unprotected when shipped from the factory, so this operation is
only necessary if the user has previously protected any Sector-Groups and wishes to unprotect them now.
MX29LV128D T/B provides two methods for unprotecting the entire chip. The first and preferred method is entered by
applying Vhv on RESET# pin and following the timing diagram in Figure 13 and using the algorithm shown in Figure 142.
The second method is entered by asserting Vhv on A9 and OE# pins, with A6 at Vih and CE# at Vil. The protection
operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for more details on this
method.
AUTOMATIC SELECT BUS OPERATIONS
The following five bus operations require A9 to be raised to Vhv. Please see AUTOMATIC SELECT COMMAND
SEQUENCE in the COMMAND OPERATIONS section for details of equivalent command operations that do not
require the use of Vhv.
SECTOR LOCK STATUS VERIFICATION
To determine the protected state of any sector using bus operations, the system performs a READ OPERATION with
A9 raised to Vhv, the sector address applied to address pins A22 to A12, address pins A6 & A0 held LOW, and
address pin A1 held HIGH. If data bit Q0 is LOW, the sector is not protected, and if Q0 is HIGH, the sector is
protected.
READ SILICON ID MANUFACTURER CODE
To determine the Silicon ID Manufacturer Code, the system performs a READ OPERATION with A9 raised to Vhv and
address pins A6, A1, & A0 held LOW. The Macronix ID code of C2h should be present on data bits Q0 to Q7.
READ SILICON ID MX29LV128DT CODE
To verify the Silicon ID MX29LV128DT Code, the system performs a READ OPERATION with A9 raised to Vhv,
address pins A6 & A1 held LOW, and address pin A0 held HIGH. The MX29LV128DT code of 7Eh should be present
on data bits Q0 to Q7. Q15 to Q8 will be tri-stated unless Word mode is selected. In this case, Q15 to Q8 will output
the value 22h.
READ SILICON ID MX29LV128DB CODE
To verify the Silicon ID MX29LV128DB Code, the system performs a READ OPERATION with A9 raised to Vhv,
address pins A6 & A1 held LOW, and address pin A0 held HIGH. The MX29LV128DT code of 7Ah should be present
on data bits Q0 to Q7. Q15 to Q8 will be tri-stated unless Word mode is selected. In this case, Q15 to Q8 will output
the code 22h.
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23
MX29LV128D T/B
FUNCTIONAL OPERATION DESCRIPTION (cont'd)
READ INDICATOR BIT (Q7) FOR SECURITY SECTOR
To determine if the Security Sector has been locked at the factory, the system performs a READ OPERATION with A9
raised to Vhv, address pin A6 held LOW, and address pins A1 & A0 held HIGH. If the Security Sector has been
locked at the factory, the code 98h(T)/88h(B) will be present on data bits Q0 to Q7. Otherwise, the factory unlocked
code of 18h(T)/08h(B) will be present.
INHERENT DATA PROTECTION
To avoid accidental erasure or programming of the device, the device is automatically reset to Read mode during
power up. Additionally, the following design features protect the device from unintended data corruption.
COMMAND COMPLETION
Only after the successful completion of the specified command sets will the device begin its erase or program
operation. If any command sequence is interrupted or given an invalid command, the device immediately returns to
Read mode.
LOW VCC WRITE INHIBIT
The device refuses to accept any write command when Vcc is less than VLKO. This prevents data from spuriously
being altered during power-up, power-down, or temporary power interruptions. The device automatically resets itself
when Vcc is lower than VLKO and write cycles are ignored until Vcc is greater than VLKO. The system must provide
proper signals on control pins after Vcc rises above VLKO to avoid unintentional program or erase operations.
WRITE PULSE "GLITCH" PROTECTION
CE#, WE#, OE# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write cycle.
LOGICAL INHIBIT
A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at Vih,
WE# a Vih, or OE# at Vil.
POWER-UP SEQUENCE
Upon power up, the MX29LV128D T/B is placed in Read mode. Furthermore, program or erase operation will begin only
after successful completion of specified command sequences.
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24
MX29LV128D T/B
FUNCTIONAL OPERATION DESCRIPTION (cont'd)
POWER-UP WRITE INHIBIT
When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the
rising edge of WE#.
POWER SUPPLY DECOUPLING
A 0.1uF capacitor should be connected between the Vcc and GND to reduce the noise effect.
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25
MX29LV128D T/B
TABLE 3. MX29LV128D T/B COMMAND DEFINITIONS
Automatic Select
Command
1st Bus
Cycle
Read
Reset
Mode
Mode
Addr
Addr
XXX
Data
Data
F0
Silicon ID
Security
Factory Protect
Sector Protect
Sector
Verify
Verify
Region
Device ID
Word
Byte
Word
Byte
Word
Byte
Word
Byte
555
AAA
555
AAA
555
AAA
555
AAA
Word Byte
555
AAA
Exit Security
Sector
Word
Byte
555
AAA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
2AA
555
2AA
555
2AA
555
2AA
555
2AA
555
2AA
555
2nd Bus
Cycle
Addr
Data
55
55
55
55
55
55
55
55
55
55
55
55
3rd Bus
Cycle
Addr
555
AAA
555
AAA
555
AAA
555
AAA
555
AAA
555
AAA
Data
90
90
90
90
90
90
90
90
88
88
90
90
(Sector)
(Sector)
XXX
00
XXX
00
4th Bus
Cycle
Addr
X00
X00
X01
Data
C2h
C2h
ID
5th Bus
Cycle
Addr
Data
6th Bus
Cycle
Data
X02
ID
X03
98/18(T)
X06
X02
X04
00/01
00/01
88/08(B)
Addr
Erase
Command
Program
Chip Erase
Word Byte Word Byte
Sector Erase
CFI Read
Erase
Suspend Resume
Word
Byte
Addr
555 AAA
555
AAA
555
AAA
55
AA
Sector
Sector
Data
AA
AA
AA
AA
AA
AA
98
98
B0
30
2nd Bus
Cycle
Addr
2AA
555
2AA
555
2AA
555
Data
55
55
55
55
55
55
3rd Bus
Cycle
Addr
555 AAA
555
AAA
555
AAA
4th Bus
Cycle
Addr
Addr Addr 555
Data
Data Data
5th Bus
Cycle
6th Bus
Cycle
Addr
555
Data
10
1st Bus
Cycle
Data
A0
A0
80
80
80
80
AAA
555
AAA
AA
AA
AA
AA
Addr
2AA
555
2AA
555
Data
55
55
55
55
AAA Sector
10
30
Word Byte
Sector
30
WA= Write Address
WD= Write Data
SA= Sector Address
WC= Word Count
Note: ID 227Eh(Top), 227Ah(Bottom) for Word Mode
ID 7Eh(Top), 7Ah(Bottom) for Byte Mode
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26
MX29LV128D T/B
COMMAND OPERATIONS
READING THE MEMORY ARRAY
Read mode is the default state after power up or after a reset operation. To perform a read operation, please refer to
READ OPERATION in the BUS OPERATIONS section above.
If the device receives an Erase Suspend command while in the Sector Erase state, the erase operation will pause
(after a time delay not exceeding Tready1) and the device will enter Erase-Suspended Read mode. While in the EraseSuspended Read mode, data can be programmed or read from any sector not being erased. Reading from addresses
within sector(s) being erased will only return the contents of the status register, which is in fact how the current status
of the device can be determined.
If a program command is issued to any inactive (not currently being erased) sector during Erase-Suspended Read
mode, the device will perform the program operation and automatically return to Erase-Suspended Read mode after the
program operation completes successfully.
While in Erase-Suspended Read mode, an Erase Resume command must be issued by the system to reactivate the
erase operation. The erase operation will resume from where is was suspended and will continue until it completes
successfully or another Erase Suspend command is received.
After the memory device completes an embedded operation (automatic Chip Erase, Sector Erase, or Program) successfully, it will automatically return to Read mode and data can be read from any address in the array. If the embedded operation fails to complete, as indicated by status register bit Q5 (exceeds time limit flag) going HIGH during the
operations, the system must perform a reset operation to return the device to Read mode.
There are several states that require a reset operation to return to Read mode:
1. A program or erase failure--indicated by status register bit Q5 going HIGH during the operation. Failures during either
of these states will prevent the device from automatically returning to Read mode.
2. The device is in Auto Select mode or CFI mode. These two states remain active until they are terminated by a reset
operation.
In the two situations above, if a reset operation (either hardware reset or software reset command) is not performed, the
device will not return to Read mode and the system will not be able to read array data.
AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY
The MX29LV128D T/B provides the user the ability to program the memory array in Byte mode or Word mode. As long
as the users enters the correct cycle defined in the Table 3 (including 2 unlock cycles and the A0H program command),
any byte or word data provided on the data lines by the system will automatically be programmed into the array at the
specified location.
After the program command sequence has been executed, the internal write state machine (WSM) automatically
executes the algorithms and timings necessary for programming and verification, which includes generating suitable
program pulses, checking cell threshold voltage margins, and repeating the program pulse if any cells do not pass
verification or have low margins. The internal controller protects cells that do pass verification and margin tests from
being over-programmed by inhibiting further program pulses to these passing cells as weaker cells continue to be
programmed.
With the internal WSM automatically controlling the programming process, the user only needs to enter the program
command and data once.
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MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY (cont'd)
Programming will only change the bit status from "1" to "0". It is not possible to change the bit status from "0" to "1"
by programming. This can only be done by an erase operation. Furthermore, the internal write verification only checks
and detects errors in cases where a "1" is not successfully programmed to "0".
Any commands written to the device during programming will be ignored except hardware reset, which will terminate
the program operation after a period of time no more than Tready1. When the embedded program algorithm is complete
or the program operation is terminated by a hardware reset, the device will return to Read mode.
After the embedded program operation has begun, the user can check for completion by reading the following bits in
the status register:
Status
Q7*1
Q6*1
Q5
RY/BY#*2
In progress
Q7#
Toggling
0
0
Finished
Q7
Stop toggling
0
1
Exceed time limit
Q7#
Toggling
1
0
*1: When an attempt is made to program a protected sector, the program operation will abort thus preventing any data
changes in the protected sector. Q7 will output complement data and Q6 will toggle briefly (1us or less) before aborting
and returning the device to Read mode.
*2: RY/BY# is an open drain output pin and should be connected to VCC through a high value pull-up resistor.
ERASING THE MEMORY ARRAY
There are two types of erase operations performed on the memory array -- Sector Erase and Chip Erase. In the Sector
Erase operation, one or more selected sectors may be erased simultaneously. In the Chip Erase operation, the
complete memory array is erased except for any protected sectors. More details of the protected sectors are explained
in section 5.
SECTOR ERASE
The sector erase operation is used to clear data within a sector by returning all of its memory locations to the "1" state.
It requires six command cycles to initiate the erase operation. The first two cycles are "unlock cycles", the third is a
configuration cycle, the fourth and fifth are also "unlock cycles", and the sixth cycle is the Sector Erase command.
After the sector erase command sequence has been issued, an internal 50us time-out counter is started. Until this
counter reaches zero, additional sector addresses and Sector Erase commands may be issued thus allowing multiple
sectors to be selected and erased simultaneously. After the 50us time-out counter has expired, no new commands
will be accepted and the embedded sector erase operation will begin. Note that the 50us timer-out counter is restarted
after every erase command sequence. If the user enters any command other than Sector Erase or Erase Suspend
during the time-out period, the erase operation will abort and the device will return to Read mode.
After the embedded sector erase operation begins, all commands except Erase Suspend will be ignored. The only way
to interrupt the operation is with an Erase Suspend command or with a hardware reset. The hardware reset will
completely abort the operation and return the device to Read mode.
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28
MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
SECTOR ERASE (cont'd)
The system can determine the status of the embedded sector erase operation by the following methods:
Q7
Q6
Q5
Q3*1
Q2
RY/BY#*2
Time-out period
0
Toggling
0
0
Toggling
0
In progress
0
Toggling
0
1
Toggling
0
Finished
1
Stop toggling
0
1
1
1
Exceeded time limit
0
Toggling
1
1
Toggling
0
Status
Note:
1. The Q3 status bit is the 50us time-out indicator. When Q3=0, the 50us time-out counter has not yet reached zero
and a new Sector Erase command may be issued to specify the address of another sector to be erased. When
Q3=1, the 50us time-out counter has expired and the Sector Erase operation has already begun. Erase Suspend is
the only valid command that may be issued once the embedded erase operation is underway.
2. RY/BY# is open drain output pin and should be connected to VCC through a high value pull-up resistor.
3. When an attempt is made to erase only protected sector(s), the program operation will abort thus preventing any
data changes in the protected sector(s). Q7 will output its complement data and Q6 will toggle briefly (100us or less)
before aborting and returning the device to Read mode. If unprotected sectors are also specified, however, they will
be erased normally and the protected sector(s) will remain unchanged.
4. Q2 is a localized indicator showing a specified sector is undergoing erase operation or not. Q2 toggles when user
reads at addresses where the sectors are actively being erased (in erase mode) or to be erased (in erase suspend
mode). When a sector has been completely erased, Q2 stops toggling at the sector even when the device is still in
erase operation for remaining selected sectors. At that circumstance, Q2 will still toggle when device is read at any
other sector that remains to be erased.
CHIP ERASE
The Chip Erase operation is used erase all the data within the memory array. All memory cells containing a "0" will be
returned to the erased state of "1". This operation requires 6 write cycles to initiate the action. The first two cycles are
"unlock" cycles, the third is a configuration cycle, the fourth and fifth are also "unlock" cycles, and the sixth cycle
initiates the chip erase operation.
During the chip erase operation, no other software commands will be accepted, but if a hardware reset is received or
the working voltage is too low, that chip erase will be terminated. After Chip Erase, the chip will automatically return to
Read mode.
The system can determine the status of the embedded chip erase operation by the following methods:
Q7
Q6
Q5
Q2
RY/BY#*1
In progress
0
Toggling
0
Toggling
0
Finished
1
Stop toggling
0
1
1
Exceed time limit
0
Toggling
1
Toggling
0
Status
*1: RY/BY# is open drain output pin and should be connected to VCC through a high value pull-up resistor.
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29
MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
ERASE SUSPEND/RESUME
After beginning a sector erase operation, Erase Suspend is the only valid command that may be issued. If system
issues an Erase Suspend command during the 50us time-out period following a Sector Erase command, the time-out
period will terminate immediately and the device will enter Erase-Suspended Read mode. If the system issues an
Erase Suspend command after the sector erase operation has already begun, the device will not enter Erase-Suspended Read mode until Tready1 time has elapsed. The system can determine if the device has entered the EraseSuspended Read mode through Q6, Q7, and RY/BY#.
After the device has entered Erase-Suspended Read mode, the system can read or program any sector(s) except
those being erased by the suspended erase operation. Reading any sector being erased or programmed will return the
contents of the status register. Whenever a suspend command is issued, user must issue a resume command and
check Q6 toggle bit status, before issue another erase command. The system can use the status register bits shown
in the following table to determine the current state of the device:
Status
Q7
Q6
Q5
Q3
Q2
RY/BY#
1
No toggle
0
N/A
toggle
1
Erase suspend read in non-erase suspended sector
Data
Data
Data
Data
Data
1
Erase suspend program in non-erase suspended sector
Q7#
Toggle
0
N/A
N/A
0
Erase suspend read in erase suspended sector
When the device has suspended erasing, user can execute the command sets except sector erase and chip erase,
such as read silicon ID, sector protect verify, program, CFI query and erase resume.
SECTOR ERASE RESUME
The sector Erase Resume command is valid only when the device is in Erase-Suspended Read mode. After erase
resumes, the user can issue another Ease Suspend command, but there should be a 400uS interval between Ease
Resume and the next Erase Suspend command. If the user enters an infinite suspend-resume loop, or suspendresume exceeds 1024 times, erase times will increase dramatically.
AUTOMATIC SELECT OPERATIONS
When the device is in Read mode, Erase-Suspended Read mode, or CFI mode, the user can issue the Automatic
Select command shown in Table 3 (two unlock cycles followed by the Automatic Select command 90h) to enter
Automatic Select mode. After entering Automatic Select mode, the user can query the Manufacturer ID, Device ID,
Security Sector locked status, or Sector-Group protected status multiple times without issuing a new Automatic Select
command.
While In Automatic Select mode, issuing a Reset command (F0h) will return the device to Read mode (or EaseSuspended Read mode if Erase-Suspend was active).
Another way to enter Automatic Select mode is to use one of the bus operations shown in Table 2. BUS OPERATION_2. After the high voltage (Vhv) is removed from the A9 pin, the device will automatically return to Read mode or
Erase-Suspended Read mode.
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30
MX29LV128D T/B
Table 2-1. BUS OPERATION
Mode Select
RE-
CE#
WE#
OE#
Address
SET#
Data
(I/O)
Q0~Q7
Byte#
Vil
WP#/
Vih
ACC
Data (I/O)
Q8~Q15
Device Reset
L
X
X
X
X
HighZ
HighZ
HighZ
L/H
Standby Mode
Vcc±
Vcc±
X
X
X
HighZ
HighZ
HighZ
H
0.3V
0.3V
H
L
H
H
X
HighZ
HighZ
HighZ
L/H
Read Mode
H
L
H
L
AIN
DOUT
Q8-Q14=
DOUT
L/H
Write(Note1)
H
L
L
H
AIN
DIN
HighZ,
DIN
Note3
Accelerate
H
L
L
H
AIN
DIN
Q15=A1
DIN
Vhv
Vhv
X
X
X
AIN
DIN
HighZ
DIN
Note3
Vhv
L
L
H
X
X
L/H
X
X
Note3
Output
Disable
Program
Temporary
Sector-Group
Unprotect
Sector-Group
Protect (Note2)
Chip Unprotect
(Note2)
Sector Address, DIN, DOUT
A6=L,A1=H,A0=L
Vhv
L
L
H
Sector Address, DIN, DOUT
A6=H,A1=H,A0=L
Notes:
1. All sectors will be unprotected if WP#/ACC=Vhv.
2. The two outmost boot sectors are protected if WP#/ACC=Vil.
3. When WP#/ACC = Vih, the protection conditions of the two outmost boot sectors depend on previous protection
conditions."Sector/Sector Block Protection and Unprotection" describes the protect and unprotect method.
4. Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection,
or data polling algorithm.
5. In Word Mode (Byte#=Vih), the addresses are AM to A0.
In Byte Mode (Byte#=Vil), the addresses are AM to A-1 (Q15).
6. AM: MSB of address.
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31
MX29LV128D T/B
Table 2-2. BUS OPERATION
Item
Control Input
CE#
WE# OE#
AM
A11
to
to
A8
A9
A12 A10
Sector Lock Status
L
H
L
SA
x
to
A5
A6
A7
Vhv
x
to
A1
A0
Q0~Q7
Q8~Q15
H
L
01h or
x
A2
L
x
Verification
00h
(Note1)
Read Silicon ID
L
H
L
x
x
Vhv
x
L
x
L
L
C2H
x
L
H
L
x
x
Vhv
x
L
x
L
H
7EH
22H(Word)
Manufacturer Code
Read Silicon ID
MX29LV128DT
Read Silicon ID
XXH(Byte)
L
H
L
x
x
Vhv
x
L
x
L
H
7AH
MX29LV128DB
Read Indicator Bit
22H(Word)
XXH(Byte)
L
H
L
x
x
Vhv
x
L
x
H
H
(Note2)
x
(Q7) For Security
Sector
Notes:
1. Sector unprotected code:00h. Sector protected code:01h.
2. Factory locked code:
WP# protects bottom two address sector: 88h.
WP# protects top two address sector: 98h
Factory unlocked code: WP# protects bottom two address sector: 08h.
WP# protects top two address sector: 18h
3. AM: MSB of address.
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MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
AUTOMATIC SELECT COMMAND SEQUENCE
Automatic Select mode is used to access the manufacturer ID, device ID and to verify whether or not secured silicon
is locked and whether or not a sector is protected. The automatic select mode has four command cycles. The first two
are unlock cycles, and followed by a specific command. The fourth cycle is a normal read cycle, and user can read at
any address any number of times without entering another command sequence. The Reset command is necessary to
exit the Automatic Select mode and back to read array. The following table shows the identification code with corresponding address.
Manufacturer ID
Device ID
Secured Silicon
Sector Protect Verify
Word
Byte
Word
Byte
Word
Address
X00
X00
X01
X02
X03
Byte
X06
Word
Byte
(Sector address) X 02
(Sector address) X 04
Data (Hex)
C2
C2
227E/227A
7E/7A
98/18 (Top)
88/08 (Bottom)
98/18 (Top)
88/08 (Bottom)
00/01
00/01
Representation
Top/Bottom Boot Sector
Top/Bottom Boot Sector
Factory locked/unlocked
Factory locked/unlocked
Unprotected/protected
Unprotected/protected
After entering automatic select mode, no other commands are allowed except the reset command.
READ MANUFACTURER ID OR DEVICE ID
The Manufacturer ID (identification) is a unique hexadecimal number assigned to each manufacturer by the JEDEC
committee. Each company has its own manufacturer ID, which is different from the ID of all other companies. The
number assigned to Macronix is C2h.
The Device ID is a unique hexadecimal number assigned by the manufacturer for each one of the flash devices made
by that manufacturer.
The above two ID types are stored in a 16-bit register on the flash device -- eight bits for each ID. This register is
normally read by the user or by the programming machine to identify the manufacturer and the specific device.
After entering Automatic Select mode, performing a read operation with A1 & A0 held LOW will cause the device to
output the Manufacturer ID on the Data I/O (Q7 to Q0) pins. Performing a read operation with A1 LOW and A0 HIGH
will cause the device to output the Device ID.
SECURITY SECTOR LOCK STATUS
After entering Automatic Select mode, the customer can check the lock status of the Security Sector by performing a
read operations with A0 and A1 held HIGH. If the code 98h(T)/88h(B) is read from data pins Q7 to Q0, the sector has
been locked at the factory. If the code 18h(T)/08h(B) is read, the sector has not been locked at the factory.
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MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
VERIFY SECTOR GROUP PROTECTION
After entering Automatic Select mode, performing a read operation with A1 held HIGH and A0 held LOW and the
address of the sector to be checked applied to A20 to A12, data bit Q0 will indicate the protected status of the
addressed sector. If Q0 is HIGH, the sector is protected. Conversely, if Q0 is LOW, the sector is unprotected.
SECURITY SECTOR FLASH MEMORY REGION
The Security Sector region is an extra memory space of 128-Words in length. The Security Sector can be locked by the
factory prior to shipping, or it can be locked by the customer later.
Factory Locked: Security Sector Programmed and Protected at the Factory
In a factory locked device, the Security Sector is permanently locked before shipping from the factory. The device will
have a 16-byte (8-word) ESN in the security region. In bottom boot devices, the ESN occupies addresses 00000h to
0000Fh in byte mode or 00000h to 00007h in word mode. In top boot devices, the ESN occupies addresses FFFF00h
to FFFF0Fh in byte mode or 7FFF80h to 7FFF87h in word mode.
Customer Lockable: Security Sector NOT Programmed or Protected at the Factory
When the security feature is not required, the Security Sector can provide an extra sector of memory.
Two methods are available for protecting the Security Sector. Note that once the Security Sector is protected, there is
NO way to unprotect it and its contents can no longer be altered.
The first protection method requires writing the three-cycle Enter Security Region command followed by the use of the
Sector-Group protect algorithm as illustrated in Figure 14-1 with the following exception: the RESET# pin may be at
either Vih or Vhv. Unlike normal Sector-Groups, which do require Vhv on the RESET# pin, the Security Sector may be
permanently locked in-circuit without the use of high voltage.
The second protection method also uses the three-cycle Enter Security Region command, but uses bus operations
that applies Vhv to the A9 and OE# pins with A6, CE#, and WE# held LOW and the SA address applied to A20 to A12.
The protection operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for more
details on using this method.
After the Security Sector is locked and verified, the system must write an Exit Security Sector Region command, go
through a power cycle, or issue a hardware reset to return the device to read normal array mode.
ENTER AND EXIT SECURITY SECTOR
The device allows the user to access the extra 128-Words sector identified as the Security Sector, which may contain
a random, 128-bits electronic serial number (ESN), or it may contain user data.
To access the Security Sector, the user must issue a three-cycle "Enter Security Sector" command sequence. To exit
the Security Sector and return to normal operation, the user issues the four-cycle "Exit Security Sector" command.
P/N:PM1327
REV. 1.0, SEP. 22, 2008
34
MX29LV128D T/B
COMMAND OPERATIONS (cont'd)
RESET
In the following situations, executing reset command will reset device back to Read mode:
•
•
•
•
•
•
•
•
Among erase command sequence (before the full command set is completed)
Sector erase time-out period
Erase fail (while Q5 is high)
Among program command sequence (before the full command set is completed, erase-suspended program included)
Program fail (while Q5 is high, and erase-suspended program fail is included)
Read silicon ID mode
Sector protect verify
CFI mode
While device is at the status of program fail or erase fail (Q5 is high), user must issue reset command to reset device
back to read array mode. While the device is in read silicon ID mode, sector protect verify or CFI mode, user must
issue reset command to reset device back to read array mode.
When the device is in the progress of programming (not program fail) or erasing (not erase fail), device will ignore reset
command.
P/N:PM1327
REV. 1.0, SEP. 22, 2008
35
MX29LV128D T/B
COMMON FLASH MEMORY INTERFACE (CFI) MODE
QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE
MX29LV128D T/B features CFI mode. Host system can retrieve the operating characteristics, structure and vendorspecified information such as identifying information, memory size, byte/word configuration, operating voltages and
timing information of this device by CFI mode. If the system writes the CFI Query command "98h", to address "55h"/
"AAh" (depending on Word/Byte mode), the device will enter the CFI Query Mode, any time the device is ready to read
array data. The system can read CFI information at the addresses given in Table 4.
Once user enters CFI query mode, user can not issue any other commands except reset command. The reset
command is required to exit CFI mode and go back to the mode before entering CFI. The system can write the CFI
Query command only when the device is in read mode, erase suspend, standby mode or automatic select mode.
Table 4-1. CFI mode: Identification Data Values
(All values in these tables are in hexadecimal)
Description
Query-unique ASCII string "QRY"
Primary vendor command set and control interface ID code
Address for primary algorithm extended query table
Alternate vendor command set and control interface ID code
Address for alternate algorithm extended query table
Address (h)
(Word Mode)
10
11
12
13
14
15
16
17
18
19
1A
Address (h)
(Byte Mode)
20
22
24
26
28
2A
2C
2E
30
32
34
Data (h)
Address (h)
(Word Mode)
1B
1C
1D
1E
1F
20
21
Address (h)
(Byte Mode)
36
38
3A
3C
3E
40
42
Data (h)
22
23
24
25
26
44
46
48
4A
4C
0000
0005
0000
0004
0000
0051
0052
0059
0002
0000
0040
0000
0000
0000
0000
0000
Table 4-2. CFI mode: System Interface Data Values
Description
Vcc supply minimum program/erase voltage
Vcc supply maximum program/erase voltage
VPP supply minimum program/erase voltage
VPP supply maximum program/erase voltage
Typical timeout per single word/byte write, 2n us
Typical timeout for maximum-size buffer write, 2n us
Typical timeout per individual block erase, 2n ms
Typical timeout for full chip erase, 2n ms
Maximum timeout for word/byte write, 2n times typical
Maximum timeout for buffer write, 2n times typical
Maximum timeout per individual block erase, 2n times typical
Maximum timeout for chip erase, 2n times typical
P/N:PM1327
0030
0036
0000
0000
0004
0000
000A
REV. 1.0, SEP. 22, 2008
36
MX29LV128D T/B
Table 4-3. CFI mode: Device Geometry Data Values
Description
Address (h)
Address (h)
(Word Mode)
(Byte Mode)
Device size = 2n in number of bytes
27
4E
0018
Flash device interface description (02=asynchronous x8/x16)
28
50
0002
29
52
0000
2A
54
0000
2B
56
0000
Number of erase regions within device
2C
58
0002
Index for Erase Bank Area 1
2D
5A
0007
[2E,2D] = # of same-size sectors in region 1-1
2E
5C
0000
[30, 2F] = sector size in multiples of 256-bytes
2F
5E
0020
30
60
0000
31
62
00FE
32
64
0000
33
66
0000
34
68
0001
35
6A
0000
36
6C
0000
37
6E
0000
38
70
0000
39
72
0000
3A
74
0000
3B
76
0000
3C
78
0000
Maximum number of bytes in buffer write = 2n (not support)
Index for Erase Bank Area 2
Index for Erase Bank Area 3
Index for Erase Bank Area 4
P/N:PM1327
Data (h)
REV. 1.0, SEP. 22, 2008
37
MX29LV128D T/B
Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values
Description
Address (h)
Address (h)
(Word Mode)
(Byte Mode)
40
80
0050
41
82
0052
42
84
0049
Major version number, ASCII
43
86
0031
Minor version number, ASCII
44
88
0033
Unlock recognizes address (0= recognize, 1= don't recognize)
45
8A
0000
Erase suspend (2= to both read and program)
46
8C
0002
Sector protect (N= # of sectors/group)
47
8E
0004
Temporary sector unprotect (1=supported)
48
90
0001
Sector protect/Chip unprotect scheme
49
92
0004
Simultaneous R/W operation (0=not supported)
4A
94
0000
Burst mode (0=not supported)
4B
96
0000
Page mode (0=not supported)
4C
98
0000
Minimum ACC(acceleration) supply (0= not supported), [D7:D4] for volt, 4D
9A
00A5
9C
00B5
9E
0002/
Query - Primary extended table, unique ASCII string, PRI
Data (h)
[D3:D0] for 100mV
Maximum ACC(acceleration) supply (0= not supported), [D7:D4] for volt, 4E
[D3:D0] for 100mV
Top/Bottom boot block indicator
4F
02h=bottom boot device 03h=top boot device
0003
P/N:PM1327
REV. 1.0, SEP. 22, 2008
38
MX29LV128D T/B
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM STRESS RATINGS
Surrounding Temperature with Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +125oC
Storage Temperature . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC
Voltage Range
Vcc . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +4.0 V
RESET#, A9 and OE# . .. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +10.5 V
The other pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 V to Vcc +0.5 V
Output Short Circuit Current (less than one second) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 mA
Note:
1. Minimum voltage may undershoot to -2V during transition and for less than 20ns during transitions.
2. Maximum voltage may overshoot to Vcc+2V during transition and for less than 20ns during transitions.
OPERATING TEMPERATURE AND VOLTAGE
Commercial (C) Grade
Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° C to +70° C
Industrial (I) Grade
Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40° C to +85° C
VCC Supply Voltages
VCC range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.0 V to 3.6 V
P/N:PM1327
REV. 1.0, SEP. 22, 2008
39
MX29LV128D T/B
DC CHARACTERISTICS
Symbol
Iilk
Iilk9
Iolk
Icr1
Description
Input Leak
A9 Leak
Output Leak
Read Current
Min
Typ
5mA
Max
± 1.0uA
35uA
± 1.0uA
15mA
20mA
40mA
35mA
70mA
26mA
30mA
Icw
Write Current
Isb
Standby Current
8uA
20uA
Isbr
Reset Current
8uA
20uA
Isbs
Icp1
Sleep Mode Current
Accelerated Pgm Current,
WP#/Acc pin(Word/Byte)
Accelerated Pgm Current,
Vcc pin,(Word/Byte)
Input Low Voltage
Input High Voltage
Very High Voltage for hardware
Protect/Unprotect/Auto Select/
Temporary Unprotect/
Accelerated Program
Output Low Voltage
Ouput High Voltage
Ouput High Voltage
Low Vcc Lock-out voltage
8uA
5mA
20uA
10mA
15mA
30mA
Icp2
Vil
Vih
Vhv
Vol
Voh1
Voh2
Vlko
-0.5V
0.7xVcc
9.5V
P/N:PM1327
A9=10.5V
CE#=Vil, OE#=Vih,
Vcc=Vccmax;
f=1MHz, Byte Mode
CE#=Vil, OE#=Vih,
Vcc=Vccmax;
f=5MHz, Word Mode
CE#=Vil, OE#=Vih,
Vcc=Vccmax;
f=10MHz
CE#=Vil, OE#=Vih,
WE#=Vil
Vcc=Vcc max,
other pin disable
Vcc=Vccmax,
Reset# enable,
other pin disable
CE#=Vil,
OE#=Vih
CE#=Vil,
OE#=Vih
0.8V
Vcc+0.3V
10.5V
0.45V
0.85xVcc
Vcc-0.4V
2.3V
Remark
Iol=4.0mA
Ioh1=-2mA
Ioh2=-100uA
2.5V
REV. 1.0, SEP. 22, 2008
40
MX29LV128D T/B
SWITCHING TEST CIRCUITS
Vcc
R2
TESTED DEVICE
0.1uF
+3.3V
CL
R1
DIODES=IN3064
OR EQUIVALENT
R1=6.2K ohm
R2=2.7K ohm
Test Condition
Output Load : 1 TTL gate
Output Load Capacitance,CL : 30pF
Rise/Fall Times : 5ns
In/Out reference levels :1.5V
SWITCHING TEST WAVEFORMS
3.0V
1.5V
1.5V
Test Points
0.0V
INPUT
OUTPUT
P/N:PM1327
REV. 1.0, SEP. 22, 2008
41
MX29LV128D T/B
AC CHARACTERISTICS
Symbol
Taa
Tce
Toe
Tdf
Toh
Trc
Twc
Tcwc
Tas
Tah
Tds
Tdh
Tvcs
Tcs
Tch
Toes
Toeh
Toeh
Tws
Twh
Tcep
Tceph
Twp
Twph
Tbusy
Tghwl
Tghel
Twhwh1
Twhwh1
Twhwh1
Twhwh2
Tbal
Description
Valid data output after address
Valid data output after CE# low
Valid data output after OE# low
Data output floating after OE# high
Output hold time from the earliest rising edge of address,
CE#, OE#
Read period time
Write period time
Command write period time
Address setup time
Address hold time
Data setup time
Data hold time
Vcc setup time
Chip enable Setup time
Chip enable hold time
Output enable setup time
Read
Output enable hold time
Toggle &
Data# Polling
WE# setup time
WE# hold time
CE# pulse width
CE# pulse width high
WE# pulse width
WE# pulse width high
Program/Erase active time by RY/BY#
Read recover time before write
Read recover time before write
Program operation
Byte
Program operation
Word
Acc program operation(Word/Byte)
Sector erase operation
Sector add hold time
P/N:PM1327
Min
Typ
Max
90
90
30
30
0
Unit
ns
ns
ns
ns
ns
90
90
90
0
45
45
0
50
0
0
0
0
10
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
ns
ns
0
0
45
30
35
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
us
us
sec
us
90
0
0
9
11
9
1
210
5
50
REV. 1.0, SEP. 22, 2008
42
MX29LV128D T/B
Figure 1. COMMAND WRITE OPERATION
Tcwc
CE#
Vih
Vil
Tch
Tcs
WE#
Vih
Vil
Toes
OE#
Twph
Twp
Vih
Vil
Addresses
Vih
VA
Vil
Tah
Tas
Tdh
Tds
Vih
Data
Vil
DIN
VA: Valid Address
P/N:PM1327
REV. 1.0, SEP. 22, 2008
43
MX29LV128D T/B
READ/RESET OPERATION
Figure 2. READ TIMING WAVEFORMS
Tce
Vih
CE#
Vil
Vih
WE#
Vil
Toeh
Tdf
Toe
Vih
OE#
Vil
Toh
Taa
Trc
Vih
ADD Valid
Addresses
Vil
Outputs
Voh
HIGH Z
DATA Valid
HIGH Z
Vol
P/N:PM1327
REV. 1.0, SEP. 22, 2008
44
MX29LV128D T/B
AC CHARACTERISTICS
Item
Description
Setup
Speed
Unit
Trp1
RESET# Pulse Width (During Automatic Algorithms)
MIN
10
us
Trp2
RESET# Pulse Width (NOT During Automatic Algorithms)
MIN
500
ns
Trh
RESET# High Time Before Read
MIN
50
ns
Trb1
RY/BY# Recovery Time (to CE#, OE# go low)
MIN
0
ns
Trb2
RY/BY# Recovery Time (to WE# go low)
MIN
50
ns
Tready1
RESET# PIN Low (During Automatic Algorithms)
MAX
20
us
MAX
500
ns
to Read or Write
Tready2
RESET# PIN Low (NOT During Automatic
Algorithms) to Read or Write
Figure 3. RESET# TIMING WAVEFORM
Trb1
CE#, OE#
Trb2
WE#
Tready1
RY/BY#
RESET#
Trp1
Reset Timing during Automatic Algorithms
CE#, OE#
Trh
RY/BY#
RESET#
Trp2
Tready2
Reset Timing NOT during Automatic Algorithms
P/N:PM1327
REV. 1.0, SEP. 22, 2008
45
MX29LV128D T/B
ERASE/PROGRAM OPERATION
Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM
CE#
Tch
Twhwh2
Twp
WE#
Twph
Tcs
Tghwl
OE#
Last 2 Erase Command Cycle
Twc
Address
Tas
2AAh
Read Status
Tah
VA
555h
Tds
Tdh
55h
VA
In
Progress Complete
10h
Data
Tbusy
Trb
RY/BY#
P/N:PM1327
REV. 1.0, SEP. 22, 2008
46
MX29LV128D T/B
Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 10H Address 555H
Data# Polling Algorithm or
Toggle Bit Algorithm
NO
Data=FFh ?
YES
Auto Chip Erase Completed
P/N:PM1327
REV. 1.0, SEP. 22, 2008
47
MX29LV128D T/B
Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Read Status
CE#
Tch
Twhwh2
Twp
WE#
Twph
Tcs
Tghwl
OE#
Tbal
Last 2 Erase Command Cycle
Twc
Address
Tas
Sector
Address 0
2AAh
Tds
Tdh
55h
Sector
Address 1
Sector
Address n
Tah
VA
VA
In
Progress Complete
30h
30h
30h
Data
Tbusy
Trb
RY/BY#
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REV. 1.0, SEP. 22, 2008
48
MX29LV128D T/B
Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 30H Sector Address
Last Sector
to Erase
NO
YES
Data# Polling Algorithm or
Toggle Bit Algorithm
Data=FFh
NO
YES
Auto Sector Erase Completed
P/N:PM1327
REV. 1.0, SEP. 22, 2008
49
MX29LV128D T/B
Figure 8. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
NO
ERASE SUSPEND
Toggle Bit checking Q6
not toggled
YES
Read Array or
Program
Reading or
Programming End
NO
YES
Write Data 30H
ERASE RESUME
Continue Erase
Another
Erase Suspend ?
NO
YES
P/N:PM1327
REV. 1.0, SEP. 22, 2008
50
MX29LV128D T/B
Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS
CE#
Tch
Twhwh1
Twp
WE#
Tcs
Twph
Tghwl
OE#
Last 2 Program Command Cycle
555h
Address
Last 2 Read Status Cycle
Tah
Tas
VA
PA
Tds
VA
Tdh
A0h
Status
PD
DOUT
Data
Tbusy
Trb
RY/BY#
Figure 10. Accelerated Program Timing Diagram
(9.5V ~ 10.5V)
Vhv
WP#/ACC
Vil or Vih
Vil or Vih
250ns
250ns
P/N:PM1327
REV. 1.0, SEP. 22, 2008
51
MX29LV128D T/B
Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM
WE#
Twhwh1 or Twhwh2
Tcep
CE#
Tceph
Tghwl
OE#
Tah
Tas
Address
555h
VA
PA
Tds
VA
Tdh
A0h
Status
PD
DOUT
Data
Tbusy
RY/BY#
P/N:PM1327
REV. 1.0, SEP. 22, 2008
52
MX29LV128D T/B
Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data A0H Address 555H
Write Program Data/Address
Data# Polling Algorithm or
Toggle Bit Algorithm
next address
Read Again Data:
Program Data?
No
YES
No
Last Word to be
Programed
YES
Auto Program Completed
P/N:PM1327
REV. 1.0, SEP. 22, 2008
53
MX29LV128D T/B
SECTOR GROUP PROTECT/CHIP UNPROTECT
Figure 13. SECTOR GROUP PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control)
150us: Sector Protect
15ms: Chip Unprotect
1us
CE#
WE#
OE#
Verification
Data
60h
SA, A6
A1, A0
60h
40h
VA
VA
Status
VA
Vhv
Vih
RESET#
VA: valid address
P/N:PM1327
REV. 1.0, SEP. 22, 2008
54
MX29LV128D T/B
Figure 14-1. IN-SYSTEM SECTOR GROUP PROTECT WITH RESET#=Vhv
START
Retry count=0
RESET#=Vhv
Wait 1us
Temporary Unprotect Mode
No
First CMD=60h?
Yes
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 60h
Wait 150us
Reset
PLSCNT=1
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 40h
Retry Count +1
Read at Sector Address
with [A6,A1,A0]:[0,1,0]
No
No
Retry Count=25?
Yes
Data=01h?
Yes
Device fail
Protect another
sector?
Yes
No
Temporary Unprotect Mode
RESET#=Vih
Write RESET CMD
Sector Protect Done
P/N:PM1327
REV. 1.0, SEP. 22, 2008
55
MX29LV128D T/B
Figure 14-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv
START
Retry count=0
RESET#=Vhv
Wait 1us
Temporary Unprotect
No
First CMD=60h?
Yes
All sectors
protected?
No
Protect All Sectors
Yes
Write [A6,A1,A0]:[1,1,0]
data: 60h
Wait 15ms
Write [A6,A1,A0]:[1,1,0]
data: 40h
Retry Count +1
Read [A6,A1,A0]:[1,1,0]
No
No
Retry Count=1000?
Data=00h?
Yes
Device fail
Yes
Temporary Unprotect
Write reset CMD
Chip Unprotect Done
P/N:PM1327
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56
MX29LV128D T/B
Table 5. TEMPORARY SECTOR GROUP UNPROTECT
Parameter
Alt
Description
Condition
Speed
Unit
Trpvhh
Tvidr
RESET# Rise Time to Vhv and Vhv Fall Time to RESET#
MIN
500
ns
Tvhhwl
Trsp
RESET# Vhv to WE# Low
MIN
4
us
Figure 15. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS
Program or Erase Command Sequence
CE#
WE#
Tvhhwl
RY/BY#
Vhv
10V
RESET#
0 or Vih
Vil or Vih
Trpvhh
Trpvhh
P/N:PM1327
REV. 1.0, SEP. 22, 2008
57
MX29LV128D T/B
Figure 16. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART
Start
Apply Reset# pin Vhv Volt
Enter Program or Erase Mode
Mode Operation Completed
(1) Remove Vhv Volt from Reset#
(2) RESET# = Vih
Completed Temporary Sector
Unprotected Mode
Notes:
1. Temporary unprotect all protected sectors Vhv=9.5~10.5V.
2. After leaving temporary unprotect mode, the previously protected sectors are again protected.
P/N:PM1327
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58
MX29LV128D T/B
Figure 17. SILICON ID READ TIMING WAVEFORM
Vih
CE#
Vil
Tce
Vih
WE#
Vil
Toe
Vih
OE#
Tdf
Vil
Toh
Toh
Vhv
Vih
A9
Vil
Vih
A0
Vil
Taa
A1
Taa
Vih
Vil
Vih
ADD
Vil
DATA
Q0-Q7
(Byte Mode)
Vih
DATA OUT
DATA OUT
Vil
C2h
DATA
Q0-Q15/A-1
(Word Mode)
7Eh (TOP boot)
7Ah (Bottom boot)
Vih
DATA OUT
DATA OUT
Vil
00C2h
227Eh (TOP boot)
227Ah (Bottom boot)
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WRITE OPERATION STATUS
Figure 18. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
Toe
OE#
Toeh
Tdf
Trc
Address
VA
VA
Taa
Toh
Q7
Status Data
Complement
True
Valid Data
Q0-Q6
Status Data
Status Data
True
Valid Data
High Z
High Z
Tbusy
RY/BY#
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Figure 19. DATA# POLLING ALGORITHM
Start
Read Q7~Q0 at valid address
(Note 1)
No
Q7 = Data# ?
Yes
No
Q5 = 1 ?
Yes
Read Q7~Q0 at valid address
Q7 = Data# ?
(Note 2)
No
Yes
FAIL
Pass
Notes:
1. For programming, valid address means program address.
For erasing, valid address means erase sectors address.
2. Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5.
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Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
Toe
OE#
Toeh
Tdf
Trc
Address
VA
VA
VA
VA
Taa
Toh
Q6/Q2
Valid Status
(first read)
Valid Status
Valid Data
(second read)
(stops toggling)
Valid Data
Tbusy
RY/BY#
VA : Valid Address
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Figure 21. TOGGLE BIT ALGORITHM
Start
Read Q7-Q0 Twice
(Note 1)
NO
Q6 Toggle ?
YES
NO
Q5 = 1?
YES
Read Q7~Q0 Twice
NO
Q6 Toggle ?
YES
PGM/ERS fail
Write Reset CMD
PGM/ERS Complete
Notes:
1. Read toggle bit twice to determine whether or not it is toggling.
2. Recheck toggle bit because it may stop toggling as Q5 changes to "1".
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MX29LV128D T/B
AC CHARACTERISTICS
WORD/BYTE CONFIGURATION (BYTE#)
Parameter
Description
Speed
Unit
90
Telfl/Telfh
CE# to BYTE# from L/H
MAX
5
ns
Tflqz
BYTE# from L to Output Hiz
MAX
30
ns
Tfhqv
BYTE# from H to Output Active
MIN
90
ns
Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word
mode)
CE#
OE#
Telfh
BYTE#
Q0~Q14
DOUT
(Q0-Q7)
Q15/A-1
VA
DOUT
(Q0-Q14)
DOUT
(Q15)
Tfhqv
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RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
AC timing illustrated in Figure A is recommended for the supply voltages and the control signals at device power-up.
If the timing in the figure is ignored, the device may not operate correctly.
Vcc(min)
Vcc
GND
Tvr
Tvcs
Tf
Tce
Tr
Vih
CE#
Vil
Vih
WE#
Vil
Tf
Toe
Tr
Vih
OE#
Vil
Tr or Tf
Vih
ADDRESS
Tr or Tf
Valid
Address
Vil
Voh
DATA
Taa
High Z
Valid
Ouput
Vol
Vih
WP#/ACC
Vil
Figure A. AC Timing at Device Power-Up
Symbol
Parameter
Min.
Max.
Unit
Tvr
Vcc Rise Time
20
500000
us/V
Tr
Input Signal Rise Time
20
us/V
Tf
Input Signal Fall Time
20
us/V
Tvcs
Vcc Setup Time
200
P/N:PM1327
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MX29LV128D T/B
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
MIN.
TYP. (1)
MAX. (2)
UNITS
180
300
sec
1
5
sec
Chip Erase Time
Sector Erase Time
Erase/Program Cycles
100,000
Cycles
Chip Programming Time (Word Mode)
100
350
sec
Word Program Time
11
360
us
Notes:
1. Typical program and erase times assume the following conditions: 25° C, 3.0V VCC. Programming specifications
assume checkboard data pattern.
2. Maximum values are measured at VCC = 3.0 V, worst case temperature. Maximum values are valid up to and
including 100,000 program/erase cycles.
3. Erase/Program cycles comply with JEDEC JESD-47E & A117A standard.
LATCH-UP CHARACTERISTICS
MIN.
MAX.
Input Voltage voltage difference with GND on WP#/ACC, A9, OE, Reset# pins
-1.0V
10.5V
Input Voltage voltage difference with GND on all normal pins input
-1.0V
Vcc x 1.5Vcc
-100mA
+100mA
Vcc Current
All pins included except Vcc. Test conditions: Vcc = 3.0V, one pin per testing
TSOP PIN CAPACITANCE
Parameter Symbol
Parameter Description
Test Set
TYP
MAX
UNIT
CIN2
Control Pin Capacitance
VIN=0
7.5
9
pF
COUT
Output Capacitance
VOUT=0
8.5
12
pF
CIN
Input Capacitance
VIN=0
6
7.5
pF
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ORDERING INFORMATION
PART NO.
MX29LV128DTTC-90Q
ACCESS TIME
(ns)
90
Ball Pitch/
Ball size
PACKAGE
Remark
48 Pin TSOP
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
MX29LV128DBTC-90Q
90
48 Pin TSOP
MX29LV128DTT2C-90Q
90
56 Pin TSOP
MX29LV128DBT2C-90Q
90
56 Pin TSOP
MX29LV128DTMC-90Q*
90
70 Pin SSOP
MX29LV128DTTI-90Q
90
48 Pin TSOP
MX29LV128DBTI-90Q
90
48 Pin TSOP
MX29LV128DTT2I-90Q
90
56 Pin TSOP
MX29LV128DBT2I-90Q
90
56 Pin TSOP
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
Pb-free
(VCC=3.0V-3.6V)
* : Advance Information
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MX29LV128D T/B
PART NAME DESCRIPTION
MX 29 LV 128 D
T T C
90 Q
OPTION:
Q: Lead-free with restricted VCC range: 3.0V~3.6V
SPEED:
90: 90ns
TEMPERATURE RANGE:
C: Commercial (0˚ C to 70˚ C)
I: Industriall (-40˚ C to 85˚ C)
PACKAGE:
T: 48TSOP
T2: 56TSOP
M: 70SSOP
BOOT BLOCK TYPE:
T: Top Boot
B: Bottom Boot
REVISION:
D
DENSITY & MODE:
128: 128M x8/x16 Boot Block
TYPE:
LV: 3V
DEVICE:
29:Flash
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PACKAGE INFORMATION
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REVISION HISTORY
Revision No. Description
1.0
1. Removed "Preliminary"
2. Removed 64-FBGA package information
3. Added Note for overshoot and undershoot
P/N:PM1327
Page
Date
P1
SEP/22/2008
P1,3,67,68
P39
REV. 1.0, SEP. 22, 2008
72
MX29LV128D T/B
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and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due
to use of Macronix's products in the prohibited applications.
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73