Zarlink MT91600AN1 Programmable slic Datasheet

MT91600
Programmable SLIC
Data Sheet
Features
February 2005
•
Transformerless 2 W to 4 W conversion
•
Controls battery feed to line
•
Programmable line impedance
•
Programmable network balance impedance
•
Off-hook and dial pulse detection
•
Ring ground over-current protection
•
Programmable gain
Description
•
Programmable constant current feed
•
-22 V to -72 V battery operation
The Zarlink MT91600 provides an interface between
a switching system and a subscriber loop, mainly for
short loop SLIC applications. The functions provided
by the MT91600 include battery feed, programmable
constant current, 2 W to 4 W conversion, off-hook
and dial pulse detection, user definable line and
network balance impedance’s and the capability of
programming the audio gain externally. The device is
fabricated as a CMOS circuit in a 28 pin SSOP
package.
Ordering Information
MT91600AN
MT91600ANR
MT91600AN1
MT91600ANR1
*Pb
Line interface for:
PABX/ONS
•
Intercoms
•
Key Telephone Systems
•
Control Systems
X3
TD
X2
X1
Audio Gain & Network
Balance Circuit
Tip Drive
Controller
VX
VR
TF
TIP
Line Sense
2 W to 4 W
Conversion & Line
Impedance
RING
RF
C3A
C3B
RV
RD
Tubes
Tape & Reel
Tubes
Tape & Reel
-40°C to +85°C
Applications
•
28 Pin SSOP
28 Pin SSOP
28 Pin SSOP*
28 Pin SSOP*
Free Matte Tin
Z3
Z2
Over-Current
Protection Circuit
Z1
Relay
Driver
Ring Drive
Controller
IC
Loop Supervision
VREF
SHK
C1
C2A
C2B
VDD GND VEE
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1999-2005 Zarlink Semiconductor Inc. All Rights Reserved.
RLYC
RLYD
MT91600
Data Sheet
Change Summary
Page
10
Item
Change
Figure 5
VDD
TD
TF
TIP
RING
VREF
IC
RF
RV
RD
C3A
C3B
C2B
C2A
Updated Application Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VEE
GND
RLYD
RLYC
SHK
C1
X2
VR
X3
VX
X1
Z3
Z2
Z1
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
1
VDD
2
TD
Tip Drive (Output). Controls the Tip transistor.
3
TF
Tip Feed. Connects to the Tip transistor and to the TIP lead via the Tip feed resistor.
4
TIP
Tip. Connects to the TIP lead of the telephone line.
5
RING
Ring. Connects to the RING lead of the telephone line.
6
VREF
Reference Voltage (Input). This pin is used to set the subscribers loop constant
current. Changing the input voltage sets the current to any desired value within the
working limits. VREF is related to VLC.
7
IC
Internal Connection (Input). This pin must be connected to GND for normal operation.
8
RF
Ring Feed. Connects to the RING lead via the Ring feed resistor.
9
RV
Ring Voltage and Audio Feed. Connects directly to the Ring drive transistor and also to
Ring Feed via a relay.
10
RD
Ring Drive (Output). Controls the Ring transistor.
11
C3A
A filter capacitor for over-current protection is connected between this pin and GND.
12
C3B
A filter capacitor for over-current protection is connected between this pin and GND.
13
C2B
A capacitor for loop current stability is connected between this pin and C2A.
14
C2A
A capacitor for loop current stability is connected between this pin and C2B.
15
Z1
Positive supply rail, +5 V.
Line Impedance Node 1. A resistor of scaled value "k" is connected between Z1 and
Z2. This connection can not be left open circuit.
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Pin Description (continued)
Pin #
Name
Description
16
Z2
Line Impedance Node 2. This is the common connection node between Z1 and Z3.
17
Z3
Line Impedance Node 3. A network either resistive or complex of scaled value "k" is
connected between Z3 and Z2. This connection can not be left open circuit.
18
X1
Gain Node 1. This is the common node between Z3 and VX where resistors are
connected to set the 2 W to 4 W gain.
19
VX
Transmit Audio (Output). This is the 4 W analog signal to the SLIC.
20
X3
Gain Node 3. This is the common node between VR and the audio input from the
CODEC or switching network where resistors are fitted to sets the 4 W to 2 W gain
21
VR
Receive Audio (Input). This is the 4 W analog signal to the SLIC.
22
X2
Gain Node 2. Networks, either resistive or complex, are connected between this node,
VR and GND to set the Network Balance Impedance for the SLIC.
23
C1
A filter capacitor for ring trip is connected between this pin and GND.
24
SHK
Switch Hook (Output). This pin indicates the line state of the subscribers telephone.
The output can also be used for dial pulse monitoring. SHK is high in off-hook state.
25
RLYC
Relay Control (Input). An active high on this pin will switch RLYD low.
26
RLYD
Inverted Output of RLYC. It is used to drive the bipolar transistor that drives the relay
(see Figure 5.)
27
GND
Ground. Return path for +5 V and -5 V. This should also be connected back to the
return path for the loop battery, LGND and relay drive ground RLYGND.
28
VEE
Negative supply rail, -5 V.
Functional Description
The MT91600 is the analog SLIC for use in a 4 Wire switched system. The SLIC performs all of the normal interface
functions between the CODEC or switching system and the analog telephone line such as 2 W to 4 W conversion,
constant current feed, ringing and ring trip detection, current limiting, switch hook indication and line and network
balance impedance setting using minimal external components.
Refer to Figure 5 for MT91600 components designation.
2 Wire to 4 Wire Conversion
The hybrid performs 2 wire to 4 wire conversion by taking the 4 wire signal from an analog switch or voice CODEC,
a.c. coupled to VRIN, and converting it to a 2 wire differential signal at tip and ring. The 2 wire signal applied to tip
and ring by the telephone is converted to a 4 wire signal and should be a.c. coupled to Vx which is the output from
the SLIC to the analog switch or voice CODEC input.
Gain Control
It is possible to set the Transmit and Receive gains by the selection of the appropriate external components.
The gains can be calculated by the formulae:
2W to 4W gain:
Gain 2 - 4 = 20*Log [ R13 / R12]
4W to 2W gain:
Gain 4 - 2 = 20*Log [0.891 * (R14 / R15)]
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Impedance Programming
The MT91600 allows the designer to set the device’s impedance across TIP and RING, (ZTR), and network balance
impedance, (ZNB), separately with external low cost components.
For a resistive load, the impedance (ZTR) is set by R11 and R18. For a complex load, the impedance (ZTR) is set by
R11, R18, R19 & C8 (see Figure 5.)
The network balance, (ZNB), is set by R16, R17 & C3 (see Figure 5.)
The network balance impedance should be calculated once the 2W - 4W gain has been set.
Line Impedance
For optimum performance, the characteristic impedance of the line, (Zo), and the device’s impedance across TIP
and RING, (ZTR), should match. Therefore:
Zo = ZTR
The relationship between Zo and the components that set ZTR is given by the formula:
Zo / ( R1+R2) = kZo / R11
where kZo = ZLZ
ZLZ = R18, for a resistive load.
ZLZ = [R18 + (R19 // C8)], for a complex load.
The value of k can be set by the designer to be any value between 20 and 250. Three rules to ensure the correct
operation of the circuit:
(A) R18 + R19 > 50kΩ
(B) R1 = R2.
(C) R11 > =50kΩ
It is advisable to place these components as close as possible to the SLIC.
Network Balance Impedance
The network balance impedance, (ZNB), will set the transhybrid loss performance for the circuit. The balance of the
circuit is independent of the 4 - 2 Wire gain but is a function of the 2 - 4 Wire gain.
The method of setting the values for R16 and R17 is given by the formula:
R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )]
R17 + R16
[1 + R13 / R12]
where ZNB is the network balance impedance of the SLIC and Zo is the line impedance.
(R16 + R17) >= 50kΩ
It is advisable to place these components as close as possible to the SLIC.
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Loop Supervision & Dial Pulse Detection
The Loop Supervision circuit monitors the state of the phone line and when the phone goes "Off Hook" the SHK pin
goes high to indicate this state. This pin reverts to a low state when the phone goes back "On Hook" or if the loop
resistance is too high for the circuit to continue to support a constant current.
The SHK output can also be monitored for dialing information when used in a dial pulse system.
Constant Current Control
The SLIC employs a feedback circuit to supply a constant feed current to the line. This is done by sensing the sum
of the voltages across the feed resistors, R1 and R2, and comparing it to the input reference voltage, Vref, that
determines the constant current feed current.
The MT91600’s programmable current range is between 18 mA to 32 mA.
Line Drivers & Overcurrent Protection
The Line Drivers control the external Battery Feed circuit which provide power to the line and allows bi-directional
audio transmission.
The loop supervision circuitry provides bias to the line drivers to feed a constant current while the over-current
protection circuitry prevents the ring driver from causing the ring transistor to overload.
The line impedance presented by the Line Driver circuitry is determined by the external network, which may be
purely resistive or complex, allowing the circuit to be configured for use in any application. The impedance can also
be fixed to one value and modified to look like a different value by reflecting an impedance through the SLIC from
an intelligent CODEC or DSP module.
There is long term protection on the RING output against accidental short circuits that may be applied either across
TIP/RING to GND or RING to GND. This high current will be sensed and limited to a value that will protect the
circuit.
In situations where an accidental short circuit occurs either across TIP/RING to GND or RING to GND, an
excessive amount of current will flow through the ring drive transistor, Q3. Although the MT91600 will sense this
high current and limit it, if the power rating of Q3 is not high enough, it may suffer permanent damage. In this case,
a power sharing resistor, R23, can be inserted (see Figure 5) to dissipate some of the power. Capacitor C13 is
inserted to provide an a.c. ground point. The criteria for selecting a value for the power sharing resistor R23 can be
found in the application section of this data sheet.
Ringing and Ring Trip Detection
Ringing is applied to the line by disconnecting pin 8, RF, from pin 9, RV, and connecting it to a ringing source which
is battery backed. This may be done by use of an electro-mechanical relay. The SLIC is capable of detecting an Off
Hook condition during ringing by filtering out the large A.C. component by use of the external components
connected to pin 23. This filter allows an Off Hook condition to be monitored at SHK, pin 24.
When using DTMF signalling only i.e., pulse dialling is not used, the capacitor, C7, can be permanently connected
to ground and does not require to be switched out during dialling.
Power up Sequence
The circuit should be powered up in the following order: AGND, VEE, VDD, VBAT.
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Application
The following Application section is intended to demonstrate to the user the methods used in calculating and
selecting the external programming components in implementing the MT91600 as an analog line interface in a
communication system. The programming component values calculated below results in the optimum performance
of the device.
Refer to Figure 5 for MT91600 components designation.
Component Selection
Feed Resistors (R1, R2)
The selection of feed resistors, R1 and R2, can significantly affect the performance of the MT91600. It is
recommended that their values fall in the range of:
200Ω <= R1 <= 250Ω
where, R1 = R2
The resistors should have a tolerance of 1% (0.15% matched) and a power rating of 1 Watt.
Loop Current Setting (R3, R4, C9)
By using a resistive divider network, (Figure 3), it is possible to maintain the required voltage at Vref to set ILOOP.
The loop current programming is based on the following relationship:
ILOOP = - [ F * V LC + G * V BAT] * K o * H
(R1 +R2)
where,
F = R4 / (R4 + R3)
G = R3 / (R4 +R3)
K o = 200000 / (200000 + (R4//R3) )
H = 1.07
ILOOP is in Ampere
From Figure 3 with R1 = R2 = 220Ω
For ILOOP = 25mA, V LC = 0V, Vbat=-48V
R3
43kΩ
6
VREF
VLC
R4
130kΩ
C9
100nF
MT91600
VBAT
Figure 3 - Resistor Divider
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
C9 is inserted to ensure pin 6, Vref, remains at a.c. ground. 100 nF is recommended.
ILOOP can also be set by directly driving Vref with a low impedance voltage source. (See Figure 4). It is
recommended that a small resistor be placed in series with the Vref pin. In this case:
ILOOP = 1.07 * Vs
(R1 +R2)
where, Vs < 0
2kΩ
6
Vs
C9
100nF
VREF
MT91600
Figure 4 - Direct Voltage
Calculating Component Values For AC Transmission
There are five parameters a designer should know before starting the component calculations. These five
parameters are:
1)
2)
3)
4)
5)
characteristic impedance of the line Zo
network balance impedance ZNB
value of the feed resistors (R1 and R2)
2 W to 4 W transmit gain
4 W to 2 W receive gain
The following example will outline a step by step procedure for calculating component values. Given:
Zo = 600Ω, ZNB= 600Ω, R1=R2= 220Ω
Gain 2 - 4 = -1dB, Gain 4 - 2 = -1dB
Step 1: Gain Setting (R12, R13, R14, R15)
Gain 2 - 4 = 20 Log [ R13 / R12]
-1 dB = 20 Log [R13 / R12]
∴ R12 = 112.2kΩ, R13 = 100kΩ.
Gain 4 - 2 = 20 Log [0.891 * [R14 / R15)]
-1 dB = 20 Log [0.891 * [R14 / R15)]
∴ R14 = 100kΩ, R15 = 100kΩ.
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Step 2: Impedance Matching (R11, R18, R19, C8)
a) Zo / ( R1+R2) = kZo / R11
600/(220+220) = (k*600)/R11
let k = 125
∴ R11 = 55kΩ.
b) In general,
kZo = ZLZ
where:
ZLZ = R18, for a resistive load.
ZLZ = [R18 + (R19 // C8)], for a complex load.
Since we are dealing with a resistive load in this example ZLZ = R18, and therefore:
kZo = R18
(125 * 600)= R18
∴ R18 = 75kΩ.
Step 3: Network Balance Impedance (R16, R17)
R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )]
R17 + R16
[1 + R13 / R12)]
R17 = 0.4199
R17 + R16
set R17 = 100kΩ, R16 becomes 138kΩ.
∴ R16 = 138kΩ, R17 = 100kΩ.
Complex Line Impedance, Zo
In situations where the characteristic impedance of the line Zo is a complex value, determining the component
values for impedance matching (R11, R18, R19, C8) is as follows:
Given Zo = 220Ω + (820Ω // 120nF)
Zo / ( R1+R2) = kZo / R11
(Equation 1)
where, kZo = [R18 + (R19 // C8)]
Choose a standard value for C8 to find a suitable value for k.
Since 1nF exists, let C8 = 1nF then,
k = 120nF / C8
k = 120nF / 1nF
∴ k =120
R18 = k * 220Ω
R18 = 120 * 220Ω
R18 = 26400
R19 = k * 820Ω
R19 = 120 * 820
R19 = 98400
∴ R18 = 26k4Ω, R19 = 98k4Ω
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Zarlink Semiconductor Inc.
MT91600
From (Equation 1)
R11 = k * (R1 + R2)
R11 = 120 * (220Ω + 220Ω)
∴ R11 = 52k8Ω
Power Sharing Resistor (R23)
To determine the value of R23, use the following equations:
R23(max)= |Vbat(min)| - 100 - (2*R2 + Lr + DCRP)
30mA
R23(min)= |Vbat(max)| - Pd(max) - R2
40mA
1.6mA
where,
Vbat(min/max) = the expected variation of Vbat.
R2 = the feed resistor.
Lr = maximum DC loop resistance.
DCRP = DC resistance of the phone set.
Pd(max) = the maximum power dissipation of the ring drive transistor Q3.
If R23(max) > R23(min), then set R23 to be the geometric center:
R23 = Square Root (R23(max) * R23(min))
If R23(max) < R23(min), then a violation has occurred. Pd(max) will have to be increased.
If R23 = negative value, power sharing is not required, i.e., R23=0
A numerical example:
Given:
R2 = 220Ω
Lr = 325Ω (2.5km of 28 gauge wire, averaged at 65Ω/km)
DCRP = 200Ω
Pd(max) = 1.5W
Vbat = -48V +/- 10% (i.e. -43V to -53V)
Therefore:
R23(max) = (43/30mA) - 100 - (2 * 220 + 325 + 200)
= 1433.3 - 100 - 965
R23(max) = 368.3Ω
R23(min) = (53/40mA) - (1.5/1.6mA) - 220
= 1325 - 937.5 - 220
R23(min) = 167.5 Ω
R23 = Square Root ( 368.3 * 167.5 )
R23 = 248.4Ω
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Zarlink Semiconductor Inc.
Data Sheet
MT91600
Data Sheet
C7
VEE
C6
VDD
K1b
1
28
VDD VEE
24
SHK
RLYC
Q4
25
RLYC
26
RLYD
7
23
GND
IC
C1
X2
D1
R3
6
VREF
2
TD
R16
VR 21
C4
K1
VLC
C3
22
R14
VRLY
SHK
27
X3
20
VX
19
Q1
D2a
D4
X1
18
Z3
17
VRIN
VX
R13
VBAT
VBAT
C11
R15
C9
R4
R17
C12
D2b
R22
3
TF
4
TIP
R12
MT91600
R1
TIP
R21
PR1
ZLZ
R20
5
RING
RING
VBAT
K1a
RF
9
RV
VDD
R7
90 Vrms
R6
VBAT=-48 V
Q2
C5
R9
16
Z1
15
D3b
D3a
R5
RD
C3A
C3B
C2B
C2A
10
11
12
13
14
C1
C10
R10
C2
Impedance ZLZ
Q3
Complex Load Zo
C13
VBAT
Figure 5 - Typical Application
10
Zarlink Semiconductor Inc.
R19
R18
R18
R8
Resistive Load Zo
R23
~
8
Z2
R11
R2
C8
MT91600
Data Sheet
Component List* for a Typical Application with a Resistive 600 Ω Line Impendance - Refer to Figure 5 for
component designation and recommended configuration
Resistor Values
R1
220 Ω 1% (0.15% matched), 1 W
R2
220 Ω 1% (0.15% matched), 1 W
R3
43 kΩ
R4
130 kΩ
R5
220 Ω
R6
75 kΩ
R7
3 kΩ
R8
1 kΩ
R9
1 kΩ
R10
560 kΩ
R11
55 kΩ
R12
112 kΩ
R13
100 kΩ
R14
100 kΩ
R15
100 kΩ
R16
138 kΩ
R17
100 kΩ
R18
75 kΩ
R19
0Ω
R20
2 kΩ
R21
2 kΩ
R22
1 kΩ
R23
248 Ω
Capacitor Values
C1
100 nF, 5%
C2
300 nF, 5%
C3
100 pF, 5%
C4
33 nF, 20%
C5
3.3 nF, 5%
C6
1 uF, 20%, 16 V
C7
100 nF, 20%
C8
0F
C9
100 nF, 20%
C10
100 nF, 5%
C11
47 pF, 20%
C12
33 nF, 10%
C13
100 nF 20%
Diodes and Transistors
D1
BAS16 or equivalent
D2a/b
BAV99 dual diode or equivalent
D3a/b
BAV99 dual diode or equivalent
Q1
2N2222 or MPSA42 or MMBTA42
Q2
2N2907 or MPSA92 or MMBTA92
Q3
2N2222 or MPSA42 or MMBTA42
Q4
2N2907 or MPSA92 or MMBTA92
D4
1N5242 12 V Zener or equivalent
Note: All resistors are 1/4 W, 1% unless otherwise indicated.
*Assumes Zo = Z NB = 600 Ω, Gain 2 - 4 = -1 dB, Gain 4 - 2 = -1 dB.
Decoupling capacitors, (1 uF, 100 V, 20%), can be added to VDD, V EE, V BAT and V RLY to provide improved
PSRR performance.
K1
=
Electro-mechanical relay, 5V, DPDT/2 FORM C
PR1
= This device must always be fitted to ensure damage does not occur from inductive loads.For simple
applications, PR1 can be replaced by a single TVS, such as 1.5KE220C, across tip and ring. For applications
requiring lightning and mains cross protection further circuitry will be required and the following protection devices
are suggested: P2353AA, P2353AB (Teccor), THBT20011, THBT20012, THBT200S (SGS-Thomson), TISP2290,
TSSP8290L (T.I.)
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Zarlink Semiconductor Inc.
MT91600
Data Sheet
Absolute Maximum Ratings*
Parameter
1
DC Supply Voltages
Sym.
Min.
Max.
Units
VDD
VEE
VBAT
-0.3
-6.5
-80
+6.5
+0.3
+0.3
V
V
V
100
Vrms
Superimposed on VBAT
+0.3
V
Note 1
200
V
MAX 1 ms (with power on)
30
mA. RMS
45
mA
+150
°C
0.10
W
+85°C max, VBAT = -48 V
500
V
Human Body Model
Note 3
2
Ringing Voltages
Vring
3
Voltage setting for Loop Current
VREF
4
Overvoltage Tip/GND Ring/GND,
Tip/Ring
5
Ringing Current
6
Ring Ground over-current
7
Storage Temp
8
Package Power Dissipation
9
ESD Rating
-20
Iring
Tstg
-65
Pdiss
Comments
Limited by the Drive
transistor, Q3.
Note 2
*Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Note 1: Voltage at Vref pin set by VLC and potential divider.
Note 2: Tip and Ring must not be shorted together and to ground at the same time.
Note 3: The device contains circuitry to protect the inputs from static voltage up to 500 V. However, precautions should be taken to avoid
static charge build up when handling the device.
Recommended Operating Conditions
Parameter
Sym.
Min.
Typ.‡
Max.
Units
5.25
-4.75
-22
V
V
V
1
Operating
Supply Voltages
VDD
VEE
VBAT
4.75
-5.25
-72
5.00
-5.00
-48
2
Ringing Voltage
Vring
0
50
VRMS
3
Voltage setting for Loop Current
VREF
-10.3
V
4
Operating Temperature
To
-40
+25
+85
°C
‡ Typical figures are at 25°C with nominal supply voltages and are for design aid only
†Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡Typical figures are at 25°C with nominal + 5 V supplies and are for design aid only.
Note 4: 16 to 68 Hz superimposed on a V BAT.
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Zarlink Semiconductor Inc.
Test Conditions
Note 4
ILOOP = 25 mA,
R1=R2=220 Ω
VBAT = -48 V
MT91600
Data Sheet
DC Electrical Characteristics†
Characteristics
1
Typ.‡
Max.
Units
IDD
IEE
IBAT
25
11
8.5
45
mA
mA
mA
PC
60
90
mW
Standby/Active
25
28
mA
VREF = -10.3 V
Test circuit as Fig. 6
VBAT = -48 V
32
mA
Sym.
Supply Current
Min.
2
Power Consumption
3
Constant Current Line
Feed
ILOOP
22
4
Programmable Loop
Current Range
ILOOP
18
5
Operating Loop
(inclusive of Telephone
Set)
RLOOP
1200
Ω
450
Ω
6
Off Hook Detection
Threshold
7
RLYC
Input Low Voltage
Input High Voltage
Vil
Vih
2.0
SHK
Output Low Voltage
Output High Voltage
Vol
Voh
2.7
8
8
Dial Pulse Distortion
SHK
ON
OFF
20
0.4
mA
Test Conditions
ILOOP = 18 mA
VBAT = -48 V
ILOOP = 18 mA
VBAT = -22 V
VREF = -10.3 V
VBAT = -48 V
See Note 5. ILOOP = 25 mA
0.7
V
V
lil = 50 µA
lih = +50 µA
0.4
V
V
Lol = 8 mA
Loh = -0.4 mA
+4
+4
ms
ms
†Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡
Typical figures are at 25°C with nominal +5 V and are for design aid only.
Note 5: Off hook detection is related to loop current.
13
Zarlink Semiconductor Inc.
MT91600
Data Sheet
AC Electrical Characteristics †
Characteristics
1
Ring Trip Detect Time
2
Output Impedance at VX
3
Gain 4-2 @ 1 kHz
4
Gain Relative to 1 kHz
5
Transhybrid Loss
6
Gain 2-4 @ 1 kHz
7
Gain Relative to 1 kHz
8
Return Loss at 2-Wire
9
Total Harmonic Distortion
Sym.
Min.
Tt
Typ.‡
Max.
Units
100
300
mS
THL
RL
dB
Note 6
Test circuit as Fig. 8
±0.15
dB
300 Hz - 3400 Hz
20
25
dB
Note 6
300 Hz - 3400 Hz
Test circuit as Fig. 8
-1.3
-1
dB
Note 6
Test circuit as Fig. 7
±0.15
dB
300 Hz to 3400 Hz
30
dB
Note 6
300 Hz - 3400 Hz
Test circuit as Fig. 10
%
%
3 dBm, 1 kHz @ 2 W
1 Vrms, 1 KHz @ 4 W
42
dB
Input 0.5 Vrms, 1 KHz
Test circuit as Fig. 9
55
dB
200 Hz to 3400 Hz
Test circuit as Fig. 9
58
48
dB
dB
200 Hz to 1000 Hz
1000 Hz to 3400 Hz
20
-1
-0.8
-0.8
THD
@2W
@VX
0.3
0.3
10
Common Mode Rejection
2 wire to Vx
CMR
11
Longitudinal to Metallic Balance
LCL
12
Metallic to Longitudinal Balance
13
Idle Channel Noise
35
1.0
1.0
Nc
@2W
@VX
14
Ω
10
-1.3
Test Conditions
12
12
dBrnC
dBrnC
Cmessage Filter
Cmessage Filter
dB
dB
0.1Vp-p @ 1kHz
PSRR
Power Supply Rejection
Ratio at 2 W and VX
Vdd
Vee
23
23
†
Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
‡Typical
figures are at 25°C with nominal +5 V and are for design aid only.
Note 6: Assumes Zo = ZNB = 600 Ω and both transmit and receive gains are programmed externally to -1 dB, i.e. Gain 2-4 = -1 dB, Gain 42 = -1 dB.
14
Zarlink Semiconductor Inc.
MT91600
Data Sheet
Test Circuits
Figures 6, 7, 8, 9 and 10 are for illustrating the principles involved in making measurements and do not necessarily
reflect the actual method used in production testing.
TIP
ILoop
SLIC
VLC
R3
6
R4
Zo
C9
RING
VBAT
Figure 6 - Loop current programming
R15
20
TIP
Zo
__
2
~
VTR
R13
VS
VX
19
SLIC
18
R12
Zo
__
2
17
RING
Gain = 20*Log(VX/VTR)
Figure 7 - 2-4 Wire Gain
VX
19
TIP
C3
22
R16
21
VTR
Gain = 20*Log(VTR/VS)
R17
SLIC
R14
Zo
20
RING
C11
R15
VRIN
~V
THL = 20*Log(VX/VS)
Figure 8 - 4-2 Wire Gain & Transhybrid Loss
15
Zarlink Semiconductor Inc.
S
MT91600
Data Sheet
R15
20
TIP
Zo
__
2
VS
VTR
~
SLIC
VX
19
Zo
__
2
RING
Long. Bal. = 20*Log(VTR/VS)
CMR = 20*Log(VX/VS)
Figure 9 - Longitudinal Balance & CMR
R15
20
17
TIP
R18
Zo
VS
~
R19
R
SLIC
VZ
C8
16
R11
R
15
RING
Gain = 20*Log(2*VZ/VS)
Figure 10 - Return Loss
16
Zarlink Semiconductor Inc.
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