TI OPA1644AID High-performance, jfet-input audio operational amplifier Datasheet

OP
A1
641
OP
A1
OPA1641
OPA1642
OPA1644
642
OP
A1
64
4
Burr-Brown Audio
www.ti.com
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
™ High-Performance, JFET-Input
AUDIO OPERATIONAL AMPLIFIERS
Check for Samples: OPA1641, OPA1642, OPA1644
FEATURES
DESCRIPTION
• SUPERIOR SOUND QUALITY
• TRUE JFET INPUT OP AMP
WITH LOW INPUT BIAS CURRENT
• LOW NOISE: 5.1nV/√Hz at 1kHz
• ULTRALOW DISTORTION: 0.00005% at 1kHz
• HIGH SLEW RATE: 20V/ms
• UNITY GAIN STABLE
• NO PHASE REVERSAL
• LOW QUIESCENT CURRENT:
1.8mA per Channel
• RAIL-TO-RAIL OUTPUT
• WIDE SUPPLY RANGE: ±2.25V to ±18V
• SINGLE, DUAL, AND QUAD VERSIONS
AVAILABLE
The OPA1641 (single), OPA1642 (dual), and
OPA1644 (quad) series are JFET-input, ultralow
distortion, low-noise operational amplifiers fully
specified for audio applications.
1
234
The OPA1641, OPA1642, and OPA1644 rail-to-rail
output swing allows increased headroom, making
these devices ideal for use in any audio circuit.
Features include 5.1nV/√Hz noise, low THD+N
(0.00005%), a low input bias current of 2pA, and low
quiescent current of 1.8mA per channel.
These devices operate over a very wide supply
voltage range of ±2.25V to ±18V. The OPA1641,
OPA1642, and OPA1644 series of op amps are
unity-gain stable and provide excellent dynamic
behavior over a wide range of load conditions.
The dual and quad versions feature completely
independent circuitry for lowest crosstalk and
freedom from interactions between channels, even
when overdriven or overloaded.
APPLICATIONS
•
•
•
•
•
PROFESSIONAL AUDIO EQUIPMENT
ANALOG AND DIGITAL MIXING CONSOLES
BROADCAST STUDIO EQUIPMENT
HIGH-END A/V RECEIVERS
HIGH-END BLU-RAY™ PLAYERS
The OPA1641, OPA1642, and OPA1644
specified from –40°C to +85°C. SoundPlus™
are
V+
Pre-Output Driver
IN-
OUT
IN+
V1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SoundPlus is a trademark of Texas Instruments Incorporated.
BLU-RAY is a trademark of Blu-Ray Disc Assocation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
OPA1641
OPA1642
OPA1644
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
VALUE
UNIT
40
V
Supply Voltage, VS = (V+) – (V–)
Input Voltage
(2)
(V–) –0.5 to (V+) +0.5
V
±10
mA
±VS
V
Input Current (2)
Differential Input Voltage
Output Short-Circuit
(3)
Continuous
Operating Temperature, TA
–55 to +125
°C
Storage Temperature, TA
–65 to +150
°C
Junction Temperature, TJ
+150
°C
Human Body Model (HBM)
3000
V
Charged Device Model (CDM)
1000
V
Machine Model (MM)
100
V
ESD Ratings
(1)
(2)
(3)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should
be current-limited to 10mA or less.
Short-circuit to VS/2 (ground in symmetrical dual-supply setups), one amplifier per package.
PACKAGE INFORMATION (1)
PRODUCT
OPA1641
OPA1642
OPA1644
(1)
2
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
SO-8
D
O1641A
MSOP-8
DGK
1641
SO-8
D
O1642A
MSOP-8
DGK
1642
SO-14
D
O1644AG4
TSSOP-14
PW
O1644A
For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
OPA1641
OPA1642
OPA1644
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
ELECTRICAL CHARACTERISTICS: VS = +4.5V to +36; ±2.25V to ±18V
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OPA1641, OPA1642, OPA1644
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
Total Harmonic Distortion +
Noise
THD+N
Intermodulation Distortion
G = +1, f = 1kHz, VO = 3VRMS
IMD
0.00005
%
–126
dB
G = +1, VO = 3VRMS
SMPTE/DIN Two-Tone, 4:1 (60Hz and 7kHz)
DIM 30 (3kHz square wave and 15kHz sine wave)
CCIF Twin-Tone (19kHz and 20kHz)
0.00004
%
–128
dB
0.00008
%
–122
dB
0.00007
%
–123
dB
MHz
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
GBW
G = +1
11
SR
G = +1
20
V/ms
VO = 1VP
3.2
MHz
Full-Power Bandwidth (1)
Overload Recovery Time (2)
G = –10
600
ns
Channel Separation (Dual and Quad)
f = 1kHz
–126
dB
f = 20Hz to 20kHz
4.3
mVPP
f = 10Hz
8
nV/√Hz
f = 100Hz
5.8
nV/√Hz
f = 1kHz
5.1
nV/√Hz
f = 1kHz
0.8
fA/√Hz
NOISE
Input Voltage Noise
Input Voltage Noise Density
Input Current Noise Density
en
In
OFFSET VOLTAGE
Input Offset Voltage
vs Power Supply
VOS
VS = ±18V
1
3.5
mV
VS = ±2.25V to ±18V
0.14
2
mV/V
IB
VCM = 0V
±2
±20
pA
IOS
VCM = 0V
±2
±20
pA
PSRR
INPUT BIAS CURRENT
Input Bias Current
Input Offset Current
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
Common-Mode Rejection Ratio
CMRR
(V–)-0.1
VCM = (V–) – 0.1V to (V+) – 3.5V, VS = ±18V
120
(V+)–3.5
V
126
dB
1013 || 8
Ω || pF
INPUT IMPEDANCE
Differential
13
VCM = (V–) – 0.1V to (V+) – 3.5V
Common-Mode
10
|| 6
Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
(1)
(2)
AOL
(V–) + 0.2V ≤ VO ≤ (V+) – 0.2V, RL = 10kΩ
120
134
dB
(V–) + 0.35V ≤ VO ≤ (V+) – 0.35V, RL = 2kΩ
114
126
dB
Full power bandwidth = SR/(2p × VP), where SR = slew rate.
See Figure 21 and Figure 22.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
3
OPA1641
OPA1642
OPA1644
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
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ELECTRICAL CHARACTERISTICS: VS = +4.5V to +36; ±2.25V to ±18V (continued)
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
OPA1641, OPA1642, OPA1644
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
Voltage Output Swing from Rail
VO
Output Current
RL = 10kΩ, AOL ≥ 120dB
(V–)+0.2
(V+)–0.2
V
RL = 2kΩ, AOL ≥ 114dB
(V–)+0.35
(V+)–0.35
V
IOUT
See Typical Characteristics
Open-Loop Output Impedance
ZO
Short-Circuit Current
ISC
Source
ISC
Sink
Capacitive Load Drive
CLOAD
See Typical Characteristics
Ω
+36
mA
–30
mA
See Typical Characteristics
POWER SUPPLY
Specified Voltage
VS
Quiescent Current
(per amplifier)
IQ
±2.25
IOUT = 0A
1.8
±18
V
2.3
mA
TEMPERATURE RANGE
Specified Range
–40
+85
°C
Operating Range
–55
+125
°C
Thermal Resistance
qJA
SO-8
138
°C/W
MSOP-8
180
°C/W
SO-14
97
°C/W
TSSOP-14
135
°C/W
PIN ASSIGNMENTS
OPA1641
SO-8, MSOP-8
(TOP VIEW)
NC
(1)
OPA1644
SO-14, TSSOP-14
(TOP VIEW)
(1)
1
8
NC
-In
2
7
V+
+In
3
6
Out
V-
4
5
NC
Out A
1
-In A
2
A
(1) NC denotes no internal connection.
OPA1642
SO-8, MSOP-8
(TOP VIEW)
4
1
-In A
2
+In A
3
V-
4
A
B
Out D
13
-In D
D
+In A
3
12
+In D
V+
4
11
V-
+ In B
5
10
+ In C
(1)
B
OUT A
14
8
V+
7
Out B
6
-In B
5
+In B
C
-In B
6
9
-In C
Out B
7
8
Out C
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
OPA1641
OPA1642
OPA1644
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
TYPICAL CHARACTERISTICS: VS = ±18V
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
0.1Hz to 10Hz NOISE
100nV/div
Voltage Noise Density (nV/ÖHz)
100
10
1
0.1
1
10
100
1k
10k
Time (1s/div)
100k
Frequency (Hz)
Figure 1.
Figure 2.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
CMRR AND PSRR vs FREQUENCY (Referred to Input)
160
35
25
Common-Mode Rejection Ratio (dB)
Power-Supply Rejection Ratio (dB)
30
Output Voltage (VPP)
Maximum output
voltage range
without slew-rate
induced distortion
VS = ±15V
20
15
VS = ±5V
10
VS = ±2.25V
5
140
CMRR
120
100
-PSRR
80
+PSRR
60
40
20
0
0
10k
100k
1M
1
10M
10
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Figure 3.
Figure 4.
GAIN AND PHASE vs FREQUENCY
140
CLOSED-LOOP GAIN vs FREQUENCY
180
30
120
Gain
20
135
90
60
40
Phase
G = +10
Gain (dB)
80
Phase (degrees)
Gain (dB)
100
10
G = +1
0
45
20
-10
G = -1
0
-20
50 100
1k
10k
100k
1M
10M
0
100M
-20
100k
Frequency (Hz)
1M
10M
100M
Frequency (Hz)
Figure 5.
Figure 6.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
5
OPA1641
OPA1642
OPA1644
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
www.ti.com
TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
THD+N RATIO vs FREQUENCY
G = -1
RL = 2kW
G = +1
RL = 600W
G = -1
RL = 600W
0.0001
-120
G = +1
RL = 2kW
0.00001
Total Harmonic Distortion + Noise (%)
VOUT = 3VRMS
BW = 80kHz
-140
10
100
-80
0.01
RSOURCE OPA1641
-15V
0.001
-120
0.0001
RSOURCE = 0W
0.00001
10
Frequency (Hz)
Figure 7.
Figure 8.
10k 20k
100
-120
G = +1
RL = 2kW
-140
100k
0.00001
10k
RSOURCE = 600W
-15V
0.001
RL
RSOURCE = 300W
RSOURCE
= 150W
0.0001
VOUT = 3VRMS
BW > 500kHz
0.00001
100
1k
-140
100k
10k
Frequency (Hz)
THD+N RATIO vs OUTPUT AMPLITUDE
INTERMODULATION DISTORTION vs
OUTPUT AMPLITUDE
-80
0.0001
-120
G = -1, RL = 2kW
G = +1, RL = 2kW
-140
1
10
20
0.01
-80
G = +1
SMPTE/DIN
Two-Tone
4:1 (60Hz and 7kHz)
0.001
-100
DIM30
(3kHz square wave
and 15kHz sine wave)
0.0001
-120
CCIF Twin-Tone
(19kHz and 20kHz)
0.00001
Intermodulation Distortion (dB)
-100
-120
RSOURCE = 0W
Figure 10.
Output Amplitude (VRMS)
-140
0.1
1
10
20
Output Amplitude (VRMS)
Figure 11.
6
-100
Figure 9.
0.001
0.1
RSOURCE OPA1641
Frequency (Hz)
BW = 80kHz
1kHz Signal
RSOURCE = 0W
0.00001
-80
+15V
10
Total Harmonic Distortion + Noise (dB)
Total Harmonic Distortion + Noise (%)
1k
Total Harmonic Distortion + Noise (%)
G = -1
RL = 2kW
Intermodulation Distortion (%)
Total Harmonic Distortion + Noise (%)
-100
0.0001
100
-140
20k
Total Harmonic Distortion + Noise (dB)
G = +1
RL = 600W
10k
0.01
Total Harmonic Distortion + Noise (dB)
G = -1
RL = 600W
0.001
VOUT = 3VRMS
BW = 80kHz
THD+N RATIO vs FREQUENCY
-80
VOUT = 3VRMS
BW > 500kHz
-100
RSOURCE = 600W
THD+N RATIO vs FREQUENCY
0.01
RSOURCE = 300W
RL
1k
Frequency (Hz)
1k
0.01
10
RSOURCE
= 150W
+15V
Total Harmonic Distortion + Noise (dB)
Total Harmonic Distortion + Noise (%)
THD+N RATIO vs FREQUENCY
-100
Total Harmonic Distortion + Noise (dB)
0.001
Figure 12.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
OPA1641
OPA1642
OPA1644
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
CHANNEL SEPARATION vs FREQUENCY
-90
NO PHASE REVERSAL
VS = ±15V
VOUT = 3VRMS
G = +1
Output
-100
RL = 600W
5V/div
Channel Separation (dB)
-80
-110
-120
+18V
RL = 2kW
OPA1641
Output
-18V
37VPP
Sine Wave
(±18.5V)
-130
RL = 5kW
-140
100
10
1k
10k
Time (0.4ms/div)
100k
Frequency (Hz)
Figure 13.
Figure 14.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = -1
CL = 100pF
20mV/div
20mV/div
G = +1
CL = 100pF
+15V
OPA1641
-15V
RL
RI
= 2kW
RF
= 2kW
+15V
OPA1641
CL
CL
-15V
Time (100ns/div)
Time (100ns/div)
Figure 15.
Figure 16.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = +1
CL = 100pF
2V/div
2V/div
G = -1
CL = 100pF
Time (400ns/div)
Time (400ns/div)
Figure 17.
Figure 18.
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OPA1641
OPA1642
OPA1644
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TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
VOUT
G = -10
G = -10
5V/div
5V/div
VIN
20kW
20kW
2kW
VIN
2kW
VOUT
OPA1641
OPA1641
VIN
VOUT
VIN
VOUT
Time (0.4ms/div)
Time (0.4ms/div)
Figure 19.
Figure 20.
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
40
G = +1
35
45
ROUT = 0W
RI = 2kW
+15V
40
ROUT
+15V
OPA1641
RL
-15V
ROUT = 24W
15
ROUT = 51W
30
ROUT = 24W
-15V
25
20
ROUT = 51W
15
10
10
5
5
0
0
0
OPA1641
CL
25
20
ROUT
35
CL
Overshoot (%)
Overshoot (%)
30
ROUT = 0W
RF = 2kW
G = -1
100 200 300 400 500 600 700 800 900 1000
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
Capacitive Load (pF)
Figure 21.
Figure 22.
OPEN-LOOP GAIN vs TEMPERATURE
IB AND IOS vs TEMPERATURE
80
0
70
-0.2
60
10kW
IB and IOS (pA)
AOL (mV/V)
-0.4
-0.6
2kW
-0.8
+IB
50
40
30
20
-IB
10
0
-1.0
-10
-1.2
-40
-IOS
-20
-15
10
35
60
85
-40
-15
Figure 23.
8
10
35
60
85
Temperature (°C)
Temperature (°C)
Figure 24.
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
TYPICAL CHARACTERISTICS: VS = ±18V (continued)
At TA = +25°C, RL = 2kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
IB AND IOS vs COMMON-MODE VOLTAGE
10
8
QUIESCENT CURRENT vs TEMPERATURE
2.5
VS = ±18V
2.0
+IB
4
-IB
2
0
IQ (mA)
IB and IOS (pA)
6
IOS
-2
1.5
1.0
-4
-6
0.5
-8
Common-Mode Range
-10
-18
-12
0
-6
6
12
0
-40 -25 -10
18
5
20
Common-Mode Voltage (V)
Figure 25.
50
65
80
95
110 125
Figure 26.
QUIESCENT CURRENT vs SUPPLY VOLTAGE
SHORT-CIRCUIT CURRENT vs TEMPERATURE
2.00
60
1.75
50
1.50
ISC-SOURCE
40
ISC (mA)
1.25
IQ (mA)
35
Temperature (°C)
1.00
0.75
30
ISC-SINK
20
0.50
0.25
10
Specified Supply-Voltage Range
0
VOUT = Midsupply
(includes self-heating)
0
0
4
8
12
16
20
24
28
32
36
-50
-25
0
25
50
75
100
125
Temperature (°C)
Supply Voltage (V)
Figure 27.
Figure 28.
OUTPUT VOLTAGE vs OUTPUT CURRENT
OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY
1k
18.0
17.5
16.5
100
16.0
-40°C +25°C
+85°C
ZO (W)
Output Voltage (V)
17.0
+125°C
-16.0
10
-16.5
-17.0
-17.5
1
-18.0
0
10
20
30
40
50
10
100
1k
Output Current (mA)
Figure 29.
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 30.
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APPLICATION INFORMATION
The OPA1641, OPA1642, and OPA1644 are
unity-gain stable, audio operational amplifiers with
very low noise, input bias current, and input offset
voltage. Applications with noisy or high-impedance
power supplies require decoupling capacitors placed
close to the device pins. In most cases, 0.1mF
capacitors are adequate. The front-page drawing
shows a simplified schematic of the OPA1641.
The equation in Figure 31 shows the calculation of
the total circuit noise, with these parameters:
• en = voltage noise
• In = current noise
• RS = source impedance
• k = Boltzmann's constant = 1.38 × 10–23 J/K
• T = temperature in degrees Kelvin (K)
OPERATING VOLTAGE
For more details on calculating noise, see the next
section on Basic Noise Calculations.
10k
Votlage Noise Spectral Density, EO
The OPA1641, OPA1642, and OPA1644 series of op
amps can be used with single or dual supplies from
an operating range of VS = +4.5V (±2.25V) and up to
VS = +36V (±18V). These devices do not require
symmetrical supplies; it only requires a minimum
supply voltage of +4.5V (±2.25V). For VS less than
±3.5V, the common-mode input range does not
include midsupply. Supply voltages higher than +40V
can permanently damage the device; see Absolute
Maximum Ratings table. Key parameters are
specified over the operating temperature range, TA =
–40°C to +85°C. Key parameters that vary over the
supply voltage or temperature range are shown in the
Typical Characteristics section of this data sheet.
EO
1k
100
OPA1641
Resistor Noise
10
2
2
2
EO = en + (in RS) + 4kTRS
1
100
1k
10k
100k
1M
Source Resistance, RS (W)
NOISE PERFORMANCE
Figure 31 shows the total circuit noise for varying
source impedances with the operational amplifier in a
unity-gain configuration (with no feedback resistor
network and therefore no additional noise
contributions). The OPA1641, OPA1642, and
OPA1644 are shown with total circuit noise
calculated. The op amp itself contributes both a
voltage noise component and a current noise
component. The voltage noise is commonly modeled
as a time-varying component of the offset voltage.
The current noise is modeled as the time-varying
component of the input bias current and reacts with
the source resistance to create a voltage component
of noise. Therefore, the lowest noise op amp for a
given application depends on the source impedance.
For low source impedance, current noise is negligible,
and voltage noise generally dominates. The
OPA1641, OPA1642, and OPA1644 family has both
low voltage noise and extremely low current noise
because of the FET input of the op amp. As a result,
the current noise contribution of the OPA164x series
is negligible for any practical source impedance,
which makes it the better choice for applications with
high source impedance.
10
OPA1611
RS
Figure 31. Noise Performance of the OPA1611
and OPA1641 in Unity-Gain Buffer Configuration
BASIC NOISE CALCULATIONS
Low-noise circuit design requires careful analysis of
all noise sources. External noise sources can
dominate in many cases; consider the effect of
source resistance on overall op amp noise
performance. Total noise of the circuit is the
root-sum-square
combination
of
all
noise
components.
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. This function is plotted in
Figure 31. The source impedance is usually fixed;
consequently, select the op amp and the feedback
resistors to minimize the respective contributions to
the total noise.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
OPA1641
OPA1642
OPA1644
www.ti.com
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
Figure 32 illustrates both noninverting (A) and
inverting (B) op amp circuit configurations with gain.
In circuit configurations with gain, the feedback
network resistors also contribute noise. In general,
the current noise of the op amp reacts with the
feedback resistors to create additional noise
components. However, the extremely low current
noise of the OPA164x means that its current noise
contribution can be neglected.
A) Noise in Noninverting Gain Configuration
The feedback resistor values can generally be
chosen to make these noise sources negligible. Note
that low impedance feedback resistors will load the
output of the amplifier. The equations for total noise
are shown for both configurations.
space
space
Noise at the output:
R2
2
R2
EO2 = 1 +
R1
R1
2
en2 +
R2
R1
2
e12 + e22 + 1 +
R2
R1
es2
EO
RS
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
VS
B) Noise in Inverting Gain Configuration
Noise at the output:
R2
2
2
EO
R1
RS
= 1+
R2
R1 + RS
e n2 +
2
R2
R 1 + RS
e12 + e22 +
2
R2
R 1 + RS
e s2
EO
VS
Where eS =
4kTRS = thermal noise of RS
e1 =
4kTR1 = thermal noise of R1
e2 =
4kTR2 = thermal noise of R2
For the OPA164x series op amps at 1kHz, en = 5.1nV/ÖHz
Figure 32. Noise Calculation in Gain Configurations
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
11
OPA1641
OPA1642
OPA1644
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
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TOTAL HARMONIC DISTORTION
MEASUREMENTS
The OPA164x series op amps have excellent
distortion characteristics. THD + Noise is below
0.00005% (G = +1, VO = 3VRMS, BW = 80kHz)
throughout the audio frequency range, 20Hz to
20kHz, with a 2kΩ load (see Figure 7 for
characteristic performance).
The distortion produced by the OPA164x series op
amps is below the measurement limit of many
commercially available distortion analyzers. However,
a special test circuit (such as Figure 33 shows) can
be used to extend the measurement capabilities.
Op amp distortion can be considered an internal error
source that can be referred to the input. Figure 33
shows a circuit that causes the op amp distortion to
be 101 times (or approximately 40dB) greater than
that normally produced by the op amp. The addition
of R3 to the otherwise standard noninverting amplifier
R1
configuration alters the feedback factor or noise gain
of the circuit. The closed-loop gain is unchanged, but
the feedback available for error correction is reduced
by a factor of 101, thus extending the resolution by
101. Note that the input signal and load applied to the
op amp are the same as with conventional feedback
without R3. The value of R3 should be kept small to
minimize its effect on the distortion measurements.
Validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
measurements. The measurement technique can,
however, be performed with manual distortion
measurement instruments.
space
R2
SIGNAL DISTORTION
GAIN
GAIN
R3
Signal Gain = 1+
OPA1641
VO = 3VRMS
R2
R1
Distortion Gain = 1+
R2
R1 II R3
Generator
Output
R1
R2
R3
1
101
¥
1kW
10W
11
101
100W
1kW
11W
Analyzer
Input
Audio Precision
System Two(1)
with PC Controller
(1)
Load
For measurement bandwidth, see Figure 7 through Figure 12.
Figure 33. Distortion Test Circuit
12
Copyright © 2009–2010, Texas Instruments Incorporated
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OPA1644
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
SOURCE IMPEDANCE AND DISTORTION
PHASE-REVERSAL PROTECTION
For lowest distortion with a source or feedback
network, the impedance seen by the positive and
negative inputs in noninverting applications should be
matched. The n-channel JFETs in the FET input
stage exhibit a varying input capacitance with applied
common-mode
input
voltage.
In
inverting
configurations, the input does not vary with input
voltage because the inverting input is held at virtual
ground. However, in noninverting applications, the
inputs do vary, and the gate-to-source voltage is not
constant. This effect produces increased distortion as
a result of the varying capacitance for unmatched
source impedances.
The OPA1641, OPA1642, and OPA1644 family has
internal phase-reversal protection. Many FET- and
bipolar-input op amps exhibit a phase reversal when
the input is driven beyond its linear common-mode
range. This condition is most often encountered in
noninverting circuits when the input is driven beyond
the specified common-mode voltage range, causing
the output to reverse into the opposite rail. The input
circuitry of the OPA1641, OPA1642, and OPA1644
prevents
phase
reversal
with
excessive
common-mode voltage; instead, the output limits into
the appropriate rail (see Figure 14).
To maintain low distortion, match unbalanced source
impedance with appropriate values in the feedback
network as shown in Figure 34. Of course, the
unbalanced impedance may be from gain-setting
resistors in the feedback path. If the parallel
combination of R1 and R2 is greater than 2kΩ, a
matching impedance on the noninverting input should
be used. As always, resistor values should be
minimized to reduce the effects of thermal noise.
R1
R2
VOUT
OPA164x
VIN
If RS > 2kW or R1 || R2 > 2kW
RS = R1 || R2
Figure 34. Impedance Matching for Maintaining
Low Distortion in Noninverting Circuits
CAPACITIVE LOAD AND STABILITY
The dynamic characteristics of the OPA164x have
been optimized for commonly encountered gains,
loads, and operating conditions. The combination of
low closed-loop gain and high capacitive loads
decreases the phase margin of the amplifier and can
lead to gain peaking or oscillations. As a result,
heavier capacitive loads must be isolated from the
output. The simplest way to achieve this isolation is to
add a small resistor (ROUT equal to 50Ω, for example)
in series with the output.
Figure 21 and Figure 22 illustrate graphs of
Small-Signal Overshoot vs Capacitive Load for
several values of ROUT. Also, refer to Applications
Bulletin AB-028 (literature number SBOA015,
available for download from the TI web site) for
details of analysis techniques and application circuits.
OUTPUT CURRENT LIMIT
The output current of the OPA164x series is limited
by
internal
circuitry
to
+36mA/–30mA
(sourcing/sinking), to protect the device if the output
is accidentally shorted. This short-circuit current
depends on temperature, as shown in Figure 28.
Although it is uncommon for most modern audio
applications to require 600Ω load drive capability,
many audio op amp applications continue to specify
the total harmonic distortion (THD+N) at 600Ω load
for comparative purposes. Figure 7 and Figure 9
provide typical THD+N measurement curves for the
OPA164x series, where the output drives a 3VRMS
signal into a 600Ω load. However, it should be noted
that correct device operation cannot be ensured when
driving 600Ω loads at full supply. Depending on
supply voltage and temperature, it may well trigger
the output current limit circuitry of the device.
POWER DISSIPATION AND THERMAL
PROTECTION
The OPA164x series of op amps are capable of
driving 2kΩ loads with power-supply voltages of up to
±18V over the specified temperature range. In a
single-supply configuration, where the load is
connected to the negative supply voltage, the
minimum load resistance is 2.8kΩ at a supply voltage
of +36V. For lower supply voltages (either
single-supply or symmetrical supplies), a lower load
resistance may be used, as long as the output current
does not exceed 13mA; otherwise, the device
short-circuit current protection circuit may activate.
Internal power dissipation increases when operating
at high supply voltages. Copper leadframe
construction used in the OPA1641, OPA1642, and
OPA1644 series devices improves heat dissipation
compared to conventional materials. PCB layout can
also help reduce a possible increase in junction
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
13
OPA1641
OPA1642
OPA1644
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
temperature. Wide copper traces help dissipate the
heat by acting as an additional heatsink. Temperature
rise can be further minimized by soldering the
devices directly to the PCB rather than using a
socket.
Although the output current is limited by internal
protection circuitry, accidental shorting of one or more
output channels of a device can result in excessive
heating. For instance, when an output is shorted to
mid-supply, the typical short-circuit current of 36mA
leads to an internal power dissipation of over 600mW
at a supply of ±18V. In case of a dual OPA1642 in an
MSOP-8 package (thermal resistance qJA =
180°C/W), such a power dissipation would lead the
die temperature to be 220°C above ambient
temperature, when both channels are shorted. This
temperature increase would destroy the device.
In order to prevent such excessive heating that can
destroy the device, the OPA164x series has an
internal thermal shutdown circuit, which shuts down
the device if the die temperature exceeds
approximately +180°C. Once this thermal shutdown
circuit activates, a built-in hysteresis of 15°C ensures
that the die temperature must drop to about +165°C
before the device switches on again.
ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
It is helpful to have a good understanding of this
basic ESD circuitry and its relevance to an electrical
overstress event. Figure 35 illustrates the ESD
circuits contained in the OPA164x series (indicated
by the dashed line area). The ESD protection circuitry
involves several current-steering diodes connected
from the input and output pins and routed back to the
internal power-supply lines, where they meet at an
absorption device internal to the operational amplifier.
This protection circuitry is intended to remain inactive
during normal circuit operation.
14
www.ti.com
An ESD event produces a short duration,
high-voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device has a trigger, or
threshold voltage, that is above the normal operating
voltage of the OPA164x but below the device
breakdown voltage level. Once this threshold is
exceeded, the absorption device quickly activates
and clamps the voltage across the supply rails to a
safe level.
When the operational amplifier connects into a circuit
such as the one Figure 35 shows, the ESD protection
components are intended to remain inactive and not
become involved in the application circuit operation.
However, circumstances may arise where an applied
voltage exceeds the operating voltage range of a
given pin. Should this condition occur, there is a risk
that some of the internal ESD protection circuits may
be biased on, and conduct current. Any such current
flow occurs through steering diode paths and rarely
involves the absorption device.
Figure 35 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
+VS can sink the current, one of the upper input
steering diodes conducts and directs current to +VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings.
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
OPA1641
OPA1642
OPA1644
www.ti.com
SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies +VS and/or –VS are at 0V.
Again, it depends on the supply characteristic while at
0V, or at a level below the input signal amplitude. If
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
If there is an uncertainty about the ability of the
supply to absorb this current, external zener diodes
may be added to the supply pins as shown in
Figure 35. The zener voltage must be selected such
that the diode does not turn on during normal
operation. However, its zener voltage should be low
enough so that the zener diode conducts if the supply
pin begins to rise above the safe operating supply
voltage level.
(2)
TVS
RF
+V
+VS
OPA1641
RI
ESD CurrentSteering Diodes
-In
(3)
RS
+In
Op-Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
Out
RL
(1)
-V
-VS
(2)
TVS
(1)
VIN = +VS + 500mV.
(2)
TVS: +VS(max) > VTVSBR (Min) > +VS
(3)
Suggested value approximately 1kΩ.
Figure 35. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
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SBOS484A – DECEMBER 2009 – REVISED APRIL 2010
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REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (December, 2009) to Revision A
•
16
Page
Removed product-preview information for OPA1644 device packages throughout document ............................................ 2
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): OPA1641 OPA1642 OPA1644
PACKAGE OPTION ADDENDUM
www.ti.com
15-May-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA1641AID
ACTIVE
SOIC
D
8
OPA1641AIDR
ACTIVE
SOIC
D
8
OPA1642AID
ACTIVE
SOIC
D
8
OPA1642AIDGKR
ACTIVE
MSOP
DGK
OPA1642AIDGKT
ACTIVE
MSOP
OPA1642AIDR
ACTIVE
OPA1644AID
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
DGK
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ACTIVE
SOIC
D
14
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
OPA1644AIDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
OPA1644AIPW
PREVIEW
TSSOP
PW
14
90
TBD
Call TI
Call TI
OPA1644AIPWR
PREVIEW
TSSOP
PW
14
2000
TBD
Call TI
Call TI
75
75
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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