CML Semiconductor Products PRODUCT INFORMATION Digitally Controlled Quad Amplifier Array FX019 Publication D/019/4 December 1995 Features 8-Bit Serial Data Control Output Mute Function Audio and Data Gain Control Applications Telecoms, Radio and Industrial Applications 4 Digitally Controlled Amplifiers 15 Gain/Attenuation Steps 3 Amplifiers, with a ± 3dB Range in 0.43dB Steps 1 'Volume' Amplifier, with a ± 14dB Range in 2dB Steps SERIAL CLOCK INPUT LOAD/LATCH 8-BIT SERIAL DATA INPUT AND LINE DECODERS SERIAL DATA INPUT LOAD/LATCH 3 2 4 1 Ch1 Ch4 VOLUME VSS VDD FX019 CHIP SELECT VBIAS 3 2 Ch2 Ch3 2 1 4 3 CONTROLLED AUDIO OUTPUT LINES Fig.1 Functional Block Diagram Brief Description The FX019 Digitally Adjustable Amplifier Array is available to replace trimmer potentiometers and volume controls in Cellular, PMR, Telephony and Communications applications where d.c., voice or data signals need adjustment. The FX019 is a single-chip LSI consisting of four digitally controlled amplifier stages, each with 15 distinct gain/attenuation steps. Control of each individual amplifier is by an 8-bit serial data stream. Three of the amplifier stages offer a +/-3dB range in steps of 0.43dB, whilst the remaining amplifier offers a +/-14dB range in steps of 2dB, and is suggested for volume control applications. Each amplifier includes a 16th 'Off' state which when applied, mutes the output audio from that channel. This array uses a Chip Select input to select one of two FX019s in a system. This product replaces the need for manual trimming of audible signals by using the host microprocessor to digitally control the set-up of all audio levels during development, production/calibration and operation. Applications include: (i) Control, adjustment and set-up of communications equipment by an Intelligent ATE without manual intervention – eg. Deviation, Microphone and L/S Levels, Rx Audio Level etc. (ii) Automatic Dynamic Compensation of drift caused by variations in temperature, linearity, etc. (iii)Fully automated servicing and re-alignment. The FX019 is a low-power, single 5-volt CMOS device available in plastic DIL and Small Outline (S.O.I.C.) SMD package versions. 1 Pin Number Function FX019DW FX019P 1 Serial Clock : This external clock pulse input is used to “clock in” the Control Data. See Figure 4, Serial Control Data Load Timing. This input has an internal 1MΩ pullup resistor. 2 Load/Latch : Governs the loading and execution of the control data. During serial data loading this input should be kept at a logical '0' to ensure that data rippling past the latches has no effect. When all 8 bits have been loaded, this input should be strobed '0' - '1' - '0' to latch the new data in. Data is executed on the falling edge of the strobe. If the Load/Latch input is used this pin should be left open circuit. This input has an internal 1MΩ pullup resistor. 3 Load/Latch : The inverted Load/Latch input. This function governs the loading and execution of the control data. During serial data loading this input should be kept at a logical '1' to ensure that data rippling past the latches has no effect. When all 8 bits have been loaded, this input should be strobed '1' - '0' - '1' to latch the new data in. Data is executed on the rising edge of the strobe. If the Load/Latch input is used this pin should be left open circuit. This input has an internal 1MΩ pulldown resistor. 4 Ch1 Input : Analogue Inputs : 5 Ch2 Input : 6 Ch3 Input : These individual amplifier inputs are self-biasing, a.c. input analogue signals must be capacitively coupled to these pins, as shown in Figure 2. Note that amplifiers Ch1 to Ch4 are 'inverting amplifiers.' 7 Ch4 Input : 8 VSS : Negative supply rail (GND). 9 VBIAS : The output of the on-chip bias circuitry, held at VDD/2. This pin should be decoupled to VSS as shown in Figure 2. 10 Ch4 Output : Controlled Analogue Outputs : 11 Ch3 Output : 12 Ch2 Output : 13 Ch1 Output : The individual "Gain Controlled" amplifier outputs. Ch1 to Ch3 range from -3dB to +3dB in 0.43dB steps, Ch4 could be utilized as a volume control, ranging from -14dB to +14dB in 2.0dB steps. In the “OFF” mode there is no output from the selected amplifier. 14 Chip Select : A logic input to select one of two FX019 microcircuits in a system, see Table 1. This input has an internal 1MΩ pulldown resistor. 15 Control Data Input : Operation of the 4 amplifier channels (Ch1 – Ch4) is controlled by the 8 bits of data entered serially at this pin. The data is entered (bit 7 to bit 0) on the rising edge of the external Serial Clock. The data format is described in Tables 1, 2 and Figure 4. This input has an internal 1MΩ pullup resistor. 16 VDD : Positive supply rail. A single +5-volt power supply is required. 2 Application Notes VDD C6 VSS SERIAL CLOCK INPUT LOAD/LATCH LOAD/LATCH CHANNEL 1 INPUT C1 CHANNEL 2 INPUT C2 CHANNEL 3 INPUT C3 CHANNEL 4 INPUT C4 VSS 1 16 2 15 3 14 4 13 FX019 VDD CONTROL DATA INPUT CHIP SELECT CHANNEL 1 OUTPUT CHANNEL 2 OUTPUT 5 12 6 11 7 10 8 9 CHANNEL 3 OUTPUT CHANNEL 4 OUTPUT VBIAS C5 VSS Notes (1) Channel Amplifiers 1 to 4 are inverting amplifiers. Component Value C1 to C 4 C5 C6 Tolerances: C = ± 20% (2) Analogue input capacitors C1 to C4 are only required for a.c. input signals, d.c. input signals do not require these components. 0.1µF 1.0µF 1.0µF Fig.2 External Component Connections Application Recommendations To avoid excess noise and instability in the final installation it is recommended that the following points be noted. (a) A noisy or badly regulated power supply can cause instability and/or variance of selected gains. (b) Care should be taken on the design and layout of the printed circuit board. (c) All external components (Figure 2) should be kept close to the FX019 package. (d) Inputs and outputs should be screened wherever possible. (e) Tracks should be kept short. 60 (f) Analogue tracks should not run parallel to digital tracks. (g) A "Ground Plane" connected to VSS will assist in eliminating external pick-up on the channel input and output pins. (h) Do not run high-level output tracks close to lowlevel input tracks. (i) Input signal amplitudes should be applied with due regard to Figure 3. SINAD (dB) 50 Input Frequency = 1.0kHz Input Level 0dB ref = 775mVrms Ch1 2, 3 or 4 Gain Set to 0dB 40 30 10.0 -40 25.0 75.0 110.0 250.0 -30 -20 -17 -10 1000.0 775.0 0 1730.0 mVrms 7.0 INPUT LEVEL dB Fig.3 SINAD vs Input Level – Typical Values 3 Control Data and Timing The gain of each amplifier block (Channel 1 to Channel 4) in the FX019 is set by a separate 8-bit data word ( bit 7 to bit 0 ). This 8-bit word, consisting of 4 Address bits (bit 7 to bit 4) and 4 Gain Control bits (bit 3 to bit 0), is loaded to the Control Data Input in serial format using the external data clock. Data is loaded to the FX019 on the rising edge of the Serial Clock. Loaded data is executed on the falling (rising) edge of the Load/Latch (Load/Latch) pulse. Table 1 shows the format of each 4-bit Address word, Table 2 shows the format of each Gain Control word with Figure 4 describing the data loading operation and timing. Table 1 Address Word Format Table 2 Gain Control Word Format Bit 7 Bit 6 Bit 5 Bit 4 MSB LSB Channel Selected Chip Select 1 1 1 1 0 0 0 0 0 0 1 1 0 1 0 1 1 2 3 4 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 1 2 3 4 1 1 1 1 Chip Number Chip 1 Chip 2 Data Loading The 8-bit data word is loaded bit 7 first and bit 0 last. Bit 7 must be a logic “1” to address the chip. If bit 7 in the word is a logic “0” that 8-bit word will not be executed. The Chip Select input permits the use of two devices in a system; To facilitate this, Bit 6 can be either a logic “0” or “1.” Figure 4 (below) shows the timing information required to load and operate this device. Bit 3 MSB Bit2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Bit 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Bit 0 LSB Stage 1, 2, 3 (0.43dB) Stage 4 (2.0dB) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OFF -3.0 -2.571 -2.143 -1.714 -1.286 -0.857 -0.428 0 0.428 0.857 1.286 1.714 2.143 2.571 3.0 OFF -14.0dB -12.0 -10.0 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 SERIAL DATA CLOCK t PWL SERIAL DATA IN t DS t PWH Next Clock Pulse 8th Clock Pulse tDH (ONE 8-BIT WORD) Logic ’1’ Loaded First BIT 7 Loaded Last BIT 6 BIT 1 BIT 0 t LLD LOAD/LATCH t LLW LOAD/LATCH Timing tPWH tDS tLLW Serial Clock "High" Pulse Width tPWL Data Set-up Time tDH Load/Latch Pulse Width tLLO Serial Clock "Low" Pulse Width Data Hold Time tLLD Load/Latch Over Time Fig.4 Serial Control Data Loading Diagram Load/Latch Delay 4 t LLO Specification Absolute Maximum Ratings Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied. Supply voltage -0.3 to 7.0V Input voltage at any pin (ref VSS = 0V) -0.3 to (VDD + 0.3V) Sink/source current (supply pins) +/- 30mA (other pins) +/- 20mA 800mW Max. Total device dissipation @ T AMB 25°C Derating 10mW/°C Operating temperature range: FX019DW/P -40°C to +85°C (plastic) Storage temperature range: FX019DW/P -40°C to +85°C (plastic) Operating Limits All device characteristics are measured under the following conditions unless otherwise specified: VDD = 5.0V, TAMB = 25°C. Audio Level 0dB ref: = 775mVrms. Amplifier Gain Set = 0dB. Characteristics See Note Min. Typ. Static Values 4.5 5.0 Supply Voltage (VDD) Supply Current 1.5 Dynamic Values Control Functions Input Logic '1' 3.5 – Input Logic '0' – – Digital Input Impedances 0.5 1.0 Amplifier Stages (General) Bandwidth (-3dB) 20.0 – Output Impedance – 1.0 Total Harmonic Distortion 1 – 0.35 Output Noise Level (per stage) 2 – 180.0 Onset of Clipping 3 – 1.73 Gain Variation 4 – – Interstage Isolation – 60.0 “Trimmer” Stages (Ch1 – Ch3) Gain -3.0 Gain per Step (15 in No.) – 0.43 Step Error 5 – – Input Impedance 100.0 – “Volume” Stage (Ch4) Gain -14.0 Gain per Step (15 in No.) – 2.0 Step Error 5 – – Input Impedance 50.0 – Timing (Figure 4) Serial Clock "High" Pulse Width (tPWH) 250 – Serial Clock "Low" Pulse Width (tPWL) 250 – Data Set-up Time (tDS) 150 – 50.0 – Data Hold Time (tDH) Load/Latch Pulse Width (tLLW) 150 – Load/Latch Delay (tLLD) 200 – – – Load/Latch Over (tLLO) Serial Data Clock Frequency – – Notes 1. Gain Set 0dB, Input Level 1kHz -3.0dB (549mVrms). 2. With an a.c short-circuit input, measured in a 30kHz bandwidth. 3. See Figure 3. 4. Over the temperature and supply voltage range. 5. With reference to a 1.0kHz signal. 5 Max. Unit 5.5 - V mA – 1.5 – V V MΩ – 0.5 400.0 – 0.1 – kHz kΩ % µVrms Vrms dB dB +3.0 – ±0.2 – dB dB dB kΩ +14.0 – ±0.4 – dB dB dB kΩ – – – – – – 50.0 2.0 ns ns ns ns ns ns ns MHz Package Outlines Handling Precautions The FX019 is available in the package styles outlined below. Mechanical package diagrams and specifications are detailed in Section 10 of this document. Pin 1 identification marking is shown on the relevant diagram and pins on all package styles number anti-clockwise when viewed from the top. The FX019 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage. FX019DW 16-pin plastic S.O.I.C. FX019P (D4) NOT TO SCALE 16-pin plastic DIL (P3) NOT TO SCALE Max. Body Length Max. Body Width Stand-Off 10.31mm 7.59mm 0.20mm Max. Body Length Max. Body Width Stand-Off Ordering Information FX019DW 16-pin plastic S.O.I.C. (D4) FX019P 16-pin plastic DIL (P3) CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry. 6 19.24mm 6.41mm 0.51mm CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits. These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force. CML Microcircuits Product Prefix Codes Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX. This notification is relevant product information to which it is attached. Company contact information is as below: CML Microcircuits (UK)Ltd CML Microcircuits (USA) Inc. CML Microcircuits (Singapore)PteLtd COMMUNICATION SEMICONDUCTORS COMMUNICATION SEMICONDUCTORS COMMUNICATION SEMICONDUCTORS Oval Park, Langford, Maldon, Essex, CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 [email protected] www.cmlmicro.com 4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 0800 638 5577 Fax: +1 336 744 5054 [email protected] www.cmlmicro.com No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 [email protected] www.cmlmicro.com D/CML (D)/1 February 2002