CXK77B3611AGB -5/6 High Speed Bi-CMOS Synchronous Static RAM Preliminary For the availability of this product, please contact the sales office. Description The CXK77B3611AGB-5/6 is a high speed 1M bit Bi-CMOS synchronous static RAM organized as 32768 words by 36 bits. This SRAM integrates input registers, high speed SRAM and write buffer onto a single monolithic IC and features the delayed write system to reduce the dead cycles. 119 pin BGA (Plastic) Features • Fast cycle time (Cycle) (Frequency) CXK77B3611AGB-5 5ns 200MHz -6 6ns 167MHz • Inputs and outputs are GTL/HSTL compatible • Controlled Impedance Driver • Single 3.3V power supply: 3.3V±0.15V • Byte-write possible • OE asynchronization • JTAG test circuit • Package 119TBGA • 4 kinds of synchronous operation mode Register-Register mode (R-R mode) Register-Flow Thru mode (R-F mode) Register-Latch mode (R-L mode) Dual clock mode (D-C mode) Function 32768 word x 36bit High Speed Bi-CMOS Synchronous SRAM Structure Silicon gate Bi-CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– PE96812 CXK77B3611AGB Block Diagram 15 Input Reg. A0 to 14 2:1 Mux Add. Dout 32K × 36 Write Store Reg. 2:1 Mux Output latch Din Write pulse Reg. Read Comp. S Reg. W Reg. Self Time Write Logic 4 BW a to d Reg. K/K Output Clock C/C M1 M2 Mode Control G –2– DQ CXK77B3611AGB Pin Configuration (Top View) 1 2 3 4 5 6 7 A VDDQ A A NC A A VDDQ B NC NC NC NC NC NC NC C NC A A VDD A A NC D DQc DQc VSS ZQ VSS DQb DQb E DQc DQc VSS S VSS DQb DQb F VDDQ DQc VSS G VSS DQb VDDQ G DQc DQc BWc C BWb DQb DQb H DQc DQc VSS C VSS DQb DQb J VDDQ VDD VREF VDD VREF VDD VDDQ K DQd DQd VSS K VSS DQa DQa L DQd DQd BWd K BWa DQa DQa M VDDQ DQd VSS W VSS DQa VDDQ N DQd DQd VSS A VSS DQa DQa P DQd DQd VSS A VSS DQa DQa R NC A M1 VDD M2 A NC T NC NC A A A NC ZZ U VDDQ TMS TDI TCK TDO NC VDDQ Pin Description Symbol Description Symbol Description Symbol Description A Address Input BWX Byte Write Enable (a to d) VDD +3.3V power supply DQx Data I/O in byte (a to d) S Chip Select VDDQ Output power supply K Positive Clock G Asyn Output Enable VSS Ground K Negative Clock ZZ Sleep Mode Select M1, M2 Mode Select C Output Positive Clock(∗) TCK JTAG Clock ZQ Output Impedance Control C Output Negative Clock(∗) TMS JTAG Mode Select NC No Connect VREF Input Reference TDI JTAG Data In Write Enable JTAG Data Out TDO W (∗) These pins should be tied to VDD or VSS except D-C mode. –3– CXK77B3611AGB Package Outline Unit: mm 119 TERMINAL BGA (PLASTIC) X 0.84 C 6 0. C 419.5 22.0 0 1. ×4 0.35 C 1 2 3 4 5 6 7 3- 5 1. 0.10 1.27 U T R P N M L K J H G F E D C B A C C 3.19 20.32 B 11.5 7.62 0.6 ± 0.1 A 1.27 14.0 0.6 ± 0.1 φ0.75 ± 0.15 1.5 φ0.3 C A B φ0.1 0.15 DETAIL X C PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN BOARD MATERIAL COPPER-CLAD LAMINATE EIAJ CODE TERMINAL MATERIAL SOLDER JEDEC CODE PACKAGE WEIGHT 0.8g SONY CODE BGA-119P-01 –4–