ISL84514, ISL84515 ® Data Sheet August 2004 Low-Voltage, Single Supply, SPST, Analog Switches The Intersil ISL84514 and ISL84515 devices are precision, analog switches designed to operate from a single +2.4V to +12V supply. Targeted applications include battery powered equipment that benefit from the devices’ low power consumption (5µW), and low leakage currents (1nA). Low RON and fast switching speeds over a wide operating supply range make these switches ideal for use in industrial equipment, portable instruments, and as input signal multiplexers for new generation, low supply voltage data converters. Some of the smallest packages available alleviate board space limitations, and make Intersil’s newest line of lowvoltage switches an ideal solution for space constrained products. FN6025.4 Features • Drop-in Replacements for MAX4514 and MAX4515 • Available in SOT-23 Packaging • Fully Specified for 5V and 12V Supplies • Single Supply Operation. . . . . . . . . . . . . . . . . +2.4V to +12V • ON Resistance (RON Max). . . . . . . . . . . . . 20Ω (V+ = 5V) 10Ω (V+ = 12V) • RON Flatness (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Ω • Charge Injection (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 10pC • Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<5µW • Low Leakage Current (Max at 85oC) . 20nA (Off Leakage) 40nA (On Leakage) The ISL8451X are single-pole/single-throw (SPST) switches, with the ISL84514 being normally open (NO), and the ISL84515 being normally closed (NC). • Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns Table 1 summarizes the performance of this family. For higher performance, pin compatible versions, see the ISL43110, ISL43111 data sheet. For ±5V supply versions, see the ISL84516, ISL84517 data sheet. • Minimum 2000V ESD Protection per Method 3015.7 TABLE 1. FEATURES AT A GLANCE ISL84515 1 1 Configuration NO NC 3.3V RON 20Ω 20Ω 60ns/30ns 60ns/30ns 12Ω 12Ω 45ns/25ns 45ns/25ns 8Ω 8Ω 40ns/25ns 40ns/25ns 3.3V tON/tOFF 5V RON 5V tON/tOFF 12V RON 12V tON/tOFF Packages • Battery Powered, Handheld, and Portable Equipment • Communications Systems - Radios - Telecom Infrustructure • Test Equipment - Logic and Spectrum Analyzers - Portable Meters • Medical Equipment - Ultrasound and MRI - Electrocardiograph • Audio and Video Switching 8 Ld SOIC, 5 Ld SOT-23 Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Application Note AN557 “Recommended Test Procedures for Analog Switches” 1 • Pb-free available Applications ISL84514 Number of Switches • TTL, CMOS Compatible • General Purpose Circuits - +3V/+5V DACs and ADCs - Sample and Hold Circuits - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL84514, ISL84515 Pinouts (Note 1) ISL84514 (SOIC) TOP VIEW ISL84514 (SOT-23) TOP VIEW N.C. 2 7 GND N.C. 3 6 IN V+ 4 5 N.C. NO 2 7 GND N.C. 3 6 IN V+ 4 5 N.C. 4 IN ISL84515 (SOT-23) TOP VIEW 5 V+ COM 1 8 NC N.C. 2 GND 3 ISL84515 (SOIC) TOP VIEW COM 1 5 V+ COM 1 8 NO COM 1 NC 2 4 IN GND 3 NOTE: 1. Switches Shown for Logic “0” Input. Truth Table Ordering Information LOGIC NOTE: ISL84514 ISL84515 0 OFF ON 1 ON OFF Logic “0” ≤ 0.8V. Logic “1” ≥ 2.4V. PART NO. (BRAND) PACKAGE PKG. DWG. # ISL84514IB -40 to 85 8 Ld SOIC ISL84514IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL84514IB-T Pin Description TEMP. RANGE (oC) 8 Ld SOIC Tape and Reel M8.15 M8.15 ISL84514IBZ-T (Note) 8 Ld SOIC Tape and Reel (Pb-free) M8.15 PIN FUNCTION V+ System Power Supply Input (+2.4V to +12V) GND Ground Connection IN Digital Control Input COM Analog Switch Common Pin NO Analog Switch Normally Open Pin NC Analog Switch Normally Closed Pin N.C. No Internal Connection ISL84514IH-T (514I) 5 Ld SOT-23, Tape and Reel P5.064 ISL84514IHZ-T (514I) (Note) 5 Ld SOT-23, Tape and Reel (Pb-free) P5.064 ISL84515IB -40 to 85 8 Ld SOIC ISL84515IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15 ISL84515IB-T 8 Ld SOIC Tape and Reel M8.15 M8.15 ISL84515IBZ-T (Note) 8 Ld SOIC Tape and Reel (Pb-free) M8.15 ISL84515IH-T (515I) 5 Ld SOT-23, Tape and Reel P5.064 ISL84515IHZ-T (515I) (Note) 5 Ld SOT-23, Tape and Reel (Pb-free) P5.064 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. 2 ISL84514, ISL84515 Absolute Maximum Ratings Thermal Information V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V Input Voltages IN (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) NO, NC (Note 2) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . . . 30mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . >2kV Thermal Resistance (Typical, Note 3) θJA (oC/W) 5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 225 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) All Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Storage Temperature Range . . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Temperature Range ISL8451XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 2. Signals on NO, NC, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP (oC) (NOTE 5) MIN Full 0 - V+ V 25 - - 20 Ω TYP (NOTE 5) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 4.5V, ICOM = 1.0mA, VCOM = 3.5V, (See Figure 4) Full - - 25 Ω RON Flatness, RFLAT(ON) V+ = 4.5V, ICOM = 1.0mA, VCOM = 1V, 2V, 3V 25 - - 3 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, (Note 6) COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V, (Note 6) COM ON Leakage Current, ICOM(ON) V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V, (Note 6) Full - - 5 Ω 25 -1 0.01 1 nA Full -20 - 20 nA 25 -1 0.01 1 nA Full -20 - 20 nA 25 -2 0.01 2 nA Full -40 - 40 nA Input Voltage High, VINH Full 2.4 - V+ V Input Voltage Low, VINL Full 0 - 0.8 V V+ = 5.5V, VIN = 0V or V+ Full -1 - 1 µA VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, (See Figure 1) 25 - - 150 ns Full - - 240 ns VNO or VNC = 3V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V, (See Figure 1) 25 - - 100 ns Full - - 150 ns DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2) 25 - 2 10 pC OFF Isolation RL = 50Ω, CL = 15pF, f = 100kHz, (See Figure 3) 25 - >90 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 14 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 14 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 30 - pF 3 ISL84514, ISL84515 Electrical Specifications Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS (NOTE 5) MIN TYP 25 -1 0.0001 1 µA Full -10 - 10 µA TEMP (oC) (NOTE 5) MAX UNITS POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 5.5V, VIN = 0V or V+, Switch On or Off NOTES: 4. VIN = input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. Electrical Specifications - 12V Supply PARAMETER Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 5V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 5) MIN Full 0 - V+ V 25 - - 10 Ω TYP (NOTE 5) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 10.8V, ICOM = 1.0mA, VCOM = 10V RON Flatness, RFLAT(ON) V+ = 12V, ICOM = 1.0mA, VCOM = 3V, 6V, 9V Full - - 15 Ω 25 - - 3 Ω Full - - 5 Ω NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 13.2V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V, (Note 6) 25 -2 - 2 nA Full -50 - 50 nA COM OFF Leakage Current, ICOM(OFF) V+ = 13.2V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V, (Note 6) 25 -2 - 2 nA Full -50 - 50 nA COM ON Leakage Current, ICOM(ON) V+ = 13.2V, VCOM = 1V, 10V, or VNO or VNC = 1V, 10V, (Note 6) 25 -4 - 4 nA Full -100 - 100 nA Full 5 3 V+ V DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Full 0 - 0.8 V V+ = 13.2V, VIN = 0V or V+ Full -1 - 1 µA VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 5V, (See Figure 1) 25 - - 150 ns Full - - 240 ns VNO or VNC = 10V, RL = 300Ω, CL = 35pF, VIN = 0 to 5V, (See Figure 1) 25 - - 100 ns Full - - 150 ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2) 25 - 8 20 pC OFF Isolation RL = 50Ω, CL = 15pF, f = 100kHz, (See Figure 3) Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF 25 - >90 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 14 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 14 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 5) 25 - 30 - pF 25 -2 - 2 µA Full -20 - 20 µA POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 13.2V, VIN = 0V or V+, Switch On or Off 4 ISL84514, ISL84515 Electrical Specifications - 3.3V Supply PARAMETER Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 5) MIN Full 0 - V+ V 25 - - 50 Ω TYP (NOTE 5) MAX UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON V+ = 3V, ICOM = 1.0mA, VCOM = 1.5V RON Flatness, RFLAT(ON) ICOM = 1.0mA, VCOM = 0.5V, 1V, 1.5V NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, (Note 6) COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, (Note 6) COM ON Leakage Current, ICOM(ON) V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V, (Note 6) Full - - 75 Ω 25 - - 5.5 Ω Full - - 7.0 Ω nA 25 -1 0.01 1 Full -20 - 20 nA 25 -1 0.01 1 nA Full -20 - 20 nA 25 -2 0.01 2 nA Full -40 - 40 nA Full 2.4 - V+ V DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL Full 0 - 0.8 V V+ = 3.6V, VIN = 0V or V+ Full -1 - 1 µA VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V 25 - - 150 ns Full - - 240 ns VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF, VIN = 0 to 3V 25 - - 100 ns Full - - 150 ns CL = 1.0nF, VG = 0V, RG = 0Ω 25 - 4 10 pC 25 -1 - 1 µA Full -10 - 10 µA DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 3.6V, VIN = 0V or V+, Switch On or Off Test Circuits and Waveforms V+ tr < 20ns tf < 20ns 3V or 5V LOGIC INPUT 50% 0V tOFF SWITCH INPUT SWITCH INPUT VOUT 90% SWITCH OUTPUT C VOUT NO or NC COM IN 90% LOGIC INPUT 0V GND RL 300Ω tON Logic input waveform is inverted for switches that have the opposite logic sense. CL includes fixture and stray capacitance. FIGURE 1A. MEASUREMENT POINTS RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES 5 CL 35pF ISL84514, ISL84515 Test Circuits and Waveforms (Continued) V+ SWITCH OUTPUT VOUT ∆VOUT RG NO OR NC VOUT COM ON ON LOGIC INPUT C VG OFF GND IN CL LOGIC INPUT Q = ∆VOUT x CL FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUIT FIGURE 2. CHARGE INJECTION V+ V+ C C RON = V1/1mA SIGNAL GENERATOR COM NO OR NC VCOM IN 1mA 0V OR V+ IN V1 COM ANALYZER GND NO OR NC GND RL FIGURE 4. RON TEST CIRCUIT FIGURE 3. OFF ISOLATION TEST CIRCUIT V+ C NO OR NC IN 0V OR V+ IMPEDANCE ANALYZER COM GND FIGURE 5. CAPACITANCE TEST CIRCUIT 6 0.8V OR VINH ISL84514, ISL84515 Detailed Description Power-Supply Considerations The ISL84514 and ISL84515 analog switches offer precise switching capability from a single 2.4V to 12V supply with low on-resistance, and high-speed operation. The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.4V), low power consumption (5µW), low leakage currents (2nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high Off Isolation. The ISL8451X construction is typical of most CMOS analog switches, except that there are only two supply pins: V+ and GND. Unlike switches with a 13V maximum supply voltage, the ISL8451X 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies, as well as margin for overshoot and noise spikes. Supply Sequencing And Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to GND (see Figure 6). To prevent forward biasing these diodes, V+ must be applied before any input signals, and input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1kΩ resistor in series with the input (see Figure 6). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 6). These additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. The minimum recommended supply voltage is 2.4V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance Curves for details. V+ and GND power the internal CMOS switches and set their analog voltage limits. These supplies also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. This family of switches cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. For a ±5V single SPST switch, see the ISL84516, ISL84517 data sheet. Logic-Level Thresholds This switch family is TTL compatible (0.8V and 2.4V) over a supply range of 3V to 11V, and the full temperature range (see Figure 10). At 12V the low temperature VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. High-Frequency Performance OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR IN VNO OR NC VCOM GND OPTIONAL PROTECTION DIODE FIGURE 6. OVERVOLTAGE PROTECTION 7 In 50Ω systems, signal response is reasonably flat to 20MHz, with a -3dB bandwidth exceeding 200MHz (see Figure 13). Figure 13 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch’s input to its output. Off Isolation is the resistance to this feedthrough. Figure 14 details the high Off Isolation provided by this family. At 10MHz, off isolation is about 50dB in 50Ω systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation due to the voltage divider action of the switch OFF impedance and the load impedance. ISL84514, ISL84515 Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of these diodes conducts if any analog signal exceeds V+ or GND. Virtually all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog-signal paths and V+ or GND. Typical Performance Curves TA = 25oC, Unless Otherwise Specified 25 25 ICOM = 1mA VCOM = (V+) - 1V ICOM = 1mA 15 RON (Ω) RON (Ω) 20 85oC -40oC 10 25oC 5 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 20 85oC 15 25oC -40oC 10 19 17 15 13 11 9 7 14 85oC 12 10 8 -40oC 6 4 0 2 V+ = 5V 85oC 25oC -40oC V+ = 12V 25oC 4 6 VCOM (V) 8 10 12 FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE 3.0 50 -40oC 2.5 VINH AND VINL (V) 40 V+ = 5V 30 Q (pC) V+ = 3.3V 20 VINH 2.0 25oC 85oC -40oC VINL 1.5 25oC 85oC 1.0 10 V+ = 3.3V 0.5 2 0 0 1 2 3 4 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 5 VCOM (V) FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE 8 FIGURE 10. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE ISL84514, ISL84515 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued) 60 140 VCOM = (V+) - 1V 130 VCOM = (V+) - 1V RL = 300Ω 120 RL = 300Ω 50 110 90 85oC 80 70 40 tOFF (ns) tON (ns) 100 85oC 30 25oC 25oC 60 20 50 -40oC -40oC 40 30 10 2 3 4 5 6 7 V+ (V) 8 9 10 11 2 12 FIGURE 11. TURN-ON TIME vs SUPPLY VOLTAGE 3 4 5 6 7 V+ (V) 8 9 10 11 12 FIGURE 12. TURN-OFF TIME vs SUPPLY VOLTAGE 10 0 V+ = 3V to 13V 20 RL = 50Ω GAIN V+ = 3.3V 30 -6 0 PHASE V+ = 12V 20 40 V+ = 3.3V 60 80 RL = 50Ω VIN = 0.2VP-P to 2.5VP-P (V+ = 3.3V) VIN = 0.2VP-P to 5VP-P (V+ = 12V) 1 10 100 100 FREQUENCY (MHz) FIGURE 13. FREQUENCY RESPONSE Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL84514: 40 ISL84515: 40 PROCESS: Si Gate CMOS 9 600 OFF ISOLATION (dB) V+ = 12V PHASE (DEGREES) NORMALIZED GAIN (dB) -3 40 50 60 70 80 90 100 110 1k 10k 100k 1M 10M FREQUENCY (Hz) FIGURE 14. OFF ISOLATION 100M 500M ISL84514, ISL84515 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N INDEX AREA 0.25(0.010) M H 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- µα e A1 B 0.25(0.010) M C C A M B S 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 10 MILLIMETERS MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8o 0o N NOTES: MAX A1 e 0.10(0.004) MIN α 8 0o 8 7 8o Rev. 0 12/93 ISL84514, ISL84515 Small Outline Transistor Plastic Packages (SOT23-5) P5.064 D VIEW C e1 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES 5 SYMBOL 4 E CL 1 2 CL 3 e E1 b CL α 0.20 (0.008) M C C CL A A2 SEATING PLANE A1 -C- WITH b PLATING b1 c c1 MILLIMETERS MAX MIN MAX NOTES A 0.036 0.057 0.90 1.45 - A1 0.000 0.0059 0.00 0.15 - A2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 D 0.111 0.118 2.80 3.00 3 E 0.103 0.118 2.60 3.00 - E1 0.060 0.067 1.50 1.70 3 e 0.0374 Ref 0.95 Ref - e1 0.0748 Ref 1.90 Ref - L 0.10 (0.004) C MIN 0.014 0.022 0.35 0.55 L1 0.024 Ref. 0.60 Ref. L2 0.010 Ref. 0.25 Ref. N 5 5 4 5 R 0.004 - 0.10 - R1 0.004 0.010 0.10 0.25 α 0o 8o 0o 8o Rev. 2 9/03 NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 4X θ1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. R1 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 α L2 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. 4X θ1 VIEW C All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11