BB305M Built in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier REJ03G0829-0600 (Previous ADE-208-607D) Rev.6.00 Aug.10.2005 Features • • • • Built in Biasing Circuit; To reduce using parts cost & PC board space. Superior cross modulation characteristics. High gain; (PG = 28 dB typ. at f = 200 MHz) Wide supply voltage range; Applicable with 5V to 9V supply voltage. • Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; MPAK-4(SOT-143Rmod) Outline RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4) 2 3 1 4 Notes: 1. Marking is “EW –”. 2. BB305M is individual type number of RENESAS BBFET. Rev.6.00 Aug 10, 2005 page 1 of 9 1. Source 2. Gate1 3. Gate2 4. Drain BB305M Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Symbol VDS VG1S Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Ratings 12 +10 –0 ±10 25 150 150 –55 to +150 VG2S ID Pch Tch Tstg Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Symbol V(BR)DSS V(BR)G1SS Min 12 +10 Typ — — Max — — Unit V V Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 Gate2 to source breakdown voltage Gate1 to source cutoff current V(BR)G2SS IG1SS ±10 — — — — +100 V nA IG2 = ±10 µA, VG1S = VDS = 0 VG1S = +9 V, VG2S = VDS = 0 Gate2 to source cutoff current Gate1 to source cutoff voltage IG2SS VG1S(off) — 0.4 — — ±100 1.0 nA V Gate2 to source cutoff voltage VG2S(off) 0.4 — 1.0 V Input capacitance Output capacitance Reverse transfer capacitance Drain current Ciss Coss Crss ID(op) 1 2.3 1.1 — 10 2.8 1.5 0.017 15 3.5 1.9 0.04 20 pF pF pF mA VG2S = ±9 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 82 kΩ f = 1 MHz ID(op) 2 — 13 — mA VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ |yfs|1 23 28 — mS VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG =82 kΩ, f = 1 kHz |yfs|2 — 28 — mS VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 1 kHz PG1 24 28 — dB VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ, f = 200 MHz PG2 — 28 — dB VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 200 MHz NF1 — 1.4 1.9 dB VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ, f = 200 MHz NF2 — 1.4 — dB VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 200 MHz Forward transfer admittance Power gain Noise figure Rev.6.00 Aug 10, 2005 page 2 of 9 VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ BB305M Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 VG1 RG Gate 2 Gate 1 Drain Source A ID 200MHz Power Gain, Noise Figure Test Circuit 1000p 1000p 47k Input(50Ω) VT VG2 VT 1000p 1000p 47k BBFET 47k 1000p L2 L1 10p max 1000p 1000p 36p Output(50Ω) 1SV70 RG RFC 82k 1SV70 1000p VD = VG1 L1 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns L2 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns RFC : φ1mm Enameled Copper Wire,Inside dia 5mm, 2Turns Rev.6.00 Aug 10, 2005 page 3 of 9 Unit : Resistance (Ω) Capacitance (F) BB305M Typical Output Characteristics 25 100 50 20 15 10 5 RG = 0 50 100 150 0 200 Ambient Temperature Ta (°C) 82 k Ω 100 k Ω 120 k Ω 150 k Ω 180 k Ω 10 5 0 RG = 220 kΩ 0.8 1.6 2.4 3.2 12 3V 2V 4 0 4.0 VG2S = 1 V 1 2 3 4 5 Gate1 Voltage VG1 (V) Drain Current vs. Gate1 Voltege Drain Current vs. Gate1 Voltege 20 20 VDS = 5 V RG = 82 kΩ Drain Current ID (mA) 16 12 4V 3V 8 2V 4 VG2S = 1 V 0 4V 8 Gate2 to Source Voltage VG2S (V) 16 5 16 68 k Ω 15 4 VDS = 5 V RG = 68 kΩ 56 k Ω 20 3 20 Ω Drain Current ID (mA) Drain Current ID (mA) 47 k 2 Drain Current vs. Gate1 Voltage 25 VDS = VG1 = 5 V 1 kΩ 68 Ω k 82 k Ω 0 10 k Ω 0 12 k Ω 150 k Ω 180 kΩ 220 Drain to Source Voltage VDS (V) Drain Current vs. Gate2 to Source Voltage Drain Current ID (mA) 47 kΩ kΩ 150 VG2S = 4 V VG1 = VDS 56 200 Drain Current ID (mA) Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 1 2 3 Gate1 Voltage VG1 (V) Rev.6.00 Aug 10, 2005 page 4 of 9 4 5 VDS = 5 V RG = 100 kΩ 12 4V 8 3V 2V 4 VG2S = 1 V 0 1 2 3 4 Gate1 Voltage VG1 (V) 5 BB305M Forward Transfer Admittance vs. Gate1 Voltage 30 VDS = 5 V RG = 68 kΩ f = 1 kHz 24 4V 3V 18 2V 12 6 VG2S = 1 V 0 1 2 3 5 4 Forward Transfer Admittance |yfs | (mS) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance vs. Gate1 Voltage 30 24 18 2V 12 6 VG2S = 1 V 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Forward Transfer Admittance vs. Gate1 Voltage Power Gain vs. Gate Resistance 40 30 VDS = 5 V RG = 100 kΩ f = 1 kHz 24 4V Power Gain PG (dB) Forward Transfer Admittance |yfs| (mS) 4V 3V Gate1 Voltage VG1 (V) 3V 18 2V 12 6 V G2S = 1 V 0 1 2 3 4 35 30 25 20 15 10 10 5 Gate1 Voltage VG (V) 50 100 200 500 1000 40 VDS = 5 V VG1 = 5 V VG2S = 4 V f = 200 MHz Power Gain PG (dB) 35 2 1 0 10 20 Power Gain vs. Drain Current 4 3 VDS = 5 V VG1 = 5 V VG2S = 4 V f = 200 MHz Gate Resistance RG (kΩ) Noise Figure vs. Gate Resistance Noise Figure NF (dB) VDS = 5 V RG = 82 kΩ f = 1 kHz 20 50 100 200 500 1000 Gate Resistance RG (kΩ) Rev.6.00 Aug 10, 2005 page 5 of 9 30 25 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 20 15 10 0 5 10 15 20 25 Drain Current ID (mA) 30 BB305M Noise Figure vs. Drain Current 30 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 3 25 Drain Current ID (mA) Noise Figure NF (dB) 4 Drain Current vs. Gate Resistance 2 1 0 5 10 15 20 25 20 15 10 5 0 10 30 Drain Current ID (mA) 50 500 1000 100 200 Input Capacitance vs. Gate2 to Source Voltage 60 6 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = 82 kΩ f = 200 MHz 50 40 Input Capacitance Ciss (pF) Gain Reduction GR (dB) 20 Gate Resistance RG (kΩ) Gain Reduction vs. Gate2 to Source Voltage 30 20 10 0 VDS = 5 V VG1 = 5 V VG2S = 4 V 1 2 3 4 5 Gate2 to Source Voltage VG2S (V) Rev.6.00 Aug 10, 2005 page 6 of 9 5 4 3 2 VDS = 5 V VG1 = 5 V RG = 82 kΩ f = 1 MHz 1 0 0 1 2 3 4 5 Gate2 to Source Voltage VG2S (V) BB305M S21 Parameter vs. Frequency S11 Parameter vs. Frequency .8 1 90° 1.5 .6 Scale: 1 / div. 60° 120° 2 .4 3 30° 150° 4 5 .2 10 .2 0 .4 .6 .8 1 1.5 2 3 45 10 180° 0° –10 –5 –4 –.2 –3 –.4 –30° –150° –2 –.6 –.8 –1 –60° –120° –1.5 –90° Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency S22 Parameter vs. Frequency 90° Scale: 0.002 / div. .8 60° 120° 1 .6 1.5 2 .4 3 30° 150° 4 5 .2 10 180° 0° .2 0 .4 .6 .8 1 1.5 2 3 45 10 –10 –5 –4 –.2 –30° –150° –3 –.4 –60° –120° –90° Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) Rev.6.00 Aug 10, 2005 page 7 of 9 –2 –.6 –.8 –1 –1.5 Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) BB305M S Parameter (VDS = VG1 = 5V, VG2S = 4V, RG = 82kΩ, Zo = 50Ω) f (MHz) S11 S21 S12 S22 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 MAG. 0.991 0.991 0.982 0.975 0.972 0.956 0.942 0.928 0.920 0.906 0.894 0.880 0.868 0.854 0.842 0.835 ANG. –4.8 –9.9 –15.4 –20.7 –25.6 –30.6 –35.5 –40.1 –44.9 –49.2 –53.6 –57.8 –62.1 –66.2 –70.3 –73.9 MAG. 2.69 2.68 2.66 2.62 2.60 2.54 2.47 2.42 2.38 2.32 2.25 2.18 2.12 2.06 2.00 1.94 ANG. 174.9 169.3 163.4 157.5 152.0 146.3 140.9 135.7 130.5 125.7 120.8 116.2 111.5 106.8 102.5 98.4 MAG. 0.00090 0.00153 0.00243 0.00293 0.00370 0.00444 0.00478 0.00535 0.00551 0.00549 0.00584 0.00542 0.00562 0.00509 0.00465 0.00427 ANG. 91.4 90.5 73.8 74.9 70.1 69.0 63.7 64.8 56.8 58.6 54.4 53.3 49.5 48.6 49.7 51.6 MAG. 0.991 0.992 0.991 0.989 0.985 0.981 0.977 0.973 0.967 0.962 0.957 0.952 0.944 0.939 0.933 0.927 ANG. –2.2 –4.8 –7.5 –9.9 –12.6 –15.0 –17.3 –19.7 –22.0 –24.5 –26.9 –29.2 –31.5 –33.8 –36.1 –38.3 850 900 950 1000 0.820 0.802 0.801 0.789 –77.7 –81.5 –84.7 –87.9 1.89 1.83 1.78 1.73 94.0 89.6 85.6 82.1 0.00416 0.00289 0.00288 0.00241 53.3 57.9 72.9 78.9 0.921 0.915 0.909 0.904 –40.5 –42.7 –44.9 –47.1 Rev.6.00 Aug 10, 2005 page 8 of 9 BB305M Package Dimensions JEITA Package Code RENESAS Code SC-61AA Package Name PLSP0004ZA-A MASS[Typ.] MPAK-4 / MPAK-4V D 0.013g A e e2 b1 Q c B B E HE Reference Symbol L A LP L1 A A3 x M S b A e2 A2 e I1 A b5 S b b2 e1 A1 y S b1 b3 c1 c c1 I1 c b4 A-A Section B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q Dimension in Millimeters Min 1.0 0 1.0 0.35 0.55 0.1 2.7 1.35 2.2 0.35 0.15 0.25 Nom 1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8 Max 1.3 0.1 1.2 0.5 0.7 0.15 3.1 1.65 3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.95 1.05 0.3 Ordering Information Part Name BB305MEW-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.6.00 Aug 10, 2005 page 9 of 9 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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